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powerpc/mpc8xxx: Add DDR2 to unified DDR driver
DDR2 has different ODT table and values. Adding table according to Samsung application note. Fix additive latency calculation to avoid interger underflow. Also converted typedef dynamic_odt_t to struct dynamic_odt. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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4 changed files with 287 additions and 17 deletions
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@ -170,3 +170,55 @@ Single slot system
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Reference http://www.xrosstalkmag.com/mag_issues/xrosstalk_oct08_final.pdf
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http://download.micron.com/pdf/technotes/ddr3/tn4108_ddr3_design_guide.pdf
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Table for ODT for DDR2
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======================
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Two slots system
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+-----------------------+----------+---------------+-----------------------------+-----------------------------+
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| Configuration | |DRAM controller| Slot 1 | Slot 2 |
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+-----------+-----------+----------+-------+-------+--------------+--------------+--------------+--------------+
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| | | | | | Rank 1 | Rank 2 | Rank 1 | Rank 2 |
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+ Slot 1 | Slot 2 |Write/Read| Write | Read |-------+------+-------+------+-------+------+-------+------+
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| | | | | | Write | Read | Write | Read | Write | Read | Write | Read |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| | | Slot 1 | off | 150 | off | off | off | off | 75 | 75 | off | off |
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| Dual Rank | Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| | | Slot 2 | off | 150 | 75 | 75 | off | off | off | off | off | off |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| | | Slot 1 | off | 150 | off | off | off | off | 75 | 75 | | |
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| Dual Rank |Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| | | Slot 2 | off | 150 | 75 | 75 | off | off | off | off | | |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| | | Slot 1 | off | 150 | off | off | | | 75 | 75 | off | off |
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|Single Rank| Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| | | Slot 2 | off | 150 | 75 | 75 | | | off | off | off | off |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| | | Slot 1 | off | 150 | off | off | | | 75 | 75 | | |
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|Single Rank|Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| | | Slot 2 | off | 150 | 75 | 75 | | | off | off | | |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| Dual Rank | Empty | Slot 1 | off | 75 | 150 | off | off | off | | | | |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| Empty | Dual Rank | Slot 2 | off | 75 | | | | | 150 | off | off | off |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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|Single Rank| Empty | Slot 1 | off | 75 | 150 | off | | | | | | |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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| Empty |Single Rank| Slot 2 | off | 75 | | | | | 150 | off | | |
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+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
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Single slot system
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+-------------+------------+---------------+-----------------------------+
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| | |DRAM controller| Rank 1 | Rank 2 |
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|Configuration| Write/Read |-------+-------+-------+------+-------+------+
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| | | Write | Read | Write | Read | Write | Read |
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+-------------+------------+-------+-------+-------+------+-------+------+
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| | R1 | off | 75 | 150 | off | off | off |
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| Dual Rank |------------+-------+-------+-------+------+-------+------+
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| | R2 | off | 75 | 150 | off | off | off |
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+-------------+------------+-------+-------+-------+------+-------+------+
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| Single Rank | R1 | off | 75 | 150 | off |
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+-------------+------------+-------+-------+-------+------+
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Reference http://www.samsung.com/global/business/semiconductor/products/dram/downloads/applicationnote/ddr2_odt_control_200603.pdf
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