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net: dwc_eth_qos: implement phy reg and max-speed for stm32

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Add management of property "reg" to configure @ of phy and
also "max-speed" property to specify maximum speed in Mbit/s
supported by the device

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
Patrick Delaunay 2020-03-18 10:50:16 +01:00 • committed by Patrice Chotard
parent 5177b31ba6
commit 4f60a51d07
1 changed files with 18 additions and 1 deletions
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19
drivers/net/dwc_eth_qos.c
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@ -306,6 +306,8 @@ struct eqos_priv {
struct clk clk_slave_bus; struct clk clk_slave_bus;
struct mii_dev *mii; struct mii_dev *mii;
struct phy_device *phy; struct phy_device *phy;
int phyaddr;
u32 max_speed;
void *descs; void *descs;
struct eqos_desc *tx_descs; struct eqos_desc *tx_descs;
struct eqos_desc *rx_descs; struct eqos_desc *rx_descs;
@ -1081,12 +1083,21 @@ static int eqos_start(struct udevice *dev)
* don't need to reconnect/reconfigure again * don't need to reconnect/reconfigure again
*/ */
if (!eqos->phy) { if (!eqos->phy) {
eqos->phy = phy_connect(eqos->mii, -1, dev, eqos->phy = phy_connect(eqos->mii, eqos->phyaddr, dev,
eqos->config->interface(dev)); eqos->config->interface(dev));
if (!eqos->phy) { if (!eqos->phy) {
pr_err("phy_connect() failed"); pr_err("phy_connect() failed");
goto err_stop_resets; goto err_stop_resets;
} }
if (eqos->max_speed) {
ret = phy_set_supported(eqos->phy, eqos->max_speed);
if (ret) {
pr_err("phy_set_supported() failed: %d", ret);
goto err_shutdown_phy;
}
}
ret = phy_config(eqos->phy); ret = phy_config(eqos->phy);
if (ret < 0) { if (ret < 0) {
pr_err("phy_config() failed: %d", ret); pr_err("phy_config() failed: %d", ret);
@ -1654,6 +1665,8 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
if (ret) if (ret)
return -EINVAL; return -EINVAL;
eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0);
ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus); ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus);
if (ret) { if (ret) {
pr_err("clk_get_by_name(master_bus) failed: %d", ret); pr_err("clk_get_by_name(master_bus) failed: %d", ret);
@ -1677,6 +1690,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
if (ret) if (ret)
pr_warn("No phy clock provided %d", ret); pr_warn("No phy clock provided %d", ret);
eqos->phyaddr = -1;
ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
&phandle_args); &phandle_args);
if (!ret) { if (!ret) {
@ -1689,6 +1703,9 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
if (ret) if (ret)
pr_warn("gpio_request_by_name(phy reset) not provided %d", pr_warn("gpio_request_by_name(phy reset) not provided %d",
ret); ret);
eqos->phyaddr = ofnode_read_u32_default(phandle_args.node,
"reg", -1);
} }
debug("%s: OK\n", __func__); debug("%s: OK\n", __func__);