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esd PCI405 board updated
Patch by Matthias Fuchs, 28 Jul 2005
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parent
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commit
5315dfa9d1
3 changed files with 60 additions and 11 deletions
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@ -2,6 +2,9 @@
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Changes for U-Boot 1.1.3:
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======================================================================
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* esd PCI405 board updated
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Patch by Matthias Fuchs, 28 Jul 2005
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* esd WUH405 and DU405 board updated
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Patch by Matthias Fuchs, 27 Jul 2005
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@ -77,10 +77,10 @@ int board_revision(void)
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*/
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cntrl0Reg = mfdcr(cntrl0);
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mtdcr(cntrl0, cntrl0Reg | 0x03000000);
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out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
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out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
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out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00100200);
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out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00100200);
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udelay(1000); /* wait some time before reading input */
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value = in32(GPIO0_IR) & 0x00180000; /* get config bits */
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value = in32(GPIO0_IR) & 0x00100200; /* get config bits */
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/*
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* Restore GPIO settings
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@ -88,18 +88,18 @@ int board_revision(void)
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mtdcr(cntrl0, cntrl0Reg);
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switch (value) {
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case 0x00180000:
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/* CS2==1 && CS3==1 -> version 1.0 and 1.1 */
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case 0x00100200:
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/* CS2==1 && IRQ5==1 -> version 1.0 and 1.1 */
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return 1;
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case 0x00080000:
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/* CS2==0 && CS3==1 -> version 1.2 */
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case 0x00000200:
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/* CS2==0 && IRQ5==1 -> version 1.2 */
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return 2;
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case 0x00000000:
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/* CS2==0 && IRQ5==0 -> version 1.3 */
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return 3;
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#if 0 /* not yet manufactured ! */
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case 0x00100000:
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/* CS2==1 && CS3==0 -> version 1.3 */
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return 3;
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case 0x00000000:
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/* CS2==0 && CS3==0 -> version 1.4 */
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/* CS2==1 && IRQ5==0 -> version 1.4 */
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return 4;
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#endif
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default:
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@ -393,3 +393,48 @@ int testdram (void)
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}
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/* ------------------------------------------------------------------------- */
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int wpeeprom(int wp)
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{
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int wp_state = wp;
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volatile unsigned char *uart1_mcr = (volatile unsigned char *)0xef600404;
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if (wp == 1) {
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*uart1_mcr &= ~0x02;
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} else if (wp == 0) {
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*uart1_mcr |= 0x02;
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} else {
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if (*uart1_mcr & 0x02) {
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wp_state = 0;
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} else {
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wp_state = 1;
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}
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}
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return wp_state;
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}
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int do_wpeeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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int wp = -1;
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if (argc >= 2) {
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if (argv[1][0] == '1') {
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wp = 1;
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} else if (argv[1][0] == '0') {
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wp = 0;
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}
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}
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wp = wpeeprom(wp);
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printf("EEPROM write protection %s\n", wp ? "ENABLED" : "DISABLED");
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return 0;
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}
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U_BOOT_CMD(
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wpeeprom, 2, 1, do_wpeeprom,
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"wpeeprom - Check/Enable/Disable I2C EEPROM write protection\n",
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"wpeeprom\n"
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" - check I2C EEPROM write protection state\n"
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"wpeeprom 1\n"
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" - enable I2C EEPROM write protection\n"
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"wpeeprom 0\n"
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" - disable I2C EEPROM write protection\n"
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);
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@ -32,6 +32,7 @@
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_IDENT_STRING " $Name: esd_PCI405_05_07_28 $"
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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