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Big white-space cleanup.

Browse source 
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk 2008-05-20 16:00:29 +02:00
parent 727f633346
commit 53677ef18e
1010 changed files with 13324 additions and 13313 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
View file

@ -71,7 +71,7 @@ __asm__(" .globl send_kb \n "
" li r3, 0x01 \n "
" bl send_kb \n "
" mtlr r10 \n "
" blr "
" blr \n "
);

409
board/MAI/AmigaOneG3SE/enet.c
View file

@ -274,7 +274,7 @@ struct descriptor { /* A generic descriptor. */
static struct rx_desc_3com *rx_ring; /* RX descriptor ring */
static struct tx_desc_3com *tx_ring; /* TX descriptor ring */
static u8 rx_buffer[NUM_RX_DESC][PKTSIZE_ALIGN]; /* storage for the incoming messages */
static u8 rx_buffer[NUM_RX_DESC][PKTSIZE_ALIGN];/* storage for the incoming messages */
static int rx_next = 0; /* RX descriptor ring pointer */
static int tx_next = 0; /* TX descriptor ring pointer */
static int tx_threshold;
@ -372,22 +372,20 @@ static int issue_and_wait(struct eth_device* dev, int command)
/* Determine network media type and set up 3com accordingly */
/* I think I'm going to start with something known first like 10baseT */
static int auto_negotiate(struct eth_device* dev)
static int auto_negotiate (struct eth_device *dev)
{
int i;
EL3WINDOW(dev, 1);
EL3WINDOW (dev, 1);
/* Wait for Auto negotiation to complete */
for (i = 0; i <= 1000; i++)
{
if (ETH_INW(dev, 2) & 0x04)
for (i = 0; i <= 1000; i++) {
if (ETH_INW (dev, 2) & 0x04)
break;
udelay(100);
udelay (100);
if (i == 1000)
{
PRINTF("Error: Auto negotiation failed\n");
if (i == 1000) {
PRINTF ("Error: Auto negotiation failed\n");
return 0;
}
}
@ -396,101 +394,99 @@ static int auto_negotiate(struct eth_device* dev)
return 1;
}
void eth_interrupt(struct eth_device *dev)
void eth_interrupt (struct eth_device *dev)
{
u16 status = ETH_STATUS(dev);
u16 status = ETH_STATUS (dev);
printf("eth0: status = 0x%04x\n", status);
printf ("eth0: status = 0x%04x\n", status);
if (!(status & IntLatch))
return;
if (status & (1<<6))
{
ETH_CMD(dev, AckIntr | (1<<6));
printf("Acknowledged Interrupt command\n");
if (status & (1 << 6)) {
ETH_CMD (dev, AckIntr | (1 << 6));
printf ("Acknowledged Interrupt command\n");
}
if (status & DownComplete)
{
ETH_CMD(dev, AckIntr | DownComplete);
printf("Acknowledged DownComplete\n");
if (status & DownComplete) {
ETH_CMD (dev, AckIntr | DownComplete);
printf ("Acknowledged DownComplete\n");
}
if (status & UpComplete)
{
ETH_CMD(dev, AckIntr | UpComplete);
printf("Acknowledged UpComplete\n");
if (status & UpComplete) {
ETH_CMD (dev, AckIntr | UpComplete);
printf ("Acknowledged UpComplete\n");
}
ETH_CMD(dev, AckIntr | IntLatch);
printf("Acknowledged IntLatch\n");
ETH_CMD (dev, AckIntr | IntLatch);
printf ("Acknowledged IntLatch\n");
}
int eth_3com_initialize(bd_t *bis)
int eth_3com_initialize (bd_t * bis)
{
u32 eth_iobase = 0, status;
int card_number = 0, ret;
struct eth_device* dev;
struct eth_device *dev;
pci_dev_t devno;
char *s;
s = getenv("3com_base");
s = getenv ("3com_base");
/* Find ethernet controller on the PCI bus */
if ((devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0)) < 0)
{
PRINTF("Error: Cannot find the ethernet device on the PCI bus\n");
if ((devno =
pci_find_device (PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C,
0)) < 0) {
PRINTF ("Error: Cannot find the ethernet device on the PCI bus\n");
goto Done;
}
if (s)
{
unsigned long base = atoi(s);
pci_write_config_dword(devno, PCI_BASE_ADDRESS_0, base | 0x01);
if (s) {
unsigned long base = atoi (s);
pci_write_config_dword (devno, PCI_BASE_ADDRESS_0,
base | 0x01);
}
ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &eth_iobase);
ret = pci_read_config_dword (devno, PCI_BASE_ADDRESS_0, &eth_iobase);
eth_iobase &= ~0xf;
PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
PRINTF ("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
pci_write_config_dword(devno, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
pci_write_config_dword (devno, PCI_COMMAND,
PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
PCI_COMMAND_MASTER);
/* Check if I/O accesses and Bus Mastering are enabled */
ret = pci_read_config_dword(devno, PCI_COMMAND, &status);
ret = pci_read_config_dword (devno, PCI_COMMAND, &status);
if (!(status & PCI_COMMAND_IO))
{
printf("Error: Cannot enable IO access.\n");
if (!(status & PCI_COMMAND_IO)) {
printf ("Error: Cannot enable IO access.\n");
goto Done;
}
if (!(status & PCI_COMMAND_MEMORY))
{
printf("Error: Cannot enable MEMORY access.\n");
if (!(status & PCI_COMMAND_MEMORY)) {
printf ("Error: Cannot enable MEMORY access.\n");
goto Done;
}
if (!(status & PCI_COMMAND_MASTER))
{
printf("Error: Cannot enable Bus Mastering.\n");
if (!(status & PCI_COMMAND_MASTER)) {
printf ("Error: Cannot enable Bus Mastering.\n");
goto Done;
}
dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */
dev = (struct eth_device *) malloc (sizeof (*dev)); /*struct eth_device)); */
sprintf(dev->name, "3Com 3c920c#%d", card_number);
sprintf (dev->name, "3Com 3c920c#%d", card_number);
dev->iobase = eth_iobase;
dev->priv = (void*) devno;
dev->priv = (void *) devno;
dev->init = eth_3com_init;
dev->halt = eth_3com_halt;
dev->send = eth_3com_send;
dev->recv = eth_3com_recv;
eth_register(dev);
eth_register (dev);
/* { */
/* char interrupt; */
@ -504,36 +500,32 @@ int eth_3com_initialize(bd_t *bis)
card_number++;
/* Set the latency timer for value */
s = getenv("3com_latency");
if (s)
{
ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, (unsigned char)atoi(s));
}
else ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, 0x0a);
s = getenv ("3com_latency");
if (s) {
ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER,
(unsigned char) atoi (s));
} else
ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER, 0x0a);
read_hw_addr(dev, bis); /* get the MAC address from Window 2*/
read_hw_addr (dev, bis); /* get the MAC address from Window 2 */
/* Reset the ethernet controller */
PRINTF ("Issuing reset command....\n");
if (!issue_and_wait(dev, TotalReset))
{
printf("Error: Cannot reset ethernet controller.\n");
if (!issue_and_wait (dev, TotalReset)) {
printf ("Error: Cannot reset ethernet controller.\n");
goto Done;
}
else
} else
PRINTF ("Ethernet controller reset.\n");
/* allocate memory for rx and tx rings */
if(!(rx_ring = memalign(sizeof(struct rx_desc_3com) * NUM_RX_DESC, 16)))
{
if (!(rx_ring = memalign (sizeof (struct rx_desc_3com) * NUM_RX_DESC, 16))) {
PRINTF ("Cannot allocate memory for RX_RING.....\n");
goto Done;
}
if (!(tx_ring = memalign(sizeof(struct tx_desc_3com) * NUM_TX_DESC, 16)))
{
if (!(tx_ring = memalign (sizeof (struct tx_desc_3com) * NUM_TX_DESC, 16))) {
PRINTF ("Cannot allocate memory for TX_RING.....\n");
goto Done;
}
@ -543,7 +535,7 @@ Done:
}
static int eth_3com_init(struct eth_device* dev, bd_t *bis)
static int eth_3com_init (struct eth_device *dev, bd_t * bis)
{
int i, status = 0;
int tx_cur, loop;
@ -553,209 +545,198 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
/* Determine what type of network the machine is connected to */
/* presently drops the connect to 10Mbps */
if (!auto_negotiate(dev))
{
printf("Error: Cannot determine network media.\n");
if (!auto_negotiate (dev)) {
printf ("Error: Cannot determine network media.\n");
goto Done;
}
issue_and_wait(dev, TxReset);
issue_and_wait(dev, RxReset|0x04);
issue_and_wait (dev, TxReset);
issue_and_wait (dev, RxReset | 0x04);
/* Switch to register set 7 for normal use. */
EL3WINDOW(dev, 7);
EL3WINDOW (dev, 7);
/* Initialize Rx and Tx rings */
init_rx_ring(dev);
purge_tx_ring(dev);
init_rx_ring (dev);
purge_tx_ring (dev);
ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
ETH_CMD (dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
issue_and_wait(dev,SetTxStart|0x07ff);
issue_and_wait (dev, SetTxStart | 0x07ff);
/* Below sets which indication bits to be seen. */
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
ETH_CMD(dev, status_enable);
status_enable =
SetStatusEnb | HostError | DownComplete | UpComplete | (1 <<
6);
ETH_CMD (dev, status_enable);
/* Below sets no bits are to cause an interrupt since this is just polling */
intr_enable = SetIntrEnb;
/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
ETH_CMD(dev, intr_enable);
ETH_OUTB(dev, 127, UpPoll);
ETH_CMD (dev, intr_enable);
ETH_OUTB (dev, 127, UpPoll);
/* Ack all pending events, and set active indicator mask */
ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
ETH_CMD(dev, intr_enable);
ETH_CMD (dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
ETH_CMD (dev, intr_enable);
/* Tell the adapter where the RX ring is located */
issue_and_wait(dev,UpStall); /* Stall and set the UplistPtr */
ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr);
ETH_CMD(dev, RxEnable); /* Enable the receiver. */
issue_and_wait(dev,UpUnstall);
issue_and_wait (dev, UpStall); /* Stall and set the UplistPtr */
ETH_OUTL (dev, (u32) & rx_ring[rx_next], UpListPtr);
ETH_CMD (dev, RxEnable); /* Enable the receiver. */
issue_and_wait (dev, UpUnstall);
/* Send the Individual Address Setup frame */
tx_cur = tx_next;
tx_next = ((tx_next+1) % NUM_TX_DESC);
tx_next = ((tx_next + 1) % NUM_TX_DESC);
ias_cmd = (struct descriptor *)&tx_ring[tx_cur];
ias_cmd->status = cpu_to_le32(1<<31); /* set DnIndicate bit. */
ias_cmd = (struct descriptor *) &tx_ring[tx_cur];
ias_cmd->status = cpu_to_le32 (1 << 31); /* set DnIndicate bit. */
ias_cmd->next = 0;
ias_cmd->addr = cpu_to_le32((u32)&bis->bi_enetaddr[0]);
ias_cmd->length = cpu_to_le32(6 | LAST_FRAG);
ias_cmd->addr = cpu_to_le32 ((u32) & bis->bi_enetaddr[0]);
ias_cmd->length = cpu_to_le32 (6 | LAST_FRAG);
/* Tell the adapter where the TX ring is located */
ETH_CMD(dev, TxEnable); /* Enable transmitter. */
issue_and_wait(dev, DownStall); /* Stall and set the DownListPtr. */
ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr);
issue_and_wait(dev, DownUnstall);
for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
{
if (i >= TOUT_LOOP)
{
PRINTF("TX Ring status (Init): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
PRINTF("ETH_STATUS: 0x%x\n", ETH_STATUS(dev));
ETH_CMD (dev, TxEnable); /* Enable transmitter. */
issue_and_wait (dev, DownStall); /* Stall and set the DownListPtr. */
ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
issue_and_wait (dev, DownUnstall);
for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
if (i >= TOUT_LOOP) {
PRINTF ("TX Ring status (Init): 0x%4x\n",
le32_to_cpu (tx_ring[tx_cur].status));
PRINTF ("ETH_STATUS: 0x%x\n", ETH_STATUS (dev));
goto Done;
}
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL(dev, 0, DownListPtr);
issue_and_wait(dev, DownUnstall);
if (ETH_STATUS (dev) & DownComplete) { /* If DownLoad Complete ACK the bit */
ETH_CMD (dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait (dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL (dev, 0, DownListPtr);
issue_and_wait (dev, DownUnstall);
}
status = 1;
Done:
return status;
}
int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
int eth_3com_send (struct eth_device *dev, volatile void *packet, int length)
{
int i, status = 0;
int tx_cur;
if (length <= 0)
{
PRINTF("eth: bad packet size: %d\n", length);
if (length <= 0) {
PRINTF ("eth: bad packet size: %d\n", length);
goto Done;
}
tx_cur = tx_next;
tx_next = (tx_next+1) % NUM_TX_DESC;
tx_next = (tx_next + 1) % NUM_TX_DESC;
tx_ring[tx_cur].status = cpu_to_le32(1<<31); /* set DnIndicate bit */
tx_ring[tx_cur].status = cpu_to_le32 (1 << 31); /* set DnIndicate bit */
tx_ring[tx_cur].next = 0;
tx_ring[tx_cur].addr = cpu_to_le32(((u32) packet));
tx_ring[tx_cur].length = cpu_to_le32(length | LAST_FRAG);
tx_ring[tx_cur].addr = cpu_to_le32 (((u32) packet));
tx_ring[tx_cur].length = cpu_to_le32 (length | LAST_FRAG);
/* Send the packet */
issue_and_wait(dev, DownStall); /* stall and set the DownListPtr */
ETH_OUTL(dev, (u32) &tx_ring[tx_cur], DownListPtr);
issue_and_wait(dev, DownUnstall);
issue_and_wait (dev, DownStall); /* stall and set the DownListPtr */
ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
issue_and_wait (dev, DownUnstall);
for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
{
if (i >= TOUT_LOOP)
{
PRINTF("TX Ring status (send): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
if (i >= TOUT_LOOP) {
PRINTF ("TX Ring status (send): 0x%4x\n",
le32_to_cpu (tx_ring[tx_cur].status));
goto Done;
}
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL(dev, 0, DownListPtr);
issue_and_wait(dev, DownUnstall);
if (ETH_STATUS (dev) & DownComplete) { /* If DownLoad Complete ACK the bit */
ETH_CMD (dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait (dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL (dev, 0, DownListPtr);
issue_and_wait (dev, DownUnstall);
}
status=1;
Done:
status = 1;
Done:
return status;
}
void PrintPacket (uchar *packet, int length)
void PrintPacket (uchar * packet, int length)
{
int loop;
uchar *ptr;
int loop;
uchar *ptr;
printf ("Printing packet of length %x.\n\n", length);
ptr = packet;
for (loop = 1; loop <= length; loop++)
{
for (loop = 1; loop <= length; loop++) {
printf ("%2x ", *ptr++);
if ((loop % 40)== 0)
if ((loop % 40) == 0)
printf ("\n");
}
}
int eth_3com_recv(struct eth_device* dev)
int eth_3com_recv (struct eth_device *dev)
{
u16 stat = 0;
u32 status;
int rx_prev, length = 0;
while (!(ETH_STATUS(dev) & UpComplete)) /* wait on receipt of packet */
while (!(ETH_STATUS (dev) & UpComplete)) /* wait on receipt of packet */
;
status = le32_to_cpu(rx_ring[rx_next].status); /* packet status */
status = le32_to_cpu (rx_ring[rx_next].status); /* packet status */
while (status & (1<<15))
{
while (status & (1 << 15)) {
/* A packet has been received */
if (status & (1<<15))
{
if (status & (1 << 15)) {
/* A valid frame received */
length = le32_to_cpu(rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */
length = le32_to_cpu (rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */
/* Pass the packet up to the protocol layers */
NetReceive((uchar *)le32_to_cpu(rx_ring[rx_next].addr), length);
NetReceive ((uchar *)
le32_to_cpu (rx_ring[rx_next].addr),
length);
rx_ring[rx_next].status = 0; /* clear the status word */
ETH_CMD(dev, AckIntr | UpComplete);
issue_and_wait(dev, UpUnstall);
}
else
if (stat & HostError)
{
ETH_CMD (dev, AckIntr | UpComplete);
issue_and_wait (dev, UpUnstall);
} else if (stat & HostError) {
/* There was an error */
printf("Rx error status: 0x%4x\n", stat);
init_rx_ring(dev);
printf ("Rx error status: 0x%4x\n", stat);
init_rx_ring (dev);
goto Done;
}
rx_prev = rx_next;
rx_next = (rx_next + 1) % NUM_RX_DESC;
stat = ETH_STATUS(dev); /* register status */
status = le32_to_cpu(rx_ring[rx_next].status); /* packet status */
stat = ETH_STATUS (dev); /* register status */
status = le32_to_cpu (rx_ring[rx_next].status); /* packet status */
}
Done:
return length;
}
void eth_3com_halt(struct eth_device* dev)
void eth_3com_halt (struct eth_device *dev)
{
if (!(dev->iobase))
{
if (!(dev->iobase)) {
goto Done;
}
issue_and_wait(dev, DownStall); /* shut down transmit and receive */
issue_and_wait(dev, UpStall);
issue_and_wait(dev, RxDisable);
issue_and_wait(dev, TxDisable);
issue_and_wait (dev, DownStall); /* shut down transmit and receive */
issue_and_wait (dev, UpStall);
issue_and_wait (dev, RxDisable);
issue_and_wait (dev, TxDisable);
/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */
/* free(rx_ring); */
@ -764,33 +745,33 @@ Done:
return;
}
static void init_rx_ring(struct eth_device* dev)
static void init_rx_ring (struct eth_device *dev)
{
int i;
PRINTF("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
issue_and_wait(dev, UpStall);
PRINTF ("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
issue_and_wait (dev, UpStall);
for (i = 0; i < NUM_RX_DESC; i++)
{
rx_ring[i].next = cpu_to_le32(((u32) &rx_ring[(i+1) % NUM_RX_DESC]));
for (i = 0; i < NUM_RX_DESC; i++) {
rx_ring[i].next =
cpu_to_le32 (((u32) &
rx_ring[(i + 1) % NUM_RX_DESC]));
rx_ring[i].status = 0;
rx_ring[i].addr = cpu_to_le32(((u32) &rx_buffer[i][0]));
rx_ring[i].length = cpu_to_le32(PKTSIZE_ALIGN | LAST_FRAG);
rx_ring[i].addr = cpu_to_le32 (((u32) & rx_buffer[i][0]));
rx_ring[i].length = cpu_to_le32 (PKTSIZE_ALIGN | LAST_FRAG);
}
rx_next = 0;
}
static void purge_tx_ring(struct eth_device* dev)
static void purge_tx_ring (struct eth_device *dev)
{
int i;
PRINTF("Purging tx_ring.\n");
PRINTF ("Purging tx_ring.\n");
tx_next = 0;
for (i = 0; i < NUM_TX_DESC; i++)
{
for (i = 0; i < NUM_TX_DESC; i++) {
tx_ring[i].next = 0;
tx_ring[i].status = 0;
tx_ring[i].addr = 0;
@ -798,7 +779,7 @@ static void purge_tx_ring(struct eth_device* dev)
}
}
static void read_hw_addr(struct eth_device* dev, bd_t *bis)
static void read_hw_addr (struct eth_device *dev, bd_t * bis)
{
u8 hw_addr[ETH_ALEN];
unsigned int eeprom[0x40];
@ -807,18 +788,16 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
/* Read the station address from the EEPROM. */
EL3WINDOW(dev, 0);
for (i = 0; i < 0x40; i++)
{
ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
EL3WINDOW (dev, 0);
for (i = 0; i < 0x40; i++) {
ETH_OUTW (dev, EEPROM_Read + i, Wn0EepromCmd);
/* Pause for at least 162 us. for the read to take place. */
for (timer = 10; timer >= 0; timer--)
{
udelay(162);
if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
for (timer = 10; timer >= 0; timer--) {
udelay (162);
if ((ETH_INW (dev, Wn0EepromCmd) & 0x8000) == 0)
break;
}
eeprom[i] = ETH_INW(dev, Wn0EepromData);
eeprom[i] = ETH_INW (dev, Wn0EepromData);
}
/* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */
@ -828,30 +807,27 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
checksum = (checksum ^ (checksum >> 8)) & 0xff;
if (checksum != 0xbb)
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
printf (" *** INVALID EEPROM CHECKSUM %4.4x *** \n",
checksum);
for (i = 0, j = 0; i < 3; i++)
{
hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff);
hw_addr[j++] = (u8)(eeprom[i+10] & 0xff);
for (i = 0, j = 0; i < 3; i++) {
hw_addr[j++] = (u8) ((eeprom[i + 10] >> 8) & 0xff);
hw_addr[j++] = (u8) (eeprom[i + 10] & 0xff);
}
/* MAC Address is in window 2, write value from EEPROM to window 2 */
EL3WINDOW(dev, 2);
EL3WINDOW (dev, 2);
for (i = 0; i < 6; i++)
ETH_OUTB(dev, hw_addr[i], i);
ETH_OUTB (dev, hw_addr[i], i);
for (j = 0; j < ETH_ALEN; j+=2)
{
hw_addr[j] = (u8)(ETH_INW(dev, j) & 0xff);
hw_addr[j+1] = (u8)((ETH_INW(dev, j) >> 8) & 0xff);
for (j = 0; j < ETH_ALEN; j += 2) {
hw_addr[j] = (u8) (ETH_INW (dev, j) & 0xff);
hw_addr[j + 1] = (u8) ((ETH_INW (dev, j) >> 8) & 0xff);
}
for (i=0;i<ETH_ALEN;i++)
{
if (hw_addr[i] != bis->bi_enetaddr[i])
{
for (i = 0; i < ETH_ALEN; i++) {
if (hw_addr[i] != bis->bi_enetaddr[i]) {
/* printf("Warning: HW address don't match:\n"); */
/* printf("Address in 3Com Window 2 is " */
/* "%02X:%02X:%02X:%02X:%02X:%02X\n", */
@ -864,20 +840,25 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
/* bis->bi_enetaddr[4], bis->bi_enetaddr[5]); */
/* goto Done; */
char buffer[256];
if (bis->bi_enetaddr[0] == 0 && bis->bi_enetaddr[1] == 0 &&
bis->bi_enetaddr[2] == 0 && bis->bi_enetaddr[3] == 0 &&
bis->bi_enetaddr[4] == 0 && bis->bi_enetaddr[5] == 0)
{
sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X",
if (bis->bi_enetaddr[0] == 0
&& bis->bi_enetaddr[1] == 0
&& bis->bi_enetaddr[2] == 0
&& bis->bi_enetaddr[3] == 0
&& bis->bi_enetaddr[4] == 0
&& bis->bi_enetaddr[5] == 0) {
sprintf (buffer,
"%02X:%02X:%02X:%02X:%02X:%02X",
hw_addr[0], hw_addr[1], hw_addr[2],
hw_addr[3], hw_addr[4], hw_addr[5]);
setenv("ethaddr", buffer);
setenv ("ethaddr", buffer);
}
}
}
for(i=0; i<ETH_ALEN; i++) dev->enetaddr[i] = hw_addr[i];
for (i = 0; i < ETH_ALEN; i++)
dev->enetaddr[i] = hw_addr[i];
Done:
return;

285
board/MAI/AmigaOneG3SE/ps2kbd.c
View file

@ -194,21 +194,22 @@ static unsigned char kbd_ctrl_xlate[] = {
* Init
******************************************************************/
int isa_kbd_init(void)
int isa_kbd_init (void)
{
char* result;
result=kbd_initialize();
if (result != NULL)
{
result = kbd_initialize();
char *result;
result = kbd_initialize ();
if (result != NULL) {
result = kbd_initialize ();
}
if(result==NULL) {
printf("AT Keyboard initialized\n");
irq_install_handler(KBD_INTERRUPT, (interrupt_handler_t *)kbd_interrupt, NULL);
if (result == NULL) {
printf ("AT Keyboard initialized\n");
irq_install_handler (KBD_INTERRUPT,
(interrupt_handler_t *) kbd_interrupt,
NULL);
return (1);
}
else {
printf("%s\n",result);
} else {
printf ("%s\n", result);
return (-1);
}
}
@ -301,7 +302,6 @@ int kbd_getc(void)
}
/* set LEDs */
void kbd_set_leds(void)
@ -322,140 +322,139 @@ void kbd_set_leds(void)
kbd_send_data(leds);
}
void handle_keyboard_event(unsigned char scancode)
void handle_keyboard_event (unsigned char scancode)
{
unsigned char keycode;
/* Convert scancode to keycode */
PRINTF("scancode %x\n",scancode);
if(scancode==0xe0) {
e0=1; /* special charakters */
PRINTF ("scancode %x\n", scancode);
if (scancode == 0xe0) {
e0 = 1; /* special charakters */
return;
}
if(e0==1) {
e0=0; /* delete flag */
if(!( ((scancode&0x7F)==0x38)|| /* the right ctrl key */
((scancode&0x7F)==0x1D)|| /* the right alt key */
((scancode&0x7F)==0x35)|| /* the right '/' key */
((scancode&0x7F)==0x1C)|| /* the right enter key */
((scancode)==0x48)|| /* arrow up */
((scancode)==0x50)|| /* arrow down */
((scancode)==0x4b)|| /* arrow left */
((scancode)==0x4d))) /* arrow right */
if (e0 == 1) {
e0 = 0; /* delete flag */
if (!(((scancode & 0x7F) == 0x38) || /* the right ctrl key */
((scancode & 0x7F) == 0x1D) || /* the right alt key */
((scancode & 0x7F) == 0x35) || /* the right '/' key */
((scancode & 0x7F) == 0x1C) || /* the right enter key */
((scancode) == 0x48) || /* arrow up */
((scancode) == 0x50) || /* arrow down */
((scancode) == 0x4b) || /* arrow left */
((scancode) == 0x4d)))
/* arrow right */
/* we swallow unknown e0 codes */
return;
}
/* special cntrl keys */
switch(scancode)
{
switch (scancode) {
case 0x48:
kbd_put_queue(27);
kbd_put_queue(91);
kbd_put_queue('A');
kbd_put_queue (27);
kbd_put_queue (91);
kbd_put_queue ('A');
return;
case 0x50:
kbd_put_queue(27);
kbd_put_queue(91);
kbd_put_queue('B');
kbd_put_queue (27);
kbd_put_queue (91);
kbd_put_queue ('B');
return;
case 0x4b:
kbd_put_queue(27);
kbd_put_queue(91);
kbd_put_queue('D');
kbd_put_queue (27);
kbd_put_queue (91);
kbd_put_queue ('D');
return;
case 0x4D:
kbd_put_queue(27);
kbd_put_queue(91);
kbd_put_queue('C');
kbd_put_queue (27);
kbd_put_queue (91);
kbd_put_queue ('C');
return;
case 0x58: /* F12 key */
if (ctrl == 1)
{
if (ctrl == 1) {
extern int console_changed;
setenv("stdin", DEVNAME);
setenv("stdout", "vga");
setenv ("stdin", DEVNAME);
setenv ("stdout", "vga");
console_changed = 1;
}
return;
case 0x2A:
case 0x36: /* shift pressed */
shift=1;
shift = 1;
return; /* do nothing else */
case 0xAA:
case 0xB6: /* shift released */
shift=0;
shift = 0;
return; /* do nothing else */
case 0x38: /* alt pressed */
alt=1;
alt = 1;
return; /* do nothing else */
case 0xB8: /* alt released */
alt=0;
alt = 0;
return; /* do nothing else */
case 0x1d: /* ctrl pressed */
ctrl=1;
ctrl = 1;
return; /* do nothing else */
case 0x9d: /* ctrl released */
ctrl=0;
ctrl = 0;
return; /* do nothing else */
case 0x46: /* scrollock pressed */
scroll_lock=~scroll_lock;
kbd_set_leds();
scroll_lock = ~scroll_lock;
kbd_set_leds ();
return; /* do nothing else */
case 0x3A: /* capslock pressed */
caps_lock=~caps_lock;
kbd_set_leds();
caps_lock = ~caps_lock;
kbd_set_leds ();
return;
case 0x45: /* numlock pressed */
num_lock=~num_lock;
kbd_set_leds();
num_lock = ~num_lock;
kbd_set_leds ();
return;
case 0xC6: /* scroll lock released */
case 0xC5: /* num lock released */
case 0xBA: /* caps lock released */
return; /* just swallow */
}
if((scancode&0x80)==0x80) /* key released */
if ((scancode & 0x80) == 0x80) /* key released */
return;
/* now, decide which table we need */
if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */
PRINTF("unkown scancode %X\n",scancode);
if (scancode > (sizeof (kbd_plain_xlate) / sizeof (kbd_plain_xlate[0]))) { /* scancode not in list */
PRINTF ("unkown scancode %X\n", scancode);
return; /* swallow it */
}
/* setup plain code first */
keycode=kbd_plain_xlate[scancode];
if(caps_lock==1) { /* caps_lock is pressed, overwrite plain code */
if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
PRINTF("unkown caps-locked scancode %X\n",scancode);
keycode = kbd_plain_xlate[scancode];
if (caps_lock == 1) { /* caps_lock is pressed, overwrite plain code */
if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) { /* scancode not in list */
PRINTF ("unkown caps-locked scancode %X\n", scancode);
return; /* swallow it */
}
keycode=kbd_shift_xlate[scancode];
if(keycode<'A') { /* we only want the alphas capital */
keycode=kbd_plain_xlate[scancode];
keycode = kbd_shift_xlate[scancode];
if (keycode < 'A') { /* we only want the alphas capital */
keycode = kbd_plain_xlate[scancode];
}
}
if(shift==1) { /* shift overwrites caps_lock */
if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
PRINTF("unkown shifted scancode %X\n",scancode);
if (shift == 1) { /* shift overwrites caps_lock */
if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) { /* scancode not in list */
PRINTF ("unkown shifted scancode %X\n", scancode);
return; /* swallow it */
}
keycode=kbd_shift_xlate[scancode];
keycode = kbd_shift_xlate[scancode];
}
if(ctrl==1) { /* ctrl overwrites caps_lock and shift */
if(scancode > (sizeof(kbd_ctrl_xlate)/sizeof(kbd_ctrl_xlate[0]))) { /* scancode not in list */
PRINTF("unkown ctrl scancode %X\n",scancode);
if (ctrl == 1) { /* ctrl overwrites caps_lock and shift */
if (scancode > (sizeof (kbd_ctrl_xlate) / sizeof (kbd_ctrl_xlate[0]))) { /* scancode not in list */
PRINTF ("unkown ctrl scancode %X\n", scancode);
return; /* swallow it */
}
keycode=kbd_ctrl_xlate[scancode];
keycode = kbd_ctrl_xlate[scancode];
}
/* check if valid keycode */
if(keycode==0xff) {
PRINTF("unkown scancode %X\n",scancode);
if (keycode == 0xff) {
PRINTF ("unkown scancode %X\n", scancode);
return; /* swallow unknown codes */
}
kbd_put_queue(keycode);
PRINTF("%x\n",keycode);
kbd_put_queue (keycode);
PRINTF ("%x\n", keycode);
}
/*
@ -463,34 +462,31 @@ void handle_keyboard_event(unsigned char scancode)
* appropriate action.
*
*/
unsigned char handle_kbd_event(void)
unsigned char handle_kbd_event (void)
{
unsigned char status = kbd_read_status();
unsigned char status = kbd_read_status ();
unsigned int work = 10000;
while ((--work > 0) && (status & KBD_STAT_OBF)) {
unsigned char scancode;
scancode = kbd_read_input();
scancode = kbd_read_input ();
/* Error bytes must be ignored to make the
Synaptics touchpads compaq use work */
/* Ignore error bytes */
if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR)))
{
if (status & KBD_STAT_MOUSE_OBF)
; /* not supported: handle_mouse_event(scancode); */
if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR))) {
if (status & KBD_STAT_MOUSE_OBF); /* not supported: handle_mouse_event(scancode); */
else
handle_keyboard_event(scancode);
handle_keyboard_event (scancode);
}
status = kbd_read_status();
status = kbd_read_status ();
}
if (!work)
PRINTF("pc_keyb: controller jammed (0x%02X).\n", status);
PRINTF ("pc_keyb: controller jammed (0x%02X).\n", status);
return status;
}
/******************************************************************************
* Lowlevel Part of keyboard section
*/
@ -529,64 +525,65 @@ int kbd_read_data(void)
return val;
}
int kbd_wait_for_input(void)
int kbd_wait_for_input (void)
{
unsigned long timeout;
int val;
timeout = KBD_TIMEOUT;
val=kbd_read_data();
while(val < 0)
{
if(timeout--==0)
val = kbd_read_data ();
while (val < 0) {
if (timeout-- == 0)
return -1;
udelay(1000);
val=kbd_read_data();
udelay (1000);
val = kbd_read_data ();
}
return val;
}
int kb_wait(void)
int kb_wait (void)
{
unsigned long timeout = KBC_TIMEOUT * 10;
do {
unsigned char status = handle_kbd_event();
unsigned char status = handle_kbd_event ();
if (!(status & KBD_STAT_IBF))
return 0; /* ok */
udelay(1000);
udelay (1000);
timeout--;
} while (timeout);
return 1;
}
void kbd_write_command_w(int data)
void kbd_write_command_w (int data)
{
if(kb_wait())
PRINTF("timeout in kbd_write_command_w\n");
kbd_write_command(data);
if (kb_wait ())
PRINTF ("timeout in kbd_write_command_w\n");
kbd_write_command (data);
}
void kbd_write_output_w(int data)
void kbd_write_output_w (int data)
{
if(kb_wait())
PRINTF("timeout in kbd_write_output_w\n");
kbd_write_output(data);
if (kb_wait ())
PRINTF ("timeout in kbd_write_output_w\n");
kbd_write_output (data);
}
void kbd_send_data(unsigned char data)
void kbd_send_data (unsigned char data)
{
unsigned char status;
i8259_mask_irq(KBD_INTERRUPT); /* disable interrupt */
kbd_write_output_w(data);
status = kbd_wait_for_input();
i8259_mask_irq (KBD_INTERRUPT); /* disable interrupt */
kbd_write_output_w (data);
status = kbd_wait_for_input ();
if (status == KBD_REPLY_ACK)
i8259_unmask_irq(KBD_INTERRUPT); /* enable interrupt */
i8259_unmask_irq (KBD_INTERRUPT); /* enable interrupt */
}
char * kbd_initialize(void)
char *kbd_initialize (void)
{
int status;
@ -597,22 +594,22 @@ char * kbd_initialize(void)
* This seems to be the only way to get it going.
* If the test is successful a x55 is placed in the input buffer.
*/
kbd_write_command_w(KBD_CCMD_SELF_TEST);
if (kbd_wait_for_input() != 0x55)
kbd_write_command_w (KBD_CCMD_SELF_TEST);
if (kbd_wait_for_input () != 0x55)
return "Kbd: failed self test";
/*
* Perform a keyboard interface test. This causes the controller
* to test the keyboard clock and data lines. The results of the
* test are placed in the input buffer.
*/
kbd_write_command_w(KBD_CCMD_KBD_TEST);
if (kbd_wait_for_input() != 0x00)
kbd_write_command_w (KBD_CCMD_KBD_TEST);
if (kbd_wait_for_input () != 0x00)
return "Kbd: interface failed self test";
/*
* Enable the keyboard by allowing the keyboard clock to run.
*/
kbd_write_command_w(KBD_CCMD_KBD_ENABLE);
status = kbd_wait_for_input();
kbd_write_command_w (KBD_CCMD_KBD_ENABLE);
status = kbd_wait_for_input ();
/*
* Reset keyboard. If the read times out
* then the assumption is that no keyboard is
@ -622,17 +619,16 @@ char * kbd_initialize(void)
* Set up to try again if the keyboard asks for RESEND.
*/
do {
kbd_write_output_w(KBD_CMD_RESET);
status = kbd_wait_for_input();
kbd_write_output_w (KBD_CMD_RESET);
status = kbd_wait_for_input ();
if (status == KBD_REPLY_ACK)
break;
if (status != KBD_REPLY_RESEND)
{
PRINTF("status: %X\n",status);
if (status != KBD_REPLY_RESEND) {
PRINTF ("status: %X\n", status);
return "Kbd: reset failed, no ACK";
}
} while (1);
if (kbd_wait_for_input() != KBD_REPLY_POR)
if (kbd_wait_for_input () != KBD_REPLY_POR)
return "Kbd: reset failed, no POR";
/*
@ -642,44 +638,43 @@ char * kbd_initialize(void)
* Set up to try again if the keyboard asks for RESEND.
*/
do {
kbd_write_output_w(KBD_CMD_DISABLE);
status = kbd_wait_for_input();
kbd_write_output_w (KBD_CMD_DISABLE);
status = kbd_wait_for_input ();
if (status == KBD_REPLY_ACK)
break;
if (status != KBD_REPLY_RESEND)
return "Kbd: disable keyboard: no ACK";
} while (1);
kbd_write_command_w(KBD_CCMD_WRITE_MODE);
kbd_write_output_w(KBD_MODE_KBD_INT
kbd_write_command_w (KBD_CCMD_WRITE_MODE);
kbd_write_output_w (KBD_MODE_KBD_INT
| KBD_MODE_SYS
| KBD_MODE_DISABLE_MOUSE
| KBD_MODE_KCC);
| KBD_MODE_DISABLE_MOUSE | KBD_MODE_KCC);
/* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
kbd_write_command_w(KBD_CCMD_READ_MODE);
if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
kbd_write_command_w (KBD_CCMD_READ_MODE);
if (!(kbd_wait_for_input () & KBD_MODE_KCC)) {
/*
* If the controller does not support conversion,
* Set the keyboard to scan-code set 1.
*/
kbd_write_output_w(0xF0);
kbd_wait_for_input();
kbd_write_output_w(0x01);
kbd_wait_for_input();
kbd_write_output_w (0xF0);
kbd_wait_for_input ();
kbd_write_output_w (0x01);
kbd_wait_for_input ();
}
kbd_write_output_w(KBD_CMD_ENABLE);
if (kbd_wait_for_input() != KBD_REPLY_ACK)
kbd_write_output_w (KBD_CMD_ENABLE);
if (kbd_wait_for_input () != KBD_REPLY_ACK)
return "Kbd: enable keyboard: no ACK";
/*
* Finally, set the typematic rate to maximum.
*/
kbd_write_output_w(KBD_CMD_SET_RATE);
if (kbd_wait_for_input() != KBD_REPLY_ACK)
kbd_write_output_w (KBD_CMD_SET_RATE);
if (kbd_wait_for_input () != KBD_REPLY_ACK)
return "Kbd: Set rate: no ACK";
kbd_write_output_w(0x00);
if (kbd_wait_for_input() != KBD_REPLY_ACK)
kbd_write_output_w (0x00);
if (kbd_wait_for_input () != KBD_REPLY_ACK)
return "Kbd: Set rate: no ACK";
return NULL;
}

40
board/MAI/menu/menu.h
View file

@ -4,8 +4,7 @@
/* A single menu */
typedef void (*menu_finish_callback)(struct menu_s *menu);
typedef struct menu_s
{
typedef struct menu_s {
char *name; /* Menu name */
int num_options; /* Number of options in this menu */
int flags; /* Various flags - see below */
@ -28,8 +27,7 @@ typedef struct menu_s
char *name; \
char *help; \
int id; \
void *sys; \
void *sys;
/*
* Menu option types.
@ -110,42 +108,34 @@ typedef struct menu_text_s
#define MENU_SELECTION_TYPE 3
typedef struct menu_select_option_s
{
typedef struct menu_select_option_s {
char *map_from; /* Map this variable contents ... */
char *map_to; /* ... to this menu text and vice versa */
} menu_select_option_t;
typedef struct menu_select_s
{
OPTION_PREAMBLE
int num_options; /* Number of mappings */
typedef struct menu_select_s {
OPTION_PREAMBLE int num_options; /* Number of mappings */
menu_select_option_t **options;
/* Option list array */
} menu_select_t;
#define MENU_ROUTINE_TYPE 4
typedef void (*menu_routine_callback)(struct menu_routine_s *);
typedef void (*menu_routine_callback) (struct menu_routine_s *);
typedef struct menu_routine_s
{
OPTION_PREAMBLE
menu_routine_callback callback;
typedef struct menu_routine_s {
OPTION_PREAMBLE menu_routine_callback callback;
/* routine to be called */
void *user_data; /* User data, don't care for system */
} menu_routine_t;
#define MENU_CUSTOM_TYPE 5
typedef void (*menu_custom_draw)(struct menu_custom_s *);
typedef void (*menu_custom_key)(struct menu_custom_s *, int);
typedef void (*menu_custom_draw) (struct menu_custom_s *);
typedef void (*menu_custom_key) (struct menu_custom_s *, int);
typedef struct menu_custom_s
{
OPTION_PREAMBLE
menu_custom_draw drawfunc;
typedef struct menu_custom_s {
OPTION_PREAMBLE menu_custom_draw drawfunc;
menu_custom_key keyfunc;
void *user_data;
} menu_custom_t;
@ -153,10 +143,8 @@ typedef struct menu_custom_s
/*
* The menu option superstructure
*/
typedef struct menu_option_s
{
union
{
typedef struct menu_option_s {
union {
menu_submenu_t m_sub_menu;
menu_boolean_t m_boolean;
menu_text_t m_text;

4
board/RPXlite_dw/flash.c
View file

@ -178,8 +178,8 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
value = addr[0] ;
switch (value & 0x00FF00FF) {
case AMD_MANUFACT: /* AMD_MANUFACT=0x00010001 in flash.h. */
info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h.*/
case AMD_MANUFACT: /* AMD_MANUFACT =0x00010001 in flash.h */
info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h */
break;
case FUJ_MANUFACT:
info->flash_id = FLASH_MAN_FUJ;

107
board/eric/flash.c
View file

@ -981,22 +981,22 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
* 2 - Flash not erased
*/
#ifndef CFG_FLASH_16BIT
static int write_word (flash_info_t *info, ulong dest, ulong data)
static int write_word (flash_info_t * info, ulong dest, ulong data)
{
vu_long *addr = (vu_long*)(info->start[0]);
ulong start,barf;
vu_long *addr = (vu_long *) (info->start[0]);
ulong start, barf;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*((vu_long *)dest) & data) != data) {
if ((*((vu_long *) dest) & data) != data) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
flag = disable_interrupts ();
if(info->flash_id > FLASH_AMD_COMP) {
if (info->flash_id > FLASH_AMD_COMP) {
/* AMD stuff */
addr[0x0555] = 0x00AA00AA;
addr[0x02AA] = 0x00550055;
@ -1005,42 +1005,47 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
/* intel stuff */
*addr = 0x00400040;
}
*((vu_long *)dest) = data;
*((vu_long *) dest) = data;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
enable_interrupts ();
/* data polling for D7 */
start = get_timer (0);
if(info->flash_id > FLASH_AMD_COMP) {
if (info->flash_id > FLASH_AMD_COMP) {
while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
while ((*((vu_long *) dest) & 0x00800080) !=
(data & 0x00800080)) {
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
}
} else {
while(!(addr[0] & 0x00800080)){ /* wait for error or finish */
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
while (!(addr[0] & 0x00800080)) { /* wait for error or finish */
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
if( addr[0] & 0x003A003A) { /* check for error */
if (addr[0] & 0x003A003A) { /* check for error */
barf = addr[0] & 0x003A0000;
if( barf ) {
barf >>=16;
if (barf) {
barf >>= 16;
} else {
barf = addr[0] & 0x0000003A;
}
printf("\nFlash write error at address %lx\n",(unsigned long)dest);
if(barf & 0x0002) printf("Block locked, not erased.\n");
if(barf & 0x0010) printf("Programming error.\n");
if(barf & 0x0008) printf("Vpp Low error.\n");
return(2);
printf ("\nFlash write error at address %lx\n",
(unsigned long) dest);
if (barf & 0x0002)
printf ("Block locked, not erased.\n");
if (barf & 0x0010)
printf ("Programming error.\n");
if (barf & 0x0008)
printf ("Vpp Low error.\n");
return (2);
}
@ -1048,25 +1053,25 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
return (0);
}
}
#else
static int write_short (flash_info_t *info, ulong dest, ushort data)
static int write_short (flash_info_t * info, ulong dest, ushort data)
{
vu_short *addr = (vu_short*)(info->start[0]);
ulong start,barf;
vu_short *addr = (vu_short *) (info->start[0]);
ulong start, barf;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*((vu_short *)dest) & data) != data) {
if ((*((vu_short *) dest) & data) != data) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
flag = disable_interrupts ();
if(info->flash_id < FLASH_AMD_COMP) {
if (info->flash_id < FLASH_AMD_COMP) {
/* AMD stuff */
addr[0x0555] = 0x00AA;
addr[0x02AA] = 0x0055;
@ -1076,53 +1081,51 @@ static int write_short (flash_info_t *info, ulong dest, ushort data)
*addr = 0x00D0;
*addr = 0x0040;
}
*((vu_short *)dest) = data;
*((vu_short *) dest) = data;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
enable_interrupts ();
/* data polling for D7 */
start = get_timer (0);
if(info->flash_id < FLASH_AMD_COMP) {
if (info->flash_id < FLASH_AMD_COMP) {
/* AMD stuff */
while ((*((vu_short *)dest) & 0x0080) != (data & 0x0080)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
while ((*((vu_short *) dest) & 0x0080) != (data & 0x0080)) {
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
}
} else {
/* intel stuff */
while(!(addr[0] & 0x0080)){ /* wait for error or finish */
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
while (!(addr[0] & 0x0080)) { /* wait for error or finish */
if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
return (1);
}
if( addr[0] & 0x003A) { /* check for error */
if (addr[0] & 0x003A) { /* check for error */
barf = addr[0] & 0x003A;
printf("\nFlash write error at address %lx\n",(unsigned long)dest);
if(barf & 0x0002) printf("Block locked, not erased.\n");
if(barf & 0x0010) printf("Programming error.\n");
if(barf & 0x0008) printf("Vpp Low error.\n");
return(2);
printf ("\nFlash write error at address %lx\n",
(unsigned long) dest);
if (barf & 0x0002)
printf ("Block locked, not erased.\n");
if (barf & 0x0010)
printf ("Programming error.\n");
if (barf & 0x0008)
printf ("Vpp Low error.\n");
return (2);
}
*addr = 0x00B0;
*addr = 0x0070;
while(!(addr[0] & 0x0080)){ /* wait for error or finish */
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
while (!(addr[0] & 0x0080)) { /* wait for error or finish */
if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
return (1);
}
*addr = 0x00FF;
}
return (0);
}
#endif
/*-----------------------------------------------------------------------
*/
/*-----------------------------------------------------------------------*/

21
board/esd/cpci750/sdram_init.c
View file

@ -134,16 +134,15 @@ typedef enum _max_CL_supported_SD {SD_CL_1=1, SD_CL_2, SD_CL_3, SD_CL_4, SD_CL
/* SDRAM/DDR information struct */
typedef struct _gtMemoryDimmInfo
{
typedef struct _gtMemoryDimmInfo {
MEMORY_TYPE memoryType;
unsigned int numOfRowAddresses;
unsigned int numOfColAddresses;
unsigned int numOfModuleBanks;
unsigned int dataWidth;
VOLTAGE_INTERFACE voltageInterface;
unsigned int errorCheckType; /* ECC , PARITY..*/
unsigned int sdramWidth; /* 4,8,16 or 32 */;
unsigned int errorCheckType; /* ECC , PARITY.. */
unsigned int sdramWidth; /* 4,8,16 or 32 */ ;
unsigned int errorCheckDataWidth; /* 0 - no, 1 - Yes */
unsigned int minClkDelay;
unsigned int burstLengthSupported;
@ -151,7 +150,7 @@ typedef struct _gtMemoryDimmInfo
unsigned int suportedCasLatencies;
unsigned int RefreshInterval;
unsigned int maxCASlatencySupported_LoP; /* LoP left of point (measured in ns) */
unsigned int maxCASlatencySupported_RoP; /* RoP right of point (measured in ns)*/
unsigned int maxCASlatencySupported_RoP; /* RoP right of point (measured in ns) */
MAX_CL_SUPPORTED_DDR maxClSupported_DDR;
MAX_CL_SUPPORTED_SD maxClSupported_SD;
unsigned int moduleBankDensity;
@ -183,20 +182,20 @@ typedef struct _gtMemoryDimmInfo
int dataInputHoldTime; /* LoP left of point (measured in ns) */
/* tAC times for highest 2nd and 3rd highest CAS Latency values */
unsigned int clockToDataOut_LoP; /* LoP left of point (measured in ns) */
unsigned int clockToDataOut_RoP; /* RoP right of point (measured in ns)*/
unsigned int clockToDataOut_RoP; /* RoP right of point (measured in ns) */
unsigned int clockToDataOutMinus1_LoP; /* LoP left of point (measured in ns) */
unsigned int clockToDataOutMinus1_RoP; /* RoP right of point (measured in ns)*/
unsigned int clockToDataOutMinus1_RoP; /* RoP right of point (measured in ns) */
unsigned int clockToDataOutMinus2_LoP; /* LoP left of point (measured in ns) */
unsigned int clockToDataOutMinus2_RoP; /* RoP right of point (measured in ns)*/
unsigned int clockToDataOutMinus2_RoP; /* RoP right of point (measured in ns) */
unsigned int minimumCycleTimeAtMaxCasLatancy_LoP; /* LoP left of point (measured in ns) */
unsigned int minimumCycleTimeAtMaxCasLatancy_RoP; /* RoP right of point (measured in ns)*/
unsigned int minimumCycleTimeAtMaxCasLatancy_RoP; /* RoP right of point (measured in ns) */
unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_LoP; /* LoP left of point (measured in ns) */
unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_RoP; /* RoP right of point (measured in ns)*/
unsigned int minimumCycleTimeAtMaxCasLatancyMinus1_RoP; /* RoP right of point (measured in ns) */
unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_LoP; /* LoP left of point (measured in ns) */
unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_RoP; /* RoP right of point (measured in ns)*/
unsigned int minimumCycleTimeAtMaxCasLatancyMinus2_RoP; /* RoP right of point (measured in ns) */
/* Parameters calculated from
the extracted DIMM information */

418
board/esteem192e/flash.c
View file

@ -38,49 +38,49 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
* Functions
*/
ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info);
ulong flash_get_size (volatile FLASH_WORD_SIZE * addr, flash_info_t * info);
#ifndef CONFIG_FLASH_16BIT
static int write_word (flash_info_t *info, ulong dest, ulong data);
static int write_word (flash_info_t * info, ulong dest, ulong data);
#else
static int write_short (flash_info_t *info, ulong dest, ushort data);
static int write_short (flash_info_t * info, ulong dest, ushort data);
#endif
/*int flash_write (uchar *, ulong, ulong); */
/*flash_info_t *addr2info (ulong); */
static void flash_get_offsets (ulong base, flash_info_t *info);
static void flash_get_offsets (ulong base, flash_info_t * info);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size_b0, size_b1;
int i;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE0_PRELIM,
&flash_info[0]);
size_b0 =
flash_get_size ((volatile FLASH_WORD_SIZE *)
FLASH_BASE0_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0<<20);
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size_b0, size_b0 << 20);
}
size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE1_PRELIM,
&flash_info[1]);
size_b1 =
flash_get_size ((volatile FLASH_WORD_SIZE *)
FLASH_BASE1_PRELIM, &flash_info[1]);
if (size_b1 > size_b0) {
printf ("## ERROR: "
"Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
size_b1, size_b1<<20,
size_b0, size_b0<<20
);
size_b1, size_b1 << 20, size_b0, size_b0 << 20);
flash_info[0].flash_id = FLASH_UNKNOWN;
flash_info[1].flash_id = FLASH_UNKNOWN;
flash_info[0].sector_count = -1;
@ -92,40 +92,44 @@ unsigned long flash_init (void)
/* Remap FLASH according to real size */
memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
memctl->memc_br0 = CFG_FLASH_BASE | 0x00000801; /* (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;*/
memctl->memc_br0 = CFG_FLASH_BASE | 0x00000801; /* (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; */
/* Re-do sizing to get full correct info */
size_b0 = flash_get_size((volatile FLASH_WORD_SIZE *)CFG_FLASH_BASE,
size_b0 = flash_get_size ((volatile FLASH_WORD_SIZE *) CFG_FLASH_BASE,
&flash_info[0]);
flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
/* monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
(void) flash_protect (FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE+monitor_flash_len-1,
CFG_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[0]);
#endif
if (size_b1) {
memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
memctl->memc_br1 = (CFG_FLASH_BASE | 0x00000801) + (size_b0 & BR_BA_MSK);
memctl->memc_or1 =
CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000);
memctl->memc_br1 =
(CFG_FLASH_BASE | 0x00000801) + (size_b0 & BR_BA_MSK);
/*((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) |
BR_MS_GPCM | BR_V;*/
BR_MS_GPCM | BR_V; */
/* Re-do sizing to get full correct info */
size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)(CFG_FLASH_BASE + size_b0),
size_b1 =
flash_get_size ((volatile FLASH_WORD_SIZE
*) (CFG_FLASH_BASE + size_b0),
&flash_info[1]);
flash_get_offsets (CFG_FLASH_BASE + size_b0, &flash_info[1]);
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
/* monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
(void) flash_protect (FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE+monitor_flash_len-1,
&flash_info[1]);
CFG_MONITOR_BASE + monitor_flash_len -
1, &flash_info[1]);
#endif
} else {
memctl->memc_br1 = 0; /* invalidate bank */
@ -142,7 +146,7 @@ unsigned long flash_init (void)
/*-----------------------------------------------------------------------
*/
static void flash_get_offsets (ulong base, flash_info_t *info)
static void flash_get_offsets (ulong base, flash_info_t * info)
{
int i;
@ -161,17 +165,18 @@ static void flash_get_offsets (ulong base, flash_info_t *info)
info->start[6] = base + 0x00018000;
info->start[7] = base + 0x0001C000;
for (i = 8; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00020000) - 0x000E0000;
info->start[i] =
base + (i * 0x00020000) - 0x000E0000;
}
}
else {
} else {
/* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00008000;
info->start[2] = base + 0x0000C000;
info->start[3] = base + 0x00010000;
for (i = 4; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00020000) - 0x00060000;
info->start[i] =
base + (i * 0x00020000) - 0x00060000;
}
}
#else
@ -185,17 +190,18 @@ static void flash_get_offsets (ulong base, flash_info_t *info)
info->start[6] = base + 0x0000C000;
info->start[7] = base + 0x0000E000;
for (i = 8; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00010000) - 0x00070000;
info->start[i] =
base + (i * 0x00010000) - 0x00070000;
}
}
else {
} else {
/* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00004000;
info->start[2] = base + 0x00006000;
info->start[3] = base + 0x00008000;
for (i = 4; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00010000) - 0x00030000;
info->start[i] =
base + (i * 0x00010000) - 0x00030000;
}
}
#endif
@ -254,12 +260,12 @@ static void flash_get_offsets (ulong base, flash_info_t *info)
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t *info)
void flash_print_info (flash_info_t * info)
{
int i;
uchar *boottype;
uchar botboot[]=", bottom boot sect)\n";
uchar topboot[]=", top boot sector)\n";
uchar botboot[] = ", bottom boot sect)\n";
uchar topboot[] = ", top boot sector)\n";
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
@ -267,59 +273,88 @@ void flash_print_info (flash_info_t *info)
}
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_AMD: printf ("AMD "); break;
case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
case FLASH_MAN_SST: printf ("SST "); break;
case FLASH_MAN_STM: printf ("STM "); break;
case FLASH_MAN_INTEL: printf ("INTEL "); break;
default: printf ("Unknown Vendor "); break;
case FLASH_MAN_AMD:
printf ("AMD ");
break;
case FLASH_MAN_FUJ:
printf ("FUJITSU ");
break;
case FLASH_MAN_SST:
printf ("SST ");
break;
case FLASH_MAN_STM:
printf ("STM ");
break;
case FLASH_MAN_INTEL:
printf ("INTEL ");
break;
default:
printf ("Unknown Vendor ");
break;
}
if (info->flash_id & 0x0001 ) {
if (info->flash_id & 0x0001) {
boottype = botboot;
} else {
boottype = topboot;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case FLASH_AM400B: printf ("AM29LV400B (4 Mbit%s",boottype);
case FLASH_AM400B:
printf ("AM29LV400B (4 Mbit%s", boottype);
break;
case FLASH_AM400T: printf ("AM29LV400T (4 Mbit%s",boottype);
case FLASH_AM400T:
printf ("AM29LV400T (4 Mbit%s", boottype);
break;
case FLASH_AM800B: printf ("AM29LV800B (8 Mbit%s",boottype);
case FLASH_AM800B:
printf ("AM29LV800B (8 Mbit%s", boottype);
break;
case FLASH_AM800T: printf ("AM29LV800T (8 Mbit%s",boottype);
case FLASH_AM800T:
printf ("AM29LV800T (8 Mbit%s", boottype);
break;
case FLASH_AM160B: printf ("AM29LV160B (16 Mbit%s",boottype);
case FLASH_AM160B:
printf ("AM29LV160B (16 Mbit%s", boottype);
break;
case FLASH_AM160T: printf ("AM29LV160T (16 Mbit%s",boottype);
case FLASH_AM160T:
printf ("AM29LV160T (16 Mbit%s", boottype);
break;
case FLASH_AM320B: printf ("AM29LV320B (32 Mbit%s",boottype);
case FLASH_AM320B:
printf ("AM29LV320B (32 Mbit%s", boottype);
break;
case FLASH_AM320T: printf ("AM29LV320T (32 Mbit%s",boottype);
case FLASH_AM320T:
printf ("AM29LV320T (32 Mbit%s", boottype);
break;
case FLASH_INTEL800B: printf ("INTEL28F800B (8 Mbit%s",boottype);
case FLASH_INTEL800B:
printf ("INTEL28F800B (8 Mbit%s", boottype);
break;
case FLASH_INTEL800T: printf ("INTEL28F800T (8 Mbit%s",boottype);
case FLASH_INTEL800T:
printf ("INTEL28F800T (8 Mbit%s", boottype);
break;
case FLASH_INTEL160B: printf ("INTEL28F160B (16 Mbit%s",boottype);
case FLASH_INTEL160B:
printf ("INTEL28F160B (16 Mbit%s", boottype);
break;
case FLASH_INTEL160T: printf ("INTEL28F160T (16 Mbit%s",boottype);
case FLASH_INTEL160T:
printf ("INTEL28F160T (16 Mbit%s", boottype);
break;
case FLASH_INTEL320B: printf ("INTEL28F320B (32 Mbit%s",boottype);
case FLASH_INTEL320B:
printf ("INTEL28F320B (32 Mbit%s", boottype);
break;
case FLASH_INTEL320T: printf ("INTEL28F320T (32 Mbit%s",boottype);
case FLASH_INTEL320T:
printf ("INTEL28F320T (32 Mbit%s", boottype);
break;
#if 0 /* enable when devices are available */
case FLASH_INTEL640B: printf ("INTEL28F640B (64 Mbit%s",boottype);
case FLASH_INTEL640B:
printf ("INTEL28F640B (64 Mbit%s", boottype);
break;
case FLASH_INTEL640T: printf ("INTEL28F640T (64 Mbit%s",boottype);
case FLASH_INTEL640T:
printf ("INTEL28F640T (64 Mbit%s", boottype);
break;
#endif
default: printf ("Unknown Chip Type\n");
default:
printf ("Unknown Chip Type\n");
break;
}
@ -327,13 +362,11 @@ void flash_print_info (flash_info_t *info)
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
for (i = 0; i < info->sector_count; ++i) {
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i],
info->protect[i] ? " (RO)" : " "
);
info->start[i], info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
return;
@ -349,10 +382,10 @@ void flash_print_info (flash_info_t *info)
/*
* The following code cannot be run from FLASH!
*/
ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
ulong flash_get_size (volatile FLASH_WORD_SIZE * addr, flash_info_t * info)
{
short i;
ulong base = (ulong)addr;
ulong base = (ulong) addr;
FLASH_WORD_SIZE value;
/* Write auto select command: read Manufacturer ID */
@ -367,7 +400,7 @@ ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
*/
addr[0x0000] = 0x00900090;
if(addr[0x0000] != 0x00890089){
if (addr[0x0000] != 0x00890089) {
addr[0x0555] = 0x00AA00AA;
addr[0x02AA] = 0x00550055;
addr[0x0555] = 0x00900090;
@ -381,7 +414,7 @@ ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
addr[0x0000] = 0x0090;
if(addr[0x0000] != 0x0089){
if (addr[0x0000] != 0x0089) {
addr[0x0555] = 0x00AA;
addr[0x02AA] = 0x0055;
addr[0x0555] = 0x0090;
@ -536,17 +569,18 @@ ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
info->start[6] = base + 0x00018000;
info->start[7] = base + 0x0001C000;
for (i = 8; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00020000) - 0x000E0000;
info->start[i] =
base + (i * 0x00020000) - 0x000E0000;
}
}
else {
} else {
/* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00008000;
info->start[2] = base + 0x0000C000;
info->start[3] = base + 0x00010000;
for (i = 4; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00020000) - 0x00060000;
info->start[i] =
base + (i * 0x00020000) - 0x00060000;
}
}
#else
@ -560,17 +594,18 @@ ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
info->start[6] = base + 0x0000C000;
info->start[7] = base + 0x0000E000;
for (i = 8; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00010000) - 0x00070000;
info->start[i] =
base + (i * 0x00010000) - 0x00070000;
}
}
else {
} else {
/* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000;
info->start[1] = base + 0x00004000;
info->start[2] = base + 0x00006000;
info->start[3] = base + 0x00008000;
for (i = 4; i < info->sector_count; i++) {
info->start[i] = base + (i * 0x00010000) - 0x00030000;
info->start[i] =
base + (i * 0x00010000) - 0x00030000;
}
}
#endif
@ -628,7 +663,7 @@ ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
for (i = 0; i < info->sector_count; i++) {
/* read sector protection at sector address, (A7 .. A0) = 0x02 */
/* D0 = 1 if protected */
addr = (volatile FLASH_WORD_SIZE *)(info->start[i]);
addr = (volatile FLASH_WORD_SIZE *) (info->start[i]);
info->protect[i] = addr[2] & 1;
}
@ -636,8 +671,8 @@ ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
* Prevent writes to uninitialized FLASH.
*/
if (info->flash_id != FLASH_UNKNOWN) {
addr = (volatile FLASH_WORD_SIZE *)info->start[0];
if( (info->flash_id & 0xFF00) == FLASH_MAN_INTEL){
addr = (volatile FLASH_WORD_SIZE *) info->start[0];
if ((info->flash_id & 0xFF00) == FLASH_MAN_INTEL) {
*addr = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
} else {
*addr = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
@ -651,10 +686,11 @@ ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t *info, int s_first, int s_last)
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
volatile FLASH_WORD_SIZE *addr=(volatile FLASH_WORD_SIZE*)(info->start[0]);
volatile FLASH_WORD_SIZE *addr =
(volatile FLASH_WORD_SIZE *) (info->start[0]);
int flag, prot, sect, l_sect, barf;
ulong start, now, last;
int rcode = 0;
@ -670,21 +706,20 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
if ((info->flash_id == FLASH_UNKNOWN) ||
((info->flash_id > FLASH_AMD_COMP) &&
( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){
((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL))) {
printf ("Can't erase unknown flash type - aborted\n");
return 1;
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
printf ("- Warning: %d protected sectors will not be erased!\n", prot);
} else {
printf ("\n");
}
@ -692,8 +727,8 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
l_sect = -1;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
if(info->flash_id < FLASH_AMD_COMP) {
flag = disable_interrupts ();
if (info->flash_id < FLASH_AMD_COMP) {
#ifndef CONFIG_FLASH_16BIT
addr[0x0555] = 0x00AA00AA;
addr[0x02AA] = 0x00550055;
@ -708,9 +743,9 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
addr[0x02AA] = 0x0055;
#endif
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last; sect++) {
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
addr = (volatile FLASH_WORD_SIZE *)(info->start[sect]);
addr = (volatile FLASH_WORD_SIZE *) (info->start[sect]);
addr[0] = (0x00300030 & FLASH_ID_MASK);
l_sect = sect;
}
@ -718,7 +753,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
enable_interrupts ();
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
@ -731,11 +766,10 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
start = get_timer (0);
last = start;
addr = (volatile FLASH_WORD_SIZE*)(info->start[l_sect]);
while ((addr[0] & (0x00800080&FLASH_ID_MASK)) !=
(0x00800080&FLASH_ID_MASK) )
{
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
addr = (volatile FLASH_WORD_SIZE *) (info->start[l_sect]);
while ((addr[0] & (0x00800080 & FLASH_ID_MASK)) !=
(0x00800080 & FLASH_ID_MASK)) {
if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@ -746,50 +780,53 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
}
}
DONE:
DONE:
/* reset to read mode */
addr = (volatile FLASH_WORD_SIZE *)info->start[0];
addr = (volatile FLASH_WORD_SIZE *) info->start[0];
addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
} else {
for (sect = s_first; sect<=s_last; sect++) {
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
barf = 0;
#ifndef CONFIG_FLASH_16BIT
addr = (vu_long*)(info->start[sect]);
addr = (vu_long *) (info->start[sect]);
addr[0] = 0x00200020;
addr[0] = 0x00D000D0;
while(!(addr[0] & 0x00800080)); /* wait for error or finish */
if( addr[0] & 0x003A003A) { /* check for error */
while (!(addr[0] & 0x00800080)); /* wait for error or finish */
if (addr[0] & 0x003A003A) { /* check for error */
barf = addr[0] & 0x003A0000;
if( barf ) {
barf >>=16;
if (barf) {
barf >>= 16;
} else {
barf = addr[0] & 0x0000003A;
}
}
#else
addr = (vu_short*)(info->start[sect]);
addr = (vu_short *) (info->start[sect]);
addr[0] = 0x0020;
addr[0] = 0x00D0;
while(!(addr[0] & 0x0080)); /* wait for error or finish */
if( addr[0] & 0x003A) /* check for error */
while (!(addr[0] & 0x0080)); /* wait for error or finish */
if (addr[0] & 0x003A) /* check for error */
barf = addr[0] & 0x003A;
#endif
if(barf) {
printf("\nFlash error in sector at %lx\n",(unsigned long)addr);
if(barf & 0x0002) printf("Block locked, not erased.\n");
if((barf & 0x0030) == 0x0030)
printf("Command Sequence error.\n");
if((barf & 0x0030) == 0x0020)
printf("Block Erase error.\n");
if(barf & 0x0008) printf("Vpp Low error.\n");
if (barf) {
printf ("\nFlash error in sector at %lx\n", (unsigned long) addr);
if (barf & 0x0002)
printf ("Block locked, not erased.\n");
if ((barf & 0x0030) == 0x0030)
printf ("Command Sequence error.\n");
if ((barf & 0x0030) == 0x0020)
printf ("Block Erase error.\n");
if (barf & 0x0008)
printf ("Vpp Low error.\n");
rcode = 1;
} else printf(".");
} else
printf (".");
l_sect = sect;
}
addr = (volatile FLASH_WORD_SIZE *)info->start[0];
addr = (volatile FLASH_WORD_SIZE *) info->start[0];
addr[0] = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
}
@ -809,7 +846,7 @@ DONE:
* 2 - Flash not erased
*/
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
#ifndef CONFIG_FLASH_16BIT
ulong cp, wp, data;
@ -830,19 +867,19 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
for (i = 0, cp = wp; i < l; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
for (; i<4 && cnt>0; ++i) {
for (; i < 4 && cnt > 0; ++i) {
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt==0 && i<4; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
for (; cnt == 0 && i < 4; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
if ((rc = write_word(info, wp, data)) != 0) {
if ((rc = write_word (info, wp, data)) != 0) {
return (rc);
}
wp += 4;
@ -853,10 +890,10 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
*/
while (cnt >= 4) {
data = 0;
for (i=0; i<4; ++i) {
for (i = 0; i < 4; ++i) {
data = (data << 8) | *src++;
}
if ((rc = write_word(info, wp, data)) != 0) {
if ((rc = write_word (info, wp, data)) != 0) {
return (rc);
}
wp += 4;
@ -871,15 +908,15 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; i<4; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
for (; i < 4; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
return (write_word(info, wp, data));
return (write_word (info, wp, data));
#else
wp = (addr & ~1); /* get lower word aligned address */
@ -891,7 +928,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
data = 0;
data = (data << 8) | *src++;
--cnt;
if ((rc = write_short(info, wp, data)) != 0) {
if ((rc = write_short (info, wp, data)) != 0) {
return (rc);
}
wp += 2;
@ -903,7 +940,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
/* l = 0; used for debuging */
while (cnt >= 2) {
data = 0;
for (i=0; i<2; ++i) {
for (i = 0; i < 2; ++i) {
data = (data << 8) | *src++;
}
@ -912,7 +949,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
l = 1;
} used for debuging */
if ((rc = write_short(info, wp, data)) != 0) {
if ((rc = write_short (info, wp, data)) != 0) {
return (rc);
}
wp += 2;
@ -927,15 +964,15 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; i<2; ++i, ++cp) {
data = (data << 8) | (*(uchar *)cp);
for (; i < 2; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
return (write_short(info, wp, data));
return (write_short (info, wp, data));
#endif
@ -948,22 +985,22 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
* 2 - Flash not erased
*/
#ifndef CONFIG_FLASH_16BIT
static int write_word (flash_info_t *info, ulong dest, ulong data)
static int write_word (flash_info_t * info, ulong dest, ulong data)
{
vu_long *addr = (vu_long*)(info->start[0]);
ulong start,barf;
vu_long *addr = (vu_long *) (info->start[0]);
ulong start, barf;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*((vu_long *)dest) & data) != data) {
if ((*((vu_long *) dest) & data) != data) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
flag = disable_interrupts ();
if(info->flash_id > FLASH_AMD_COMP) {
if (info->flash_id > FLASH_AMD_COMP) {
/* AMD stuff */
addr[0x0555] = 0x00AA00AA;
addr[0x02AA] = 0x00550055;
@ -972,42 +1009,46 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
/* intel stuff */
*addr = 0x00400040;
}
*((vu_long *)dest) = data;
*((vu_long *) dest) = data;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
enable_interrupts ();
/* data polling for D7 */
start = get_timer (0);
if(info->flash_id > FLASH_AMD_COMP) {
if (info->flash_id > FLASH_AMD_COMP) {
while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
while ((*((vu_long *) dest) & 0x00800080) !=
(data & 0x00800080)) {
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
}
} else {
while(!(addr[0] & 0x00800080)){ /* wait for error or finish */
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
while (!(addr[0] & 0x00800080)) { /* wait for error or finish */
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
if( addr[0] & 0x003A003A) { /* check for error */
if (addr[0] & 0x003A003A) { /* check for error */
barf = addr[0] & 0x003A0000;
if( barf ) {
barf >>=16;
if (barf) {
barf >>= 16;
} else {
barf = addr[0] & 0x0000003A;
}
printf("\nFlash write error at address %lx\n",(unsigned long)dest);
if(barf & 0x0002) printf("Block locked, not erased.\n");
if(barf & 0x0010) printf("Programming error.\n");
if(barf & 0x0008) printf("Vpp Low error.\n");
return(2);
printf ("\nFlash write error at address %lx\n", (unsigned long) dest);
if (barf & 0x0002)
printf ("Block locked, not erased.\n");
if (barf & 0x0010)
printf ("Programming error.\n");
if (barf & 0x0008)
printf ("Vpp Low error.\n");
return (2);
}
@ -1015,25 +1056,25 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
return (0);
}
}
#else
static int write_short (flash_info_t *info, ulong dest, ushort data)
static int write_short (flash_info_t * info, ulong dest, ushort data)
{
vu_short *addr = (vu_short*)(info->start[0]);
ulong start,barf;
vu_short *addr = (vu_short *) (info->start[0]);
ulong start, barf;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*((vu_short *)dest) & data) != data) {
if ((*((vu_short *) dest) & data) != data) {
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
flag = disable_interrupts ();
if(info->flash_id < FLASH_AMD_COMP) {
if (info->flash_id < FLASH_AMD_COMP) {
/* AMD stuff */
addr[0x0555] = 0x00AA;
addr[0x02AA] = 0x0055;
@ -1043,53 +1084,52 @@ static int write_short (flash_info_t *info, ulong dest, ushort data)
*addr = 0x00D0;
*addr = 0x0040;
}
*((vu_short *)dest) = data;
*((vu_short *) dest) = data;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
enable_interrupts ();
/* data polling for D7 */
start = get_timer (0);
if(info->flash_id < FLASH_AMD_COMP) {
if (info->flash_id < FLASH_AMD_COMP) {
/* AMD stuff */
while ((*((vu_short *)dest) & 0x0080) != (data & 0x0080)) {
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
while ((*((vu_short *) dest) & 0x0080) != (data & 0x0080)) {
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
return (1);
}
}
} else {
/* intel stuff */
while(!(addr[0] & 0x0080)){ /* wait for error or finish */
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
while (!(addr[0] & 0x0080)) { /* wait for error or finish */
if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
return (1);
}
if( addr[0] & 0x003A) { /* check for error */
if (addr[0] & 0x003A) { /* check for error */
barf = addr[0] & 0x003A;
printf("\nFlash write error at address %lx\n",(unsigned long)dest);
if(barf & 0x0002) printf("Block locked, not erased.\n");
if(barf & 0x0010) printf("Programming error.\n");
if(barf & 0x0008) printf("Vpp Low error.\n");
return(2);
printf ("\nFlash write error at address %lx\n",
(unsigned long) dest);
if (barf & 0x0002)
printf ("Block locked, not erased.\n");
if (barf & 0x0010)
printf ("Programming error.\n");
if (barf & 0x0008)
printf ("Vpp Low error.\n");
return (2);
}
*addr = 0x00B0;
*addr = 0x0070;
while(!(addr[0] & 0x0080)){ /* wait for error or finish */
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) return (1);
while (!(addr[0] & 0x0080)) { /* wait for error or finish */
if (get_timer (start) > CFG_FLASH_WRITE_TOUT)
return (1);
}
*addr = 0x00FF;
}
return (0);
}
#endif
/*-----------------------------------------------------------------------
*/
/*-----------------------------------------------------------------------*/

2
board/gen860t/README
View file

@ -142,5 +142,3 @@ Sr. Staff Engineer
Microvision, Inc.
<keith_outwater@mvis.com>
<outwater@eskimo.com>
vim: set ts=4 sw=4 tw=78:

98
board/gen860t/beeper.c
View file

@ -34,7 +34,6 @@
* drives the amplifier input.
*/
/*
* Initialize beeper-related hardware. Initialize timer 1 for use with
* the beeper. Use 66 Mhz internal clock with prescale of 33 to get
@ -42,10 +41,9 @@
* FIXME: we should really compute the prescale based on the reported
* core clock frequency.
*/
void
init_beeper(void)
void init_beeper (void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
immap->im_cpmtimer.cpmt_tgcr &= ~TGCR_RST1 | TGCR_STP1;
immap->im_cpmtimer.cpmt_tmr1 = ((33 << TMR_PS_SHIFT) & TMR_PS_MSK)
@ -55,53 +53,47 @@ init_beeper(void)
immap->im_cpmtimer.cpmt_tgcr |= TGCR_RST1;
}
/*
* Set beeper frequency. Max allowed frequency is 2.5 KHz. This limit
* is mostly arbitrary, but the beeper isn't really much good beyond this
* frequency.
*/
void
set_beeper_frequency(uint frequency)
void set_beeper_frequency (uint frequency)
{
#define FREQ_LIMIT 2500
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
/*
* Compute timer ticks given desired frequency. The timer is set up
* to count 0.5 uS per tick and it takes two ticks per cycle (Hz).
*/
if (frequency > FREQ_LIMIT) frequency = FREQ_LIMIT;
frequency = 1000000/frequency;
immap->im_cpmtimer.cpmt_trr1 = (ushort)frequency;
if (frequency > FREQ_LIMIT)
frequency = FREQ_LIMIT;
frequency = 1000000 / frequency;
immap->im_cpmtimer.cpmt_trr1 = (ushort) frequency;
}
/*
* Turn the beeper on
*/
void
beeper_on(void)
void beeper_on (void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
immap->im_cpmtimer.cpmt_tgcr &= ~TGCR_STP1;
}
/*
* Turn the beeper off
*/
void
beeper_off(void)
void beeper_off (void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
immap->im_cpmtimer.cpmt_tgcr |= TGCR_STP1;
}
/*
* Increase or decrease the beeper volume. Volume can be set
* from off to full in 64 steps. To increase volume, the output
@ -110,31 +102,28 @@ beeper_off(void)
* change pin mode to tristate) then output a high to go back to
* tristate.
*/
void
set_beeper_volume(int steps)
void set_beeper_volume (int steps)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
int i;
if (steps >= 0) {
for (i = 0; i < (steps >= 64 ? 64 : steps); i++) {
immap->im_cpm.cp_pbodr &= ~(0x80000000 >> 19);
udelay(1);
udelay (1);
immap->im_cpm.cp_pbodr |= (0x80000000 >> 19);
udelay(1);
udelay (1);
}
}
else {
} else {
for (i = 0; i > (steps <= -64 ? -64 : steps); i--) {
immap->im_cpm.cp_pbdat &= ~(0x80000000 >> 19);
udelay(1);
udelay (1);
immap->im_cpm.cp_pbdat |= (0x80000000 >> 19);
udelay(1);
udelay (1);
}
}
}
/*
* Check the environment to see if the beeper needs beeping.
* Controlled by a sequence of the form:
@ -146,24 +135,23 @@ set_beeper_volume(int steps)
*
* Return 1 on success, 0 on failure
*/
int
do_beeper(char *sequence)
int do_beeper (char *sequence)
{
#define DELIMITER ';'
int args[4];
int i;
int val;
char *p = sequence;
char *tp;
int args[4];
int i;
int val;
char *p = sequence;
char *tp;
/*
* Parse the control sequence. This is a really simple parser
* without any real error checking. You can probably blow it
* up really easily.
*/
if (*p == '\0' || !isdigit(*p)) {
printf("%s:%d: null or invalid string (%s)\n",
if (*p == '\0' || !isdigit (*p)) {
printf ("%s:%d: null or invalid string (%s)\n",
__FILE__, __LINE__, p);
return 0;
}
@ -171,14 +159,14 @@ char *tp;
i = 0;
while (*p != '\0') {
while (*p != DELIMITER) {
if (i > 3) i = 0;
val = (int) simple_strtol(p, &tp, 0);
if (i > 3)
i = 0;
val = (int) simple_strtol (p, &tp, 0);
if (tp == p) {
printf("%s:%d: no digits or bad format\n",
__FILE__,__LINE__);
printf ("%s:%d: no digits or bad format\n",
__FILE__, __LINE__);
return 0;
}
else {
} else {
args[i] = val;
}
@ -195,19 +183,17 @@ char *tp;
*/
#if 0
for (i = 0; i < 4; i++) {
printf("%s:%d:arg %d = %d\n", __FILE__, __LINE__, i, args[i]);
printf ("%s:%d:arg %d = %d\n", __FILE__, __LINE__, i,
args[i]);
}
printf("\n");
printf ("\n");
#endif
set_beeper_frequency(args[0]);
set_beeper_volume(args[1]);
beeper_on();
udelay(1000 * args[2]);
beeper_off();
udelay(1000 * args[3]);
set_beeper_frequency (args[0]);
set_beeper_volume (args[1]);
beeper_on ();
udelay (1000 * args[2]);
beeper_off ();
udelay (1000 * args[3]);
}
return 1;
}
/* vim: set ts=4 sw=4 tw=78: */

2
board/gen860t/beeper.h
View file

@ -27,5 +27,3 @@ void beeper_on(void);
void beeper_off(void);
void set_beeper_volume(int steps);
int do_beeper(char *sequence);
/* vim: set ts=4 tw=78 sw=4: */

2
board/gen860t/fpga.c
View file

@ -376,5 +376,3 @@ int fpga_busy_fn (int cookie)
return 0;
}
#endif
/* vim: set ts=4 tw=78 sw=4: */

2
board/gen860t/fpga.h
View file

@ -41,5 +41,3 @@ extern int fpga_busy_fn(int cookie);
extern int fpga_abort_fn(int cookie );
extern int fpga_pre_config_fn(int cookie );
extern int fpga_post_config_fn(int cookie );
/* vim: set ts=4 sw=4 tw=78: */

2
board/gen860t/ioport.h
View file

@ -40,5 +40,3 @@ typedef struct {
} mpc8xx_iop_conf_t;
extern void config_mpc8xx_ioports(volatile immap_t *immr);
/* vim: set ts=4 tw=78 sw=4: */

98
board/mpl/common/kbd.c
View file

@ -197,8 +197,7 @@ int isa_kbd_init(void)
irq_install_handler(25, (interrupt_handler_t *)handle_isa_int, NULL);
isa_irq_install_handler(KBD_INTERRUPT, (interrupt_handler_t *)kbd_interrupt, NULL);
return (1);
}
else {
} else {
printf("%s\n",result);
return (-1);
}
@ -313,106 +312,106 @@ void kbd_set_leds(void)
}
void handle_keyboard_event(unsigned char scancode)
void handle_keyboard_event (unsigned char scancode)
{
unsigned char keycode;
/* Convert scancode to keycode */
PRINTF("scancode %x\n",scancode);
if(scancode==0xe0) {
e0=1; /* special charakters */
PRINTF ("scancode %x\n", scancode);
if (scancode == 0xe0) {
e0 = 1; /* special charakters */
return;
}
if(e0==1) {
e0=0; /* delete flag */
if(!( ((scancode&0x7F)==0x38)|| /* the right ctrl key */
((scancode&0x7F)==0x1D)|| /* the right alt key */
((scancode&0x7F)==0x35)|| /* the right '/' key */
((scancode&0x7F)==0x1C) )) /* the right enter key */
if (e0 == 1) {
e0 = 0; /* delete flag */
if (!(((scancode & 0x7F) == 0x38) || /* the right ctrl key */
((scancode & 0x7F) == 0x1D) || /* the right alt key */
((scancode & 0x7F) == 0x35) || /* the right '/' key */
((scancode & 0x7F) == 0x1C)))
/* the right enter key */
/* we swallow unknown e0 codes */
return;
}
/* special cntrl keys */
switch(scancode)
{
switch (scancode) {
case 0x2A:
case 0x36: /* shift pressed */
shift=1;
shift = 1;
return; /* do nothing else */
case 0xAA:
case 0xB6: /* shift released */
shift=0;
shift = 0;
return; /* do nothing else */
case 0x38: /* alt pressed */
alt=1;
alt = 1;
return; /* do nothing else */
case 0xB8: /* alt released */
alt=0;
alt = 0;
return; /* do nothing else */
case 0x1d: /* ctrl pressed */
ctrl=1;
ctrl = 1;
return; /* do nothing else */
case 0x9d: /* ctrl released */
ctrl=0;
ctrl = 0;
return; /* do nothing else */
case 0x46: /* scrollock pressed */
scroll_lock=~scroll_lock;
kbd_set_leds();
scroll_lock = ~scroll_lock;
kbd_set_leds ();
return; /* do nothing else */
case 0x3A: /* capslock pressed */
caps_lock=~caps_lock;
kbd_set_leds();
caps_lock = ~caps_lock;
kbd_set_leds ();
return;
case 0x45: /* numlock pressed */
num_lock=~num_lock;
kbd_set_leds();
num_lock = ~num_lock;
kbd_set_leds ();
return;
case 0xC6: /* scroll lock released */
case 0xC5: /* num lock released */
case 0xBA: /* caps lock released */
return; /* just swallow */
}
if((scancode&0x80)==0x80) /* key released */
if ((scancode & 0x80) == 0x80) /* key released */
return;
/* now, decide which table we need */
if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */
PRINTF("unkown scancode %X\n",scancode);
if (scancode > (sizeof (kbd_plain_xlate) / sizeof (kbd_plain_xlate[0]))) { /* scancode not in list */
PRINTF ("unkown scancode %X\n", scancode);
return; /* swallow it */
}
/* setup plain code first */
keycode=kbd_plain_xlate[scancode];
if(caps_lock==1) { /* caps_lock is pressed, overwrite plain code */
if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
PRINTF("unkown caps-locked scancode %X\n",scancode);
keycode = kbd_plain_xlate[scancode];
if (caps_lock == 1) { /* caps_lock is pressed, overwrite plain code */
if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) { /* scancode not in list */
PRINTF ("unkown caps-locked scancode %X\n", scancode);
return; /* swallow it */
}
keycode=kbd_shift_xlate[scancode];
if(keycode<'A') { /* we only want the alphas capital */
keycode=kbd_plain_xlate[scancode];
keycode = kbd_shift_xlate[scancode];
if (keycode < 'A') { /* we only want the alphas capital */
keycode = kbd_plain_xlate[scancode];
}
}
if(shift==1) { /* shift overwrites caps_lock */
if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
PRINTF("unkown shifted scancode %X\n",scancode);
if (shift == 1) { /* shift overwrites caps_lock */
if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) { /* scancode not in list */
PRINTF ("unkown shifted scancode %X\n", scancode);
return; /* swallow it */
}
keycode=kbd_shift_xlate[scancode];
keycode = kbd_shift_xlate[scancode];
}
if(ctrl==1) { /* ctrl overwrites caps_lock and shift */
if(scancode > (sizeof(kbd_ctrl_xlate)/sizeof(kbd_ctrl_xlate[0]))) { /* scancode not in list */
PRINTF("unkown ctrl scancode %X\n",scancode);
if (ctrl == 1) { /* ctrl overwrites caps_lock and shift */
if (scancode > (sizeof (kbd_ctrl_xlate) / sizeof (kbd_ctrl_xlate[0]))) { /* scancode not in list */
PRINTF ("unkown ctrl scancode %X\n", scancode);
return; /* swallow it */
}
keycode=kbd_ctrl_xlate[scancode];
keycode = kbd_ctrl_xlate[scancode];
}
/* check if valid keycode */
if(keycode==0xff) {
PRINTF("unkown scancode %X\n",scancode);
if (keycode == 0xff) {
PRINTF ("unkown scancode %X\n", scancode);
return; /* swallow unknown codes */
}
kbd_put_queue(keycode);
PRINTF("%x\n",keycode);
kbd_put_queue (keycode);
PRINTF ("%x\n", keycode);
}
/*
@ -583,8 +582,7 @@ char * kbd_initialize(void)
status = kbd_wait_for_input();
if (status == KBD_REPLY_ACK)
break;
if (status != KBD_REPLY_RESEND)
{
if (status != KBD_REPLY_RESEND) {
PRINTF("status: %X\n",status);
return "Kbd: reset failed, no ACK";
}

174
board/pcippc2/cpc710_init_ram.c
View file

@ -28,8 +28,7 @@
#include "pcippc2.h"
#include "i2c.h"
typedef struct cpc710_mem_org_s
{
typedef struct cpc710_mem_org_s {
u8 rows;
u8 cols;
u8 banks2;
@ -37,15 +36,11 @@ typedef struct cpc710_mem_org_s
} cpc710_mem_org_t;
static int cpc710_compute_mcer (u32 * mcer,
unsigned long *
size,
unsigned int sdram);
unsigned long *size, unsigned int sdram);
static int cpc710_eeprom_checksum (unsigned int sdram);
static u8 cpc710_eeprom_read (unsigned int sdram,
unsigned int offset);
static u8 cpc710_eeprom_read (unsigned int sdram, unsigned int offset);
static u32 cpc710_mcer_mem [] =
{
static u32 cpc710_mcer_mem[] = {
0x000003f3, /* 18 lines, 4 Mb */
0x000003e3, /* 19 lines, 8 Mb */
0x000003c3, /* 20 lines, 16 Mb */
@ -56,29 +51,28 @@ static u32 cpc710_mcer_mem [] =
0x00000002, /* 25 lines, 512 Mb */
0x00000001 /* 26 lines, 1024 Mb */
};
static cpc710_mem_org_t cpc710_mem_org [] =
{
{ 0x0c, 0x09, 0x02, 0x00 }, /* 0000: 12/ 9/2 */
{ 0x0d, 0x09, 0x02, 0x00 }, /* 0000: 13/ 9/2 */
{ 0x0d, 0x0a, 0x02, 0x00 }, /* 0000: 13/10/2 */
{ 0x0d, 0x0b, 0x02, 0x00 }, /* 0000: 13/11/2 */
{ 0x0d, 0x0c, 0x02, 0x00 }, /* 0000: 13/12/2 */
{ 0x0e, 0x0c, 0x02, 0x00 }, /* 0000: 14/12/2 */
{ 0x0b, 0x08, 0x02, 0x01 }, /* 0001: 11/ 8/2 */
{ 0x0b, 0x09, 0x01, 0x02 }, /* 0010: 11/ 9/1 */
{ 0x0b, 0x0a, 0x01, 0x03 }, /* 0011: 11/10/1 */
{ 0x0c, 0x08, 0x02, 0x04 }, /* 0100: 12/ 8/2 */
{ 0x0c, 0x0a, 0x02, 0x05 }, /* 0101: 12/10/2 */
{ 0x0d, 0x08, 0x01, 0x06 }, /* 0110: 13/ 8/1 */
{ 0x0d, 0x08, 0x02, 0x07 }, /* 0111: 13/ 8/2 */
{ 0x0d, 0x09, 0x01, 0x08 }, /* 1000: 13/ 9/1 */
{ 0x0d, 0x0a, 0x01, 0x09 }, /* 1001: 13/10/1 */
{ 0x0b, 0x08, 0x01, 0x0a }, /* 1010: 11/ 8/1 */
{ 0x0c, 0x08, 0x01, 0x0b }, /* 1011: 12/ 8/1 */
{ 0x0c, 0x09, 0x01, 0x0c }, /* 1100: 12/ 9/1 */
{ 0x0e, 0x09, 0x02, 0x0d }, /* 1101: 14/ 9/2 */
{ 0x0e, 0x0a, 0x02, 0x0e }, /* 1110: 14/10/2 */
{ 0x0e, 0x0b, 0x02, 0x0f } /* 1111: 14/11/2 */
static cpc710_mem_org_t cpc710_mem_org[] = {
{0x0c, 0x09, 0x02, 0x00}, /* 0000: 12/ 9/2 */
{0x0d, 0x09, 0x02, 0x00}, /* 0000: 13/ 9/2 */
{0x0d, 0x0a, 0x02, 0x00}, /* 0000: 13/10/2 */
{0x0d, 0x0b, 0x02, 0x00}, /* 0000: 13/11/2 */
{0x0d, 0x0c, 0x02, 0x00}, /* 0000: 13/12/2 */
{0x0e, 0x0c, 0x02, 0x00}, /* 0000: 14/12/2 */
{0x0b, 0x08, 0x02, 0x01}, /* 0001: 11/ 8/2 */
{0x0b, 0x09, 0x01, 0x02}, /* 0010: 11/ 9/1 */
{0x0b, 0x0a, 0x01, 0x03}, /* 0011: 11/10/1 */
{0x0c, 0x08, 0x02, 0x04}, /* 0100: 12/ 8/2 */
{0x0c, 0x0a, 0x02, 0x05}, /* 0101: 12/10/2 */
{0x0d, 0x08, 0x01, 0x06}, /* 0110: 13/ 8/1 */
{0x0d, 0x08, 0x02, 0x07}, /* 0111: 13/ 8/2 */
{0x0d, 0x09, 0x01, 0x08}, /* 1000: 13/ 9/1 */
{0x0d, 0x0a, 0x01, 0x09}, /* 1001: 13/10/1 */
{0x0b, 0x08, 0x01, 0x0a}, /* 1010: 11/ 8/1 */
{0x0c, 0x08, 0x01, 0x0b}, /* 1011: 12/ 8/1 */
{0x0c, 0x09, 0x01, 0x0c}, /* 1100: 12/ 9/1 */
{0x0e, 0x09, 0x02, 0x0d}, /* 1101: 14/ 9/2 */
{0x0e, 0x0a, 0x02, 0x0e}, /* 1110: 14/10/2 */
{0x0e, 0x0b, 0x02, 0x0f} /* 1111: 14/11/2 */
};
unsigned long cpc710_ram_init (void)
@ -90,54 +84,52 @@ unsigned long cpc710_ram_init (void)
#ifndef CFG_RAMBOOT
/* Clear memory banks
*/
out32(REG(SDRAM0, MCER0), 0);
out32(REG(SDRAM0, MCER1), 0);
out32(REG(SDRAM0, MCER2), 0);
out32(REG(SDRAM0, MCER3), 0);
out32(REG(SDRAM0, MCER4), 0);
out32(REG(SDRAM0, MCER5), 0);
out32(REG(SDRAM0, MCER6), 0);
out32(REG(SDRAM0, MCER7), 0);
iobarrier_rw();
out32 (REG (SDRAM0, MCER0), 0);
out32 (REG (SDRAM0, MCER1), 0);
out32 (REG (SDRAM0, MCER2), 0);
out32 (REG (SDRAM0, MCER3), 0);
out32 (REG (SDRAM0, MCER4), 0);
out32 (REG (SDRAM0, MCER5), 0);
out32 (REG (SDRAM0, MCER6), 0);
out32 (REG (SDRAM0, MCER7), 0);
iobarrier_rw ();
/* Disable memory
*/
out32(REG(SDRAM0,MCCR), 0x13b06000);
iobarrier_rw();
out32 (REG (SDRAM0, MCCR), 0x13b06000);
iobarrier_rw ();
#endif
/* Only the first memory bank is initialised now
*/
if (! cpc710_compute_mcer(& mcer, & bank_size, 0))
{
puts("Unsupported SDRAM type !\n");
hang();
if (!cpc710_compute_mcer (&mcer, &bank_size, 0)) {
puts ("Unsupported SDRAM type !\n");
hang ();
}
memsize += bank_size;
#ifndef CFG_RAMBOOT
/* Enable bank, zero start
*/
out32(REG(SDRAM0, MCER0), mcer | 0x80000000);
iobarrier_rw();
out32 (REG (SDRAM0, MCER0), mcer | 0x80000000);
iobarrier_rw ();
#endif
#ifndef CFG_RAMBOOT
/* Enable memory
*/
out32(REG(SDRAM0, MCCR), in32(REG(SDRAM0, MCCR)) | 0x80000000);
out32 (REG (SDRAM0, MCCR), in32 (REG (SDRAM0, MCCR)) | 0x80000000);
/* Wait until initialisation finished
*/
while (! (in32 (REG(SDRAM0, MCCR)) & 0x20000000))
{
iobarrier_rw();
while (!(in32 (REG (SDRAM0, MCCR)) & 0x20000000)) {
iobarrier_rw ();
}
/* Clear Memory Error Status and Address registers
*/
out32(REG(SDRAM0, MESR), 0);
out32(REG(SDRAM0, MEAR), 0);
iobarrier_rw();
out32 (REG (SDRAM0, MESR), 0);
out32 (REG (SDRAM0, MEAR), 0);
iobarrier_rw ();
/* ECC is not configured now
*/
@ -145,15 +137,12 @@ unsigned long cpc710_ram_init (void)
/* Memory size counter
*/
out32(REG(CPC0, RGBAN1), memsize);
out32 (REG (CPC0, RGBAN1), memsize);
return memsize;
}
static int cpc710_compute_mcer (
u32 * mcer,
unsigned long * size,
unsigned int sdram)
static int cpc710_compute_mcer (u32 * mcer, unsigned long *size, unsigned int sdram)
{
u8 rows;
u8 cols;
@ -161,53 +150,47 @@ static int cpc710_compute_mcer (
unsigned int lines;
u32 mc = 0;
unsigned int i;
cpc710_mem_org_t * org = 0;
cpc710_mem_org_t *org = 0;
if (! i2c_reset())
{
puts("Can't reset I2C!\n");
hang();
if (!i2c_reset ()) {
puts ("Can't reset I2C!\n");
hang ();
}
if (! cpc710_eeprom_checksum(sdram))
{
puts("Invalid EEPROM checksum !\n");
hang();
if (!cpc710_eeprom_checksum (sdram)) {
puts ("Invalid EEPROM checksum !\n");
hang ();
}
rows = cpc710_eeprom_read(sdram, 3);
cols = cpc710_eeprom_read(sdram, 4);
rows = cpc710_eeprom_read (sdram, 3);
cols = cpc710_eeprom_read (sdram, 4);
/* Can be 2 or 4 banks; divide by 2
*/
banks2 = cpc710_eeprom_read(sdram, 17) / 2;
banks2 = cpc710_eeprom_read (sdram, 17) / 2;
lines = rows + cols + banks2;
if (lines < 18 || lines > 26)
{
if (lines < 18 || lines > 26) {
/* Unsupported configuration
*/
return 0;
}
mc |= cpc710_mcer_mem[lines - 18] << 6;
mc |= cpc710_mcer_mem [lines - 18] << 6;
for (i = 0; i < sizeof (cpc710_mem_org) / sizeof (cpc710_mem_org_t);
i++) {
cpc710_mem_org_t *corg = cpc710_mem_org + i;
for (i = 0; i < sizeof(cpc710_mem_org) / sizeof(cpc710_mem_org_t); i++)
{
cpc710_mem_org_t * corg = cpc710_mem_org + i;
if (corg->rows == rows && corg->cols == cols && corg->banks2 == banks2)
{
if (corg->rows == rows && corg->cols == cols
&& corg->banks2 == banks2) {
org = corg;
break;
}
}
if (! org)
{
if (!org) {
/* Unsupported configuration
*/
return 0;
@ -223,31 +206,26 @@ static int cpc710_compute_mcer (
return 1;
}
static int cpc710_eeprom_checksum (
unsigned int sdram)
static int cpc710_eeprom_checksum (unsigned int sdram)
{
u8 sum = 0;
unsigned int i;
for (i = 0; i < 63; i++)
{
sum += cpc710_eeprom_read(sdram, i);
for (i = 0; i < 63; i++) {
sum += cpc710_eeprom_read (sdram, i);
}
return sum == cpc710_eeprom_read(sdram, 63);
return sum == cpc710_eeprom_read (sdram, 63);
}
static u8 cpc710_eeprom_read (
unsigned int sdram,
unsigned int offset)
static u8 cpc710_eeprom_read (unsigned int sdram, unsigned int offset)
{
u8 dev = (sdram << 1) | 0xa0;
u8 data;
if (! i2c_read_byte(& data, dev,offset))
{
puts("I2C error !\n");
hang();
if (!i2c_read_byte (&data, dev, offset)) {
puts ("I2C error !\n");
hang ();
}
return data;

5
board/pcippc2/sconsole.h
View file

@ -26,13 +26,12 @@
#include <config.h>
typedef struct sconsole_buffer_s
{
typedef struct sconsole_buffer_s {
unsigned long size;
unsigned long max_size;
unsigned long pos;
unsigned long baud;
char data [1];
char data[1];
} sconsole_buffer_t;
#define SCONSOLE_BUFFER ((sconsole_buffer_t *) CFG_SCONSOLE_ADDR)

3
board/purple/purple.c
View file

@ -184,8 +184,7 @@ static void copydwords (ulong *source, ulong *destination, ulong nlongs)
ulong temp,temp1;
ulong *dstend = destination + nlongs;
while (destination < dstend)
{
while (destination < dstend) {
temp = *source++;
/* dummy read from sdram */
temp1 = *(ulong *)0xa0000000;

5
board/purple/sconsole.h
View file

@ -26,12 +26,11 @@
#include <config.h>
typedef struct sconsole_buffer_s
{
typedef struct sconsole_buffer_s {
unsigned long size;
unsigned long max_size;
unsigned long pos;
char data [1];
char data[1];
} sconsole_buffer_t;
#define SCONSOLE_BUFFER ((sconsole_buffer_t *) CFG_SCONSOLE_ADDR)

1
board/quantum/fpga.h
View file

@ -31,4 +31,3 @@ int fpga_boot(unsigned char *fpgadata, int size);
#define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */
#define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */
#define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */
/* vim: set ts=4 sw=4 tw=78: */

95
board/snmc/qs860t/flash.c
View file

@ -79,8 +79,7 @@ unsigned long flash_init (void)
}
/* Only one bank */
if (CFG_MAX_FLASH_BANKS == 1)
{
if (CFG_MAX_FLASH_BANKS == 1) {
/* Setup offsets */
flash_get_offsets (FLASH_BASE1_PRELIM, &flash_info[0]);
@ -98,15 +97,11 @@ unsigned long flash_init (void)
#endif
size_b1 = 0 ;
flash_info[0].size = size_b0;
}
/* 2 banks */
else
{
} else { /* 2 banks */
size_b1 = flash_get_size((volatile FLASH_WORD_SIZE *)FLASH_BASE1_PRELIM, &flash_info[1]);
/* Re-do sizing to get full correct info */
if (size_b1)
{
if (size_b1) {
mtdcr(ebccfga, pb0cr);
pbcr = mfdcr(ebccfgd);
mtdcr(ebccfga, pb0cr);
@ -115,8 +110,7 @@ unsigned long flash_init (void)
mtdcr(ebccfgd, pbcr);
}
if (size_b0)
{
if (size_b0) {
mtdcr(ebccfga, pb1cr);
pbcr = mfdcr(ebccfgd);
mtdcr(ebccfga, pb1cr);
@ -613,10 +607,11 @@ ulong flash_get_size (volatile FLASH_WORD_SIZE *addr, flash_info_t *info)
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t *info, int s_first, int s_last)
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
volatile FLASH_WORD_SIZE *addr=(volatile FLASH_WORD_SIZE*)(info->start[0]);
volatile FLASH_WORD_SIZE *addr =
(volatile FLASH_WORD_SIZE *) (info->start[0]);
int flag, prot, sect, l_sect, barf;
ulong start, now, last;
int rcode = 0;
@ -632,21 +627,20 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
if ((info->flash_id == FLASH_UNKNOWN) ||
((info->flash_id > FLASH_AMD_COMP) &&
( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){
((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL))) {
printf ("Can't erase unknown flash type - aborted\n");
return 1;
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
printf ("- Warning: %d protected sectors will not be erased!\n", prot);
} else {
printf ("\n");
}
@ -654,8 +648,8 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
l_sect = -1;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
if(info->flash_id < FLASH_AMD_COMP) {
flag = disable_interrupts ();
if (info->flash_id < FLASH_AMD_COMP) {
#ifndef CFG_FLASH_16BIT
addr[0x0555] = 0x00AA00AA;
addr[0x02AA] = 0x00550055;
@ -670,9 +664,9 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
addr[0x02AA] = 0x0055;
#endif
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last; sect++) {
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
addr = (volatile FLASH_WORD_SIZE *)(info->start[sect]);
addr = (volatile FLASH_WORD_SIZE *) (info->start[sect]);
addr[0] = (0x00300030 & FLASH_ID_MASK);
l_sect = sect;
}
@ -680,7 +674,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
enable_interrupts ();
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
@ -693,11 +687,10 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
start = get_timer (0);
last = start;
addr = (volatile FLASH_WORD_SIZE*)(info->start[l_sect]);
while ((addr[0] & (0x00800080&FLASH_ID_MASK)) !=
(0x00800080&FLASH_ID_MASK) )
{
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
addr = (volatile FLASH_WORD_SIZE *) (info->start[l_sect]);
while ((addr[0] & (0x00800080 & FLASH_ID_MASK)) !=
(0x00800080 & FLASH_ID_MASK)) {
if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@ -708,50 +701,54 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
}
}
DONE:
DONE:
/* reset to read mode */
addr = (volatile FLASH_WORD_SIZE *)info->start[0];
addr = (volatile FLASH_WORD_SIZE *) info->start[0];
addr[0] = (0x00F000F0 & FLASH_ID_MASK); /* reset bank */
} else {
for (sect = s_first; sect<=s_last; sect++) {
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
barf = 0;
#ifndef CFG_FLASH_16BIT
addr = (vu_long*)(info->start[sect]);
addr = (vu_long *) (info->start[sect]);
addr[0] = 0x00200020;
addr[0] = 0x00D000D0;
while(!(addr[0] & 0x00800080)); /* wait for error or finish */
if( addr[0] & 0x003A003A) { /* check for error */
while (!(addr[0] & 0x00800080)); /* wait for error or finish */
if (addr[0] & 0x003A003A) { /* check for error */
barf = addr[0] & 0x003A0000;
if( barf ) {
barf >>=16;
if (barf) {
barf >>= 16;
} else {
barf = addr[0] & 0x0000003A;
}
}
#else
addr = (vu_short*)(info->start[sect]);
addr = (vu_short *) (info->start[sect]);
addr[0] = 0x0020;
addr[0] = 0x00D0;
while(!(addr[0] & 0x0080)); /* wait for error or finish */
if( addr[0] & 0x003A) /* check for error */
while (!(addr[0] & 0x0080)); /* wait for error or finish */
if (addr[0] & 0x003A) /* check for error */
barf = addr[0] & 0x003A;
#endif
if(barf) {
printf("\nFlash error in sector at %lx\n",(unsigned long)addr);
if(barf & 0x0002) printf("Block locked, not erased.\n");
if((barf & 0x0030) == 0x0030)
printf("Command Sequence error.\n");
if((barf & 0x0030) == 0x0020)
printf("Block Erase error.\n");
if(barf & 0x0008) printf("Vpp Low error.\n");
if (barf) {
printf ("\nFlash error in sector at %lx\n",
(unsigned long) addr);
if (barf & 0x0002)
printf ("Block locked, not erased.\n");
if ((barf & 0x0030) == 0x0030)
printf ("Command Sequence error.\n");
if ((barf & 0x0030) == 0x0020)
printf ("Block Erase error.\n");
if (barf & 0x0008)
printf ("Vpp Low error.\n");
rcode = 1;
} else printf(".");
} else
printf (".");
l_sect = sect;
}
addr = (volatile FLASH_WORD_SIZE *)info->start[0];
addr = (volatile FLASH_WORD_SIZE *) info->start[0];
addr[0] = (0x00FF00FF & FLASH_ID_MASK); /* reset bank */
}
@ -1113,8 +1110,6 @@ static int write_short (flash_info_t *info, ulong dest, ushort data)
return (0);
}
#endif
/*-----------------------------------------------------------------------
*/
/*-----------------------------------------------------------------------*/

3
board/trab/tsc2000.h
View file

@ -111,8 +111,7 @@
#define TSC2000_DELAY_BASE 500
#define TSC2000_NO_SENSOR -0x10000
#define ERROR_BATTERY 220 /* must be adjusted, if R68 is changed on
* TRAB */
#define ERROR_BATTERY 220 /* must be adjusted, if R68 is changed on TRAB */
void tsc2000_write(unsigned short, unsigned short);
unsigned short tsc2000_read (unsigned short);

10
common/cmd_fdc.c
View file

@ -46,14 +46,12 @@
#define FALSE 0
#endif
/*#if defined(CONFIG_CMD_DATE) */
/*#include <rtc.h> */
/*#endif */
#if defined(CONFIG_CMD_FDC) || defined(CONFIG_CMD_FDOS)
typedef struct {
int flags; /* connected drives ect */
unsigned long blnr; /* Logical block nr */
@ -61,9 +59,10 @@ typedef struct {
uchar cmdlen; /* cmd length */
uchar cmd[16]; /* cmd desc */
uchar dma; /* if > 0 dma enabled */
uchar result[11];/* status information */
uchar result[11]; /* status information */
uchar resultlen; /* lenght of result */
} FDC_COMMAND_STRUCT;
/* flags: only the lower 8bit used:
* bit 0 if set drive 0 is present
* bit 1 if set drive 1 is present
@ -75,7 +74,6 @@ typedef struct {
* bit 7 if set disk in drive 4 is inserted
*/
/* cmd indexes */
#define COMMAND 0
#define DRIVE 1
@ -158,9 +156,9 @@ typedef struct {
unsigned char gap; /* gap1 size */
unsigned char rate; /* data rate. |= 0x40 for perpendicular */
unsigned char spec1; /* stepping rate, head unload time */
unsigned char fmt_gap; /* gap2 size */
unsigned char fmt_gap;/* gap2 size */
unsigned char hlt; /* head load time */
unsigned char sect_code; /* Sector Size code */
unsigned char sect_code;/* Sector Size code */
const char * name; /* used only for predefined formats */
} FD_GEO_STRUCT;

4
common/command.c
View file

@ -196,9 +196,7 @@ do_test (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
expr = !expr;
#if 0
printf(": returns %d\n", expr);
#endif
debug (": returns %d\n", expr);
return expr;
}

1
common/hush.c
View file

@ -1,4 +1,3 @@
/* vi: set sw=4 ts=4: */
/*
* sh.c -- a prototype Bourne shell grammar parser
* Intended to follow the original Thompson and Ritchie

23
cpu/arm920t/s3c24x0/usb_ohci.h
View file

@ -346,7 +346,7 @@ typedef struct
typedef struct ohci {
struct ohci_hcca *hcca; /* hcca */
/*dma_addr_t hcca_dma;*/
/*dma_addr_t hcca_dma; */
int irq;
int disabled; /* e.g. got a UE, we're hung */
@ -375,9 +375,9 @@ struct ohci_device {
/* hcd */
/* endpoint */
static int ep_link(ohci_t * ohci, ed_t * ed);
static int ep_unlink(ohci_t * ohci, ed_t * ed);
static ed_t * ep_add_ed(struct usb_device * usb_dev, unsigned long pipe);
static int ep_link (ohci_t * ohci, ed_t * ed);
static int ep_unlink (ohci_t * ohci, ed_t * ed);
static ed_t *ep_add_ed (struct usb_device *usb_dev, unsigned long pipe);
/*-------------------------------------------------------------------------*/
@ -385,22 +385,20 @@ static ed_t * ep_add_ed(struct usb_device * usb_dev, unsigned long pipe);
#define NUM_TD 64
/* +1 so we can align the storage */
td_t gtd[NUM_TD+1];
td_t gtd[NUM_TD + 1];
/* pointers to aligned storage */
td_t *ptd;
/* TDs ... */
static inline struct td *
td_alloc (struct usb_device *usb_dev)
static inline struct td *td_alloc (struct usb_device *usb_dev)
{
int i;
struct td *td;
td = NULL;
for (i = 0; i < NUM_TD; i++)
{
if (ptd[i].usb_dev == NULL)
{
for (i = 0; i < NUM_TD; i++) {
if (ptd[i].usb_dev == NULL) {
td = &ptd[i];
td->usb_dev = usb_dev;
break;
@ -410,8 +408,7 @@ td_alloc (struct usb_device *usb_dev)
return td;
}
static inline void
ed_free (struct ed *ed)
static inline void ed_free (struct ed *ed)
{
ed->usb_dev = NULL;
}

53
cpu/arm926ejs/davinci/ether.c
View file

@ -535,39 +535,38 @@ static int tx_send_loop = 0;
* This function sends a single packet on the network and returns
* positive number (number of bytes transmitted) or negative for error
*/
static int dm644x_eth_send_packet(volatile void *packet, int length)
static int dm644x_eth_send_packet (volatile void *packet, int length)
{
int ret_status = -1;
tx_send_loop = 0;
/* Return error if no link */
if (!phy.get_link_speed(active_phy_addr))
{
printf("WARN: emac_send_packet: No link\n");
if (!phy.get_link_speed (active_phy_addr)) {
printf ("WARN: emac_send_packet: No link\n");
return (ret_status);
}
/* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */
if (length < EMAC_MIN_ETHERNET_PKT_SIZE)
{
if (length < EMAC_MIN_ETHERNET_PKT_SIZE) {
length = EMAC_MIN_ETHERNET_PKT_SIZE;
}
/* Populate the TX descriptor */
emac_tx_desc->next = 0;
emac_tx_desc->buffer = (u_int8_t *)packet;
emac_tx_desc->buffer = (u_int8_t *) packet;
emac_tx_desc->buff_off_len = (length & 0xffff);
emac_tx_desc->pkt_flag_len = ((length & 0xffff) |
EMAC_CPPI_SOP_BIT |
EMAC_CPPI_OWNERSHIP_BIT |
EMAC_CPPI_EOP_BIT);
/* Send the packet */
adap_emac->TX0HDP = (unsigned int)emac_tx_desc;
adap_emac->TX0HDP = (unsigned int) emac_tx_desc;
/* Wait for packet to complete or link down */
while (1) {
if (!phy.get_link_speed(active_phy_addr)) {
dm644x_eth_ch_teardown(EMAC_CH_TX);
if (!phy.get_link_speed (active_phy_addr)) {
dm644x_eth_ch_teardown (EMAC_CH_TX);
return (ret_status);
}
if (adap_emac->TXINTSTATRAW & 0x01) {
@ -577,13 +576,13 @@ static int dm644x_eth_send_packet(volatile void *packet, int length)
tx_send_loop++;
}
return(ret_status);
return (ret_status);
}
/*
* This function handles receipt of a packet from the network
*/
static int dm644x_eth_rcv_packet(void)
static int dm644x_eth_rcv_packet (void)
{
volatile emac_desc *rx_curr_desc;
volatile emac_desc *curr_desc;
@ -595,23 +594,26 @@ static int dm644x_eth_rcv_packet(void)
if ((rx_curr_desc) && ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0)) {
if (status & EMAC_CPPI_RX_ERROR_FRAME) {
/* Error in packet - discard it and requeue desc */
printf("WARN: emac_rcv_pkt: Error in packet\n");
printf ("WARN: emac_rcv_pkt: Error in packet\n");
} else {
NetReceive(rx_curr_desc->buffer, (rx_curr_desc->buff_off_len & 0xffff));
NetReceive (rx_curr_desc->buffer,
(rx_curr_desc->buff_off_len & 0xffff));
ret = rx_curr_desc->buff_off_len & 0xffff;
}
/* Ack received packet descriptor */
adap_emac->RX0CP = (unsigned int)rx_curr_desc;
adap_emac->RX0CP = (unsigned int) rx_curr_desc;
curr_desc = rx_curr_desc;
emac_rx_active_head = (volatile emac_desc *)rx_curr_desc->next;
emac_rx_active_head =
(volatile emac_desc *) rx_curr_desc->next;
if (status & EMAC_CPPI_EOQ_BIT) {
if (emac_rx_active_head) {
adap_emac->RX0HDP = (unsigned int)emac_rx_active_head;
adap_emac->RX0HDP =
(unsigned int) emac_rx_active_head;
} else {
emac_rx_queue_active = 0;
printf("INFO:emac_rcv_packet: RX Queue not active\n");
printf ("INFO:emac_rcv_packet: RX Queue not active\n");
}
}
@ -621,28 +623,29 @@ static int dm644x_eth_rcv_packet(void)
rx_curr_desc->next = 0;
if (emac_rx_active_head == 0) {
printf("INFO: emac_rcv_pkt: active queue head = 0\n");
printf ("INFO: emac_rcv_pkt: active queue head = 0\n");
emac_rx_active_head = curr_desc;
emac_rx_active_tail = curr_desc;
if (emac_rx_queue_active != 0) {
adap_emac->RX0HDP = (unsigned int)emac_rx_active_head;
printf("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n");
adap_emac->RX0HDP =
(unsigned int) emac_rx_active_head;
printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n");
emac_rx_queue_active = 1;
}
} else {
tail_desc = emac_rx_active_tail;
emac_rx_active_tail = curr_desc;
tail_desc->next = (unsigned int)curr_desc;
tail_desc->next = (unsigned int) curr_desc;
status = tail_desc->pkt_flag_len;
if (status & EMAC_CPPI_EOQ_BIT) {
adap_emac->RX0HDP = (unsigned int)curr_desc;
adap_emac->RX0HDP = (unsigned int) curr_desc;
status &= ~EMAC_CPPI_EOQ_BIT;
tail_desc->pkt_flag_len = status;
}
}
return(ret);
return (ret);
}
return(0);
return (0);
}
#endif /* CONFIG_CMD_NET */

192
drivers/block/sym53c8xx.c
View file

@ -119,63 +119,146 @@ void handle_scsi_int(void);
/********************************************************************************
* reports SCSI errors to the user
*/
void scsi_print_error(ccb *pccb)
void scsi_print_error (ccb * pccb)
{
int i;
printf("SCSI Error: Target %d LUN %d Command %02X\n",pccb->target, pccb->lun, pccb->cmd[0]);
printf(" CCB: ");
for(i=0;i<pccb->cmdlen;i++)
printf("%02X ",pccb->cmd[i]);
printf("(len=%d)\n",pccb->cmdlen);
printf(" Cntrl: ");
switch(pccb->contr_stat) {
case SIR_COMPLETE: printf("Complete (no Error)\n"); break;
case SIR_SEL_ATN_NO_MSG_OUT: printf("Selected with ATN no MSG out phase\n"); break;
case SIR_CMD_OUT_ILL_PH: printf("Command out illegal phase\n"); break;
case SIR_MSG_RECEIVED: printf("MSG received Error\n"); break;
case SIR_DATA_IN_ERR: printf("Data in Error\n"); break;
case SIR_DATA_OUT_ERR: printf("Data out Error\n"); break;
case SIR_SCRIPT_ERROR: printf("Script Error\n"); break;
case SIR_MSG_OUT_NO_CMD: printf("MSG out no Command phase\n"); break;
case SIR_MSG_OVER7: printf("MSG in over 7 bytes\n"); break;
case INT_ON_FY: printf("Interrupt on fly\n"); break;
case SCSI_SEL_TIME_OUT: printf("SCSI Selection Timeout\n"); break;
case SCSI_HNS_TIME_OUT: printf("SCSI Handshake Timeout\n"); break;
case SCSI_MA_TIME_OUT: printf("SCSI Phase Error\n"); break;
case SCSI_UNEXP_DIS: printf("SCSI unexpected disconnect\n"); break;
default: printf("unknown status %lx\n",pccb->contr_stat); break;
printf ("SCSI Error: Target %d LUN %d Command %02X\n", pccb->target,
pccb->lun, pccb->cmd[0]);
printf (" CCB: ");
for (i = 0; i < pccb->cmdlen; i++)
printf ("%02X ", pccb->cmd[i]);
printf ("(len=%d)\n", pccb->cmdlen);
printf (" Cntrl: ");
switch (pccb->contr_stat) {
case SIR_COMPLETE:
printf ("Complete (no Error)\n");
break;
case SIR_SEL_ATN_NO_MSG_OUT:
printf ("Selected with ATN no MSG out phase\n");
break;
case SIR_CMD_OUT_ILL_PH:
printf ("Command out illegal phase\n");
break;
case SIR_MSG_RECEIVED:
printf ("MSG received Error\n");
break;
case SIR_DATA_IN_ERR:
printf ("Data in Error\n");
break;
case SIR_DATA_OUT_ERR:
printf ("Data out Error\n");
break;
case SIR_SCRIPT_ERROR:
printf ("Script Error\n");
break;
case SIR_MSG_OUT_NO_CMD:
printf ("MSG out no Command phase\n");
break;
case SIR_MSG_OVER7:
printf ("MSG in over 7 bytes\n");
break;
case INT_ON_FY:
printf ("Interrupt on fly\n");
break;
case SCSI_SEL_TIME_OUT:
printf ("SCSI Selection Timeout\n");
break;
case SCSI_HNS_TIME_OUT:
printf ("SCSI Handshake Timeout\n");
break;
case SCSI_MA_TIME_OUT:
printf ("SCSI Phase Error\n");
break;
case SCSI_UNEXP_DIS:
printf ("SCSI unexpected disconnect\n");
break;
default:
printf ("unknown status %lx\n", pccb->contr_stat);
break;
}
printf(" Sense: SK %x (",pccb->sense_buf[2]&0x0f);
switch(pccb->sense_buf[2]&0xf) {
case SENSE_NO_SENSE: printf("No Sense)"); break;
case SENSE_RECOVERED_ERROR: printf("Recovered Error)"); break;
case SENSE_NOT_READY: printf("Not Ready)"); break;
case SENSE_MEDIUM_ERROR: printf("Medium Error)"); break;
case SENSE_HARDWARE_ERROR: printf("Hardware Error)"); break;
case SENSE_ILLEGAL_REQUEST: printf("Illegal request)"); break;
case SENSE_UNIT_ATTENTION: printf("Unit Attention)"); break;
case SENSE_DATA_PROTECT: printf("Data Protect)"); break;
case SENSE_BLANK_CHECK: printf("Blank check)"); break;
case SENSE_VENDOR_SPECIFIC: printf("Vendor specific)"); break;
case SENSE_COPY_ABORTED: printf("Copy aborted)"); break;
case SENSE_ABORTED_COMMAND: printf("Aborted Command)"); break;
case SENSE_VOLUME_OVERFLOW: printf("Volume overflow)"); break;
case SENSE_MISCOMPARE: printf("Misscompare\n"); break;
default: printf("Illegal Sensecode\n"); break;
printf (" Sense: SK %x (", pccb->sense_buf[2] & 0x0f);
switch (pccb->sense_buf[2] & 0xf) {
case SENSE_NO_SENSE:
printf ("No Sense)");
break;
case SENSE_RECOVERED_ERROR:
printf ("Recovered Error)");
break;
case SENSE_NOT_READY:
printf ("Not Ready)");
break;
case SENSE_MEDIUM_ERROR:
printf ("Medium Error)");
break;
case SENSE_HARDWARE_ERROR:
printf ("Hardware Error)");
break;
case SENSE_ILLEGAL_REQUEST:
printf ("Illegal request)");
break;
case SENSE_UNIT_ATTENTION:
printf ("Unit Attention)");
break;
case SENSE_DATA_PROTECT:
printf ("Data Protect)");
break;
case SENSE_BLANK_CHECK:
printf ("Blank check)");
break;
case SENSE_VENDOR_SPECIFIC:
printf ("Vendor specific)");
break;
case SENSE_COPY_ABORTED:
printf ("Copy aborted)");
break;
case SENSE_ABORTED_COMMAND:
printf ("Aborted Command)");
break;
case SENSE_VOLUME_OVERFLOW:
printf ("Volume overflow)");
break;
case SENSE_MISCOMPARE:
printf ("Misscompare\n");
break;
default:
printf ("Illegal Sensecode\n");
break;
}
printf(" ASC %x ASCQ %x\n",pccb->sense_buf[12],pccb->sense_buf[13]);
printf(" Status: ");
switch(pccb->status) {
case S_GOOD : printf("Good\n"); break;
case S_CHECK_COND: printf("Check condition\n"); break;
case S_COND_MET: printf("Condition Met\n"); break;
case S_BUSY: printf("Busy\n"); break;
case S_INT: printf("Intermediate\n"); break;
case S_INT_COND_MET: printf("Intermediate condition met\n"); break;
case S_CONFLICT: printf("Reservation conflict\n"); break;
case S_TERMINATED: printf("Command terminated\n"); break;
case S_QUEUE_FULL: printf("Task set full\n"); break;
default: printf("unknown: %02X\n",pccb->status); break;
printf (" ASC %x ASCQ %x\n", pccb->sense_buf[12],
pccb->sense_buf[13]);
printf (" Status: ");
switch (pccb->status) {
case S_GOOD:
printf ("Good\n");
break;
case S_CHECK_COND:
printf ("Check condition\n");
break;
case S_COND_MET:
printf ("Condition Met\n");
break;
case S_BUSY:
printf ("Busy\n");
break;
case S_INT:
printf ("Intermediate\n");
break;
case S_INT_COND_MET:
printf ("Intermediate condition met\n");
break;
case S_CONFLICT:
printf ("Reservation conflict\n");
break;
case S_TERMINATED:
printf ("Command terminated\n");
break;
case S_QUEUE_FULL:
printf ("Task set full\n");
break;
default:
printf ("unknown: %02X\n", pccb->status);
break;
}
}
@ -252,8 +335,7 @@ void handle_scsi_int(void)
if((stat & DIP)==DIP) { /* DMA Interrupt pending */
stat1=scsi_read_byte(DSTAT);
#ifdef SCSI_SINGLE_STEP
if((stat1 & SSI)==SSI)
{
if((stat1 & SSI)==SSI) {
tt=in32r(scsi_mem_addr+DSP);
if(((tt)>=start_script_select) && ((tt)<start_script_select+len_script_select)) {
printf("select %d\n",(tt-start_script_select)>>2);

3
drivers/net/dc2114x.c
View file

@ -761,8 +761,7 @@ static void update_srom(struct eth_device *dev, bd_t *bis)
eeprom[0x0b] = ((bis->bi_enetaddr[3] & 0xff) << 8) | (bis->bi_enetaddr[2] & 0xff);
eeprom[0x0c] = ((bis->bi_enetaddr[5] & 0xff) << 8) | (bis->bi_enetaddr[4] & 0xff);
for (i=0; i<0x40; i++)
{
for (i=0; i<0x40; i++) {
write_srom(dev, DE4X5_APROM, i, eeprom[i]);
}
}

3
drivers/net/rtl8019.h
View file

@ -30,7 +30,6 @@
#include <asm/types.h>
#include <config.h>
#ifdef CONFIG_DRIVER_RTL8019
#define RTL8019_REG_00 (RTL8019_BASE + 0x00)
@ -94,7 +93,6 @@
#define RTL8019_DMA_DATA RTL8019_REG_10
#define RTL8019_RESET RTL8019_REG_1f
#define RTL8019_PAGE0 0x22
#define RTL8019_PAGE1 0x62
#define RTL8019_PAGE0DMAWRITE 0x12
@ -113,5 +111,4 @@
#define RTL8019_PSTOP 0x80
#define RTL8019_TPSTART 0x40
#endif /*end of CONFIG_DRIVER_RTL8019*/

1
drivers/net/sk98lin/h/skgepnmi.h
View file

@ -1091,7 +1091,6 @@ typedef struct s_PnmiData {
SK_PNMI_VCT_TIMER VctTimeout[SK_MAX_MACS];
} SK_PNMI;
/*
* Function prototypes
*/

3
drivers/net/sk98lin/skgeinit.c
View file

@ -1264,8 +1264,7 @@ int Port) /* Port Index (MAC_1 + n) */
if (pPrt->PRxQSize == SK_MIN_RXQ_SIZE) {
RxQType = SK_RX_SRAM_Q; /* small Rx Queue */
}
else {
} else {
RxQType = SK_RX_BRAM_Q; /* big Rx Queue */
}

9
drivers/net/sk98lin/skproc.c
View file

@ -89,8 +89,7 @@
extern SK_AC *pACList;
extern struct net_device *SkGeRootDev;
extern char * SkNumber(
char * str,
extern char *SkNumber (char *str,
long long num,
int base,
int size,
@ -401,20 +400,20 @@ static long SkDoDiv (long long Dividend, int Divisor, long long *pErg)
Akku = Dividend >> 32;
Ergebnis = ((long long) (Akku / Divisor)) << 32;
Rest = Akku % Divisor ;
Rest = Akku % Divisor;
Akku = Rest << 16;
Akku |= ((Dividend & 0xFFFF0000) >> 16);
Ergebnis += ((long long) (Akku / Divisor)) << 16;
Rest = Akku % Divisor ;
Rest = Akku % Divisor;
Akku = Rest << 16;
Akku |= (Dividend & 0xFFFF);
Ergebnis += (Akku / Divisor);
Rest = Akku % Divisor ;
Rest = Akku % Divisor;
*pErg = Ergebnis;
return (Rest);

2
drivers/net/tsec.h
View file

@ -546,7 +546,7 @@ struct tsec_private {
struct phy_cmd {
uint mii_reg;
uint mii_data;
uint (*funct) (uint mii_reg, struct tsec_private* priv);
uint (*funct) (uint mii_reg, struct tsec_private * priv);
};
/* struct phy_info: a structure which defines attributes for a PHY

4
drivers/qe/qe.h
View file

@ -257,9 +257,9 @@ struct qe_firmware {
u8 id[32]; /* Null-terminated identifier */
u32 traps[16]; /* Trap addresses, 0 == ignore */
u32 eccr; /* The value for the ECCR register */
u32 iram_offset; /* Offset into I-RAM for the code */
u32 iram_offset;/* Offset into I-RAM for the code */
u32 count; /* Number of 32-bit words of the code */
u32 code_offset; /* Offset of the actual microcode */
u32 code_offset;/* Offset of the actual microcode */
u8 major; /* The microcode version major */
u8 minor; /* The microcode version minor */
u8 revision; /* The microcode version revision */

1
fs/reiserfs/mode_string.c
View file

@ -1,4 +1,3 @@
/* vi: set sw=4 ts=4: */
/*
* mode_string implementation for busybox
*

1
include/asm-arm/arch-pxa/mmc.h
View file

@ -203,5 +203,4 @@ typedef struct mmc_csd
ecc:2;
} mmc_csd_t;
#endif /* __MMC_PXA_P_H__ */

2
include/configs/CRAYL1.h
View file

@ -137,7 +137,7 @@
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_LOAD_ADDR 0x100000/* where to load what we get from TFTP */
#define CFG_LOAD_ADDR 0x100000 /* where to load what we get from TFTP */
#define CFG_TFTP_LOADADDR CFG_LOAD_ADDR
#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CFG_DRAM_TEST 1

2
include/configs/GEN860T.h
View file

@ -760,5 +760,3 @@
#endif
#endif /* __CONFIG_GEN860T_H */
/* vim: set ts=4 tw=78 ai shiftwidth=4: */

2
include/configs/MVBLUE.h
View file

@ -48,7 +48,7 @@
*(volatile char *)(0xff000003) = ( 3 | (code<<4) ) & 0xf3; \
else \
*(volatile char *)(0xff000003) = ( 1 ); \
} while(0)
} while(0)
#else
#define ERR_LED(code)
#endif

5
include/configs/MVS1.h
View file

@ -46,7 +46,10 @@
#define CONFIG_BAUDRATE 115200 /* console baudrate */
#define CONFIG_BOOTDELAY 5 /* autoboot after this many seconds */
#define CONFIG_PREBOOT "echo;echo To mount root over NFS use \"run bootnet\";echo To mount root from FLASH use \"run bootflash\";echo"
#define CONFIG_PREBOOT "echo;" \
"echo To mount root over NFS use \"run bootnet\";" \
"echo To mount root from FLASH use \"run bootflash\";" \
"echo"
#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw"
#define CONFIG_BOOTCOMMAND \
"bootp; " \

0
include/configs/apollon.h Executable file → Normal file
View file

3
include/configs/bf561-ezkit.h
View file

@ -169,7 +169,6 @@
""
#endif
/*
* BOOTP options
*/
@ -178,7 +177,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -193,7 +191,6 @@
#define CONFIG_CMD_DHCP
#endif
/*
* Console settings
*/

3
include/configs/modnet50.h
View file

@ -90,7 +90,8 @@
/*#define CONFIG_BOOTDELAY 10*/
/* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */
#define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000"
#define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K root=/dev/ram keepinitrd"
#define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K " \
"root=/dev/ram keepinitrd"
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */

2
include/configs/p3mx.h
View file

@ -138,7 +138,7 @@
#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
#if defined (CONFIG_P3M750)
#define CFG_ENV_SECT_SIZE 0x20000 /* one sector (1 device)*/
#define CFG_ENV_SECT_SIZE 0x20000 /* one sector (1 device) */
#elif defined (CONFIG_P3M7448)
#define CFG_ENV_SECT_SIZE 0x40000 /* two sectors (2 devices parallel */
#endif

4
include/configs/sbc2410x.h
View file

@ -106,7 +106,9 @@
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off"
#define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs " \
"nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv " \
"ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off"
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.0.69

8
include/configs/sc520_spunk.h
View file

@ -88,8 +88,12 @@
#define CONFIG_BOOTDELAY 15
#define CONFIG_BOOTARGS "root=/dev/mtdblock1 console=ttyS0,9600 mtdparts=phys:7936k(root),256k(uboot) "
#define CONFIG_BOOTCOMMAND "setenv bootargs root=/dev/nfs ip=autoconf console=ttyS0,9600 mtdparts=phys:7808k(root),128k(env),256k(uboot); bootp; bootm"
#define CONFIG_BOOTARGS "root=/dev/mtdblock1 console=ttyS0,9600 " \
"mtdparts=phys:7936k(root),256k(uboot) "
#define CONFIG_BOOTCOMMAND "setenv bootargs root=/dev/nfs ip=autoconf " \
"console=ttyS0,9600 " \
"mtdparts=phys:7808k(root),128k(env),256k(uboot);" \
"bootp;bootm"
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */

8
include/configs/smdk2400.h
View file

@ -114,17 +114,9 @@
#define CONFIG_BOOTDELAY 3
#if 0
#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600"
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#endif
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 134.98.93.36
#define CONFIG_SERVERIP 134.98.93.22
#if 0
#define CONFIG_BOOTFILE "elinos-lart"
#define CONFIG_BOOTCOMMAND "tftp; bootm"
#endif
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */

2
include/fpga.h
View file

@ -66,7 +66,7 @@ typedef enum { /* typedef fpga_type */
typedef struct { /* typedef fpga_desc */
fpga_type devtype; /* switch value to select sub-functions */
void * devdesc; /* real device descriptor */
void *devdesc; /* real device descriptor */
} fpga_desc; /* end, typedef fpga_desc */

2
include/virtex2.h
View file

@ -116,5 +116,3 @@ typedef struct {
{ Xilinx_Virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie }
#endif /* _VIRTEX2_H_ */
/* vim: set ts=4 tw=78: */

2
include/xilinx.h
View file

@ -75,7 +75,7 @@ typedef struct { /* typedef Xilinx_desc */
Xilinx_Family family; /* part type */
Xilinx_iface iface; /* interface type */
size_t size; /* bytes of data part can accept */
void * iface_fns; /* interface function table */
void *iface_fns; /* interface function table */
int cookie; /* implementation specific cookie */
} Xilinx_desc; /* end, typedef Xilinx_desc */