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rockchip: rk3288: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into common SoC code. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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c8a6bc9683
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5564ed5dd9
3 changed files with 23 additions and 21 deletions
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@ -25,6 +25,13 @@
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#define PERI_HCLK_HZ 148500000
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#define PERI_PCLK_HZ 74250000
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/* Private data for the clock driver - used by rockchip_get_cru() */
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struct rk3288_clk_priv {
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struct rk3288_grf *grf;
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struct rk3288_cru *cru;
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ulong rate;
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};
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struct rk3288_cru {
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struct rk3288_pll {
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u32 con0;
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@ -9,9 +9,25 @@
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#include <dm.h>
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#include <syscon.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/cru_rk3288.h>
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int rockchip_get_clk(struct udevice **devp)
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{
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return uclass_get_device_by_driver(UCLASS_CLK,
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DM_GET_DRIVER(rockchip_rk3288_cru), devp);
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}
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void *rockchip_get_cru(void)
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{
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struct rk3288_clk_priv *priv;
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struct udevice *dev;
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int ret;
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ret = rockchip_get_clk(&dev);
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if (ret)
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return ERR_PTR(ret);
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priv = dev_get_priv(dev);
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return priv->cru;
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}
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@ -30,12 +30,6 @@ struct rk3288_clk_plat {
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#endif
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};
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struct rk3288_clk_priv {
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struct rk3288_grf *grf;
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struct rk3288_cru *cru;
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ulong rate;
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};
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struct pll_div {
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u32 nr;
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u32 nf;
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@ -140,21 +134,6 @@ static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
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static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
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static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
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void *rockchip_get_cru(void)
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{
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struct rk3288_clk_priv *priv;
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struct udevice *dev;
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int ret;
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ret = rockchip_get_clk(&dev);
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if (ret)
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return ERR_PTR(ret);
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priv = dev_get_priv(dev);
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return priv->cru;
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}
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static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
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const struct pll_div *div)
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{
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