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Merge branch 'master' of git://git.denx.de/u-boot-i2c

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This commit is contained in:
Tom Rini 2014-01-20 07:51:22 -05:00
commit 55ca99f894
5 changed files with 47 additions and 8 deletions
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5
common/env_eeprom.c
View file

@ -24,7 +24,6 @@ DECLARE_GLOBAL_DATA_PTR;
env_t *env_ptr;
char *env_name_spec = "EEPROM";
int env_eeprom_bus = -1;
static int eeprom_bus_read(unsigned dev_addr, unsigned offset,
uchar *buffer, unsigned cnt)
@ -40,8 +39,7 @@ static int eeprom_bus_read(unsigned dev_addr, unsigned offset,
rcode = eeprom_read(dev_addr, offset, buffer, cnt);
#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
if (old_bus != env_eeprom_bus)
i2c_set_bus_num(old_bus);
i2c_set_bus_num(old_bus);
#endif
return rcode;
@ -63,6 +61,7 @@ static int eeprom_bus_write(unsigned dev_addr, unsigned offset,
#if defined(CONFIG_I2C_ENV_EEPROM_BUS)
i2c_set_bus_num(old_bus);
#endif
return rcode;
}

38
drivers/i2c/designware_i2c.c
View file

@ -266,6 +266,25 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
unsigned long start_time_rx;
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/*
* EEPROM chips that implement "address overflow" are ones
* like Catalyst 24WC04/08/16 which has 9/10/11 bits of
* address and the extra bits end up in the "chip address"
* bit slots. This makes a 24WC08 (1Kbyte) chip look like
* four 256 byte chips.
*
* Note that we consider the length of the address field to
* still be one byte because the extra address bits are
* hidden in the chip address.
*/
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8));
debug("%s: fix addr_overflow: chip %02x addr %02x\n", __func__, chip,
addr);
#endif
if (check_params(addr, alen, buffer, len))
return 1;
@ -307,6 +326,25 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
int nb = len;
unsigned long start_time_tx;
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/*
* EEPROM chips that implement "address overflow" are ones
* like Catalyst 24WC04/08/16 which has 9/10/11 bits of
* address and the extra bits end up in the "chip address"
* bit slots. This makes a 24WC08 (1Kbyte) chip look like
* four 256 byte chips.
*
* Note that we consider the length of the address field to
* still be one byte because the extra address bits are
* hidden in the chip address.
*/
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8));
debug("%s: fix addr_overflow: chip %02x addr %02x\n", __func__, chip,
addr);
#endif
if (check_params(addr, alen, buffer, len))
return 1;

4
drivers/i2c/fti2c010.c
View file

@ -201,7 +201,7 @@ static int fti2c010_read(struct i2c_adapter *adap,
struct fti2c010_chip *chip = chip_list + adap->hwadapnr;
struct fti2c010_regs *regs = chip->regs;
int ret, pos;
uchar paddr[4];
uchar paddr[4] = { 0 };
to_i2c_addr(paddr, addr, alen);
@ -263,7 +263,7 @@ static int fti2c010_write(struct i2c_adapter *adap,
struct fti2c010_chip *chip = chip_list + adap->hwadapnr;
struct fti2c010_regs *regs = chip->regs;
int ret, pos;
uchar paddr[4];
uchar paddr[4] = { 0 };
to_i2c_addr(paddr, addr, alen);

2
drivers/i2c/i2c_core.c
View file

@ -349,7 +349,7 @@ unsigned int i2c_set_bus_speed(unsigned int speed)
return 0;
ret = I2C_ADAP->set_bus_speed(I2C_ADAP, speed);
if (gd->flags & GD_FLG_RELOC)
I2C_ADAP->speed = ret;
I2C_ADAP->speed = (ret == 0) ? speed : 0;
return ret;
}

6
drivers/i2c/rcar_i2c.c
View file

@ -119,11 +119,13 @@ rcar_i2c_raw_read(struct rcar_i2c *dev, u8 chip, uint addr)
/* set slave address, receive */
writel((chip << 1) | 1, &dev->icmar);
/* clear status */
writel(0, &dev->icmsr);
/* start master receive */
writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr);
while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDE))
!= (MSR_MAT | MSR_MDE))
while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDR))
!= (MSR_MAT | MSR_MDR))
udelay(10);
/* clear ESG */