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omap24xx_i2c: add 2-byte address support
Various devices like EEPROMs require 2-byte address support to be properly accessed. This patch adds this support for OMAP2/3/4 I2C controller driver. I've tested it with EEPROM (16 bit address) and TPS65217 chip (8 bit address) on TI Beaglebone board. Unfortunately I don't have access to any compatible hardware with 16bit data register so I can't test if those #ifdef clauses really work. CC: Tom Rini <trini@ti.com> Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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parent
27e301e5b7
commit
55faa58976
1 changed files with 26 additions and 32 deletions
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@ -150,16 +150,19 @@ void i2c_init(int speed, int slaveadd)
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bus_initialized[current_bus] = 1;
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}
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static int i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value)
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static int i2c_read_byte(u8 devaddr, u16 regoffset, u8 alen, u8 *value)
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{
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int i2c_error = 0;
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u16 status;
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int i = 2 - alen;
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u8 tmpbuf[2] = {(regoffset) >> 8, regoffset & 0xff};
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u16 w;
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/* wait until bus not busy */
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wait_for_bb();
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/* one byte only */
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writew(1, &i2c_base->cnt);
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writew(alen, &i2c_base->cnt);
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/* set slave address */
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writew(devaddr, &i2c_base->sa);
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/* no stop bit needed here */
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@ -174,8 +177,12 @@ static int i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value)
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goto read_exit;
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}
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if (status & I2C_STAT_XRDY) {
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/* Important: have to use byte access */
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writeb(regoffset, &i2c_base->data);
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w = tmpbuf[i++];
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#if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
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defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX))
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w |= tmpbuf[i++] << 8;
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#endif
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writew(w, &i2c_base->data);
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writew(I2C_STAT_XRDY, &i2c_base->stat);
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}
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if (status & I2C_STAT_ARDY) {
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@ -303,18 +310,18 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
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{
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int i;
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if (alen > 1) {
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if (alen > 2) {
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printf("I2C read: addr len %d not supported\n", alen);
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return 1;
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}
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if (addr + len > 256) {
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if (addr + len > (1 << 16)) {
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puts("I2C read: address out of range\n");
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return 1;
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}
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for (i = 0; i < len; i++) {
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if (i2c_read_byte(chip, addr + i, &buffer[i])) {
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if (i2c_read_byte(chip, addr + i, alen, &buffer[i])) {
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puts("I2C read: I/O error\n");
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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return 1;
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@ -329,13 +336,15 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
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int i;
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u16 status;
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int i2c_error = 0;
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u16 w;
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u8 tmpbuf[2] = {addr >> 8, addr & 0xff};
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if (alen > 1) {
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if (alen > 2) {
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printf("I2C write: addr len %d not supported\n", alen);
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return 1;
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}
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if (addr + len > 256) {
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if (addr + len > (1 << 16)) {
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printf("I2C write: address 0x%x + 0x%x out of range\n",
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addr, len);
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return 1;
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@ -353,28 +362,8 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
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writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
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I2C_CON_STP, &i2c_base->con);
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/* Send address byte */
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status = wait_for_pin();
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if (status == 0 || status & I2C_STAT_NACK) {
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i2c_error = 1;
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printf("error waiting for i2c address ACK (status=0x%x)\n",
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status);
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goto write_exit;
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}
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if (status & I2C_STAT_XRDY) {
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writeb(addr & 0xFF, &i2c_base->data);
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writew(I2C_STAT_XRDY, &i2c_base->stat);
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} else {
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i2c_error = 1;
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printf("i2c bus not ready for transmit (status=0x%x)\n",
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status);
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goto write_exit;
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}
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/* address phase is over, now write data */
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for (i = 0; i < len; i++) {
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/* Send address and data */
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for (i = -alen; i < len; i++) {
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status = wait_for_pin();
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if (status == 0 || status & I2C_STAT_NACK) {
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@ -385,7 +374,12 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
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}
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if (status & I2C_STAT_XRDY) {
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writeb(buffer[i], &i2c_base->data);
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w = (i < 0) ? tmpbuf[2+i] : buffer[i];
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#if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
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defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX))
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w |= ((++i < 0) ? tmpbuf[2+i] : buffer[i]) << 8;
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#endif
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writew(w, &i2c_base->data);
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writew(I2C_STAT_XRDY, &i2c_base->stat);
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} else {
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i2c_error = 1;
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