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pci: mx6: fix occasional link failures

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According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.

Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Tim Harvey 2014-08-07 22:57:29 -07:00 • committed by Stefano Babic
parent 0351ef97d7
commit 5a82e1a21d
1 changed files with 4 additions and 4 deletions
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8
drivers/pci/pcie_imx.c
View file

@ -509,10 +509,6 @@ static int imx6_pcie_deassert_core_reset(void)
imx6_pcie_toggle_power();
/* Enable PCIe */
clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
enable_pcie_clock();
/*
@ -521,6 +517,10 @@ static int imx6_pcie_deassert_core_reset(void)
*/
mdelay(50);
/* Enable PCIe */
clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
imx6_pcie_toggle_reset();
return 0;