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pci: mx6: fix occasional link failures
According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable for SS function) must remain deasserted until the reference clock is running at the appropriate frequency. Without this patch we find a high link failure rate (>5%) on certain IMX6 boards at various temperatures. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
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1 changed files with 4 additions and 4 deletions
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@ -509,10 +509,6 @@ static int imx6_pcie_deassert_core_reset(void)
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imx6_pcie_toggle_power();
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/* Enable PCIe */
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clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
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setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
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enable_pcie_clock();
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/*
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@ -521,6 +517,10 @@ static int imx6_pcie_deassert_core_reset(void)
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*/
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mdelay(50);
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/* Enable PCIe */
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clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
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setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
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imx6_pcie_toggle_reset();
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return 0;
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