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mpc83xx: Use pre-defined asm functions
For a lot of inline assembly calls in the mpc8xxx and mpc83xx directories, we already have convenient pre-defined helper functions, but they're not used, resulting in hard-to-read code. Use these helper functions where ever possible and useful. Signed-off-by: Mario Six <mario.six@gdsys.cc>
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parent
1e718f43de
commit
5c22998503
4 changed files with 60 additions and 43 deletions
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@ -133,18 +133,18 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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#ifdef MPC83xx_RESET
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/* Interrupts and MMU off */
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__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
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msr = mfmsr();
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msr &= ~(MSR_EE | MSR_IR | MSR_DR);
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__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
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mtmsr(msr);
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/* enable Reset Control Reg */
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immap->reset.rpr = 0x52535445;
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__asm__ __volatile__ ("sync");
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__asm__ __volatile__ ("isync");
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sync();
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isync();
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/* confirm Reset Control Reg is enabled */
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while(!((immap->reset.rcer) & RCER_CRE));
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while(!((immap->reset.rcer) & RCER_CRE))
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;
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udelay(200);
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@ -156,10 +156,9 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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immap->reset.rmr = RMR_CSRE; /* Checkstop Reset enable */
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/* Interrupts and MMU off */
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__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
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msr = mfmsr();
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msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
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__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
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mtmsr(msr);
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/*
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* Trying to execute the next instruction at a non-existing address
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@ -191,8 +191,8 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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}
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ddr->err_disable = val;
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__asm__ __volatile__("sync");
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__asm__ __volatile__("isync");
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sync();
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isync();
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return 0;
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} else if (strcmp(argv[1], "errdetectclr") == 0) {
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val = ddr->err_detect;
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@ -249,8 +249,8 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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printf("Incorrect command\n");
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ddr->ecc_err_inject = val;
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__asm__ __volatile__("sync");
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__asm__ __volatile__("isync");
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sync();
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isync();
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return 0;
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} else if (strcmp(argv[1], "mirror") == 0) {
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val = ddr->ecc_err_inject;
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@ -282,26 +282,26 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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/* enable injects */
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ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
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__asm__ __volatile__("sync");
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__asm__ __volatile__("isync");
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sync();
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isync();
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/* write memory location injecting errors */
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ppcDWstore((u32 *) i, pattern);
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__asm__ __volatile__("sync");
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sync();
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/* disable injects */
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ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
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__asm__ __volatile__("sync");
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__asm__ __volatile__("isync");
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sync();
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isync();
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/* read data, this generates ECC error */
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ppcDWload((u32 *) i, ret);
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__asm__ __volatile__("sync");
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sync();
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/* re-initialize memory, double word write the location again,
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* generates new ECC code this time */
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ppcDWstore((u32 *) i, writeback);
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__asm__ __volatile__("sync");
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sync();
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}
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enable_interrupts();
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return 0;
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@ -321,29 +321,29 @@ int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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/* enable injects */
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ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
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__asm__ __volatile__("sync");
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__asm__ __volatile__("isync");
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sync();
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isync();
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/* write memory location injecting errors */
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*(u32 *) i = 0xfedcba98UL;
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__asm__ __volatile__("sync");
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sync();
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/* sub double word write,
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* bus will read-modify-write,
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* generates ECC error */
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*((u32 *) i + 1) = 0x76543210UL;
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__asm__ __volatile__("sync");
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sync();
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/* disable injects */
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ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
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__asm__ __volatile__("sync");
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__asm__ __volatile__("isync");
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sync();
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isync();
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/* re-initialize memory,
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* double word write the location again,
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* generates new ECC code this time */
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ppcDWstore((u32 *) i, writeback);
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__asm__ __volatile__("sync");
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sync();
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}
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enable_interrupts();
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return 0;
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@ -436,7 +436,7 @@ long int spd_sdram()
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else if (caslat == 4)
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ddr->debug_reg = 0x202c0000; /* CL=3.0 */
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__asm__ __volatile__ ("sync");
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sync();
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debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg);
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}
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@ -765,7 +765,8 @@ long int spd_sdram()
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#endif
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debug("DDR:sdram_clk_cntl=0x%08x\n", ddr->sdram_clk_cntl);
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asm("sync;isync");
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sync();
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isync();
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udelay(600);
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@ -834,7 +835,8 @@ long int spd_sdram()
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#endif
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/* Enable controller, and GO! */
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ddr->sdram_cfg = sdram_cfg;
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asm("sync;isync");
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sync();
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isync();
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udelay(500);
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debug("DDR:sdram_cfg=0x%08x\n", ddr->sdram_cfg);
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@ -843,6 +845,22 @@ long int spd_sdram()
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#endif /* CONFIG_SPD_EEPROM */
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
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static inline u32 mftbu(void)
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{
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u32 rval;
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asm volatile("mftbu %0" : "=r" (rval));
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return rval;
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}
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static inline u32 mftb(void)
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{
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u32 rval;
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asm volatile("mftb %0" : "=r" (rval));
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return rval;
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}
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/*
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* Use timebase counter, get_timer() is not available
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* at this point of initialization yet.
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@ -858,9 +876,9 @@ static __inline__ unsigned long get_tbms (void)
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/* get the timebase ticks */
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do {
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asm volatile ("mftbu %0":"=r" (tbu1):);
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asm volatile ("mftb %0":"=r" (tbl):);
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asm volatile ("mftbu %0":"=r" (tbu2):);
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tbu1 = mftbu();
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tbl = mftb();
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tbu2 = mftbu();
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} while (tbu1 != tbu2);
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/* convert ticks to ms */
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@ -897,7 +915,7 @@ void ddr_enable_ecc(unsigned int dram_size)
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for (p = 0; p < (u64*)(size); p++) {
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ppcDWstore((u32*)p, pattern);
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}
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__asm__ __volatile__ ("sync");
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sync();
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#endif
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t_end = get_tbms();
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@ -922,8 +940,8 @@ void ddr_enable_ecc(unsigned int dram_size)
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/* Enable errors for ECC */
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ddr->err_disable &= ECC_ERROR_ENABLE;
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__asm__ __volatile__ ("sync");
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__asm__ __volatile__ ("isync");
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sync();
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isync();
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}
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#endif /* CONFIG_DDR_ECC */
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@ -131,10 +131,10 @@ static int pamu_config_ppaace(uint32_t liodn, uint64_t win_addr,
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set_bf(ppaace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
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}
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asm volatile("sync" : : : "memory");
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sync();
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/* Mark the ppace entry valid */
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ppaace->addr_bitfields |= PAACE_V_VALID;
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asm volatile("sync" : : : "memory");
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sync();
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return 0;
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}
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@ -279,7 +279,7 @@ int pamu_init(void)
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out_be32(®s->splah, spaact_lim >> 32);
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out_be32(®s->splal, (uint32_t)spaact_lim);
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}
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asm volatile("sync" : : : "memory");
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sync();
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base_addr += PAMU_OFFSET;
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}
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@ -294,7 +294,7 @@ void pamu_enable(void)
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for (i = 0; i < CONFIG_NUM_PAMU; i++) {
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setbits_be32((void *)base_addr + PAMU_PCR_OFFSET,
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PAMU_PCR_PE);
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asm volatile("sync" : : : "memory");
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sync();
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base_addr += PAMU_OFFSET;
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}
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}
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@ -318,7 +318,7 @@ void pamu_reset(void)
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out_be32(®s->splal, 0);
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clrbits_be32((void *)regs + PAMU_PCR_OFFSET, PAMU_PCR_PE);
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asm volatile("sync" : : : "memory");
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sync();
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base_addr += PAMU_OFFSET;
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}
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}
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@ -331,7 +331,7 @@ void pamu_disable(void)
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for (i = 0; i < CONFIG_NUM_PAMU; i++) {
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clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
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asm volatile("sync" : : : "memory");
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sync();
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base_addr += PAMU_OFFSET;
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}
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}
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