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dm: spi: Add soft_spi implementation
Add a new implementation of soft_spi that uses device tree to specify the GPIOs. This will replace soft_spi_legacy for boards which use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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34
doc/device-tree-bindings/spi/soft-spi.txt
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34
doc/device-tree-bindings/spi/soft-spi.txt
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Soft SPI
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The soft SPI bus implementation allows the use of GPIO pins to simulate a
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SPI bus. No SPI host is required for this to work. The down-side is that the
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performance will typically be much lower than a real SPI bus.
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The soft SPI node requires the following properties:
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compatible: "u-boot,soft-spi"
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soft_spi_cs: GPIO number to use for SPI chip select (output)
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soft_spi_sclk: GPIO number to use for SPI clock (output)
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soft_spi_mosi: GPIO number to use for SPI MOSI line (output)
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soft_spi_miso GPIO number to use for SPI MISO line (input)
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spi-delay-us: Number of microseconds of delay between each CS transition
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The GPIOs should be specified as required by the GPIO controller referenced.
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The first cell holds the phandle of the controller and the second cell
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typically holds the GPIO number.
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Example:
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soft-spi {
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compatible = "u-boot,soft-spi";
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cs-gpio = <&gpio 235 0>; /* Y43 */
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sclk-gpio = <&gpio 225 0>; /* Y31 */
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mosi-gpio = <&gpio 227 0>; /* Y33 */
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miso-gpio = <&gpio 224 0>; /* Y30 */
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spi-delay-us = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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cs@0 {
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};
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};
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@ -9,6 +9,7 @@
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ifdef CONFIG_DM_SPI
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obj-y += spi-uclass.o
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obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o
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obj-$(CONFIG_SOFT_SPI) += soft_spi.o
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else
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obj-y += spi.o
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obj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o
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252
drivers/spi/soft_spi.c
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252
drivers/spi/soft_spi.c
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/*
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* Copyright (c) 2014 Google, Inc
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*
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* (C) Copyright 2002
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
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*
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* Influenced by code from:
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct soft_spi_platdata {
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struct fdt_gpio_state cs;
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struct fdt_gpio_state sclk;
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struct fdt_gpio_state mosi;
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struct fdt_gpio_state miso;
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int spi_delay_us;
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};
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struct soft_spi_priv {
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unsigned int mode;
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};
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static int soft_spi_scl(struct udevice *dev, int bit)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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struct soft_spi_priv *priv = dev_get_priv(dev);
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gpio_set_value(plat->sclk.gpio, priv->mode & SPI_CPOL ? bit : !bit);
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return 0;
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}
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static int soft_spi_sda(struct udevice *dev, int bit)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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gpio_set_value(plat->mosi.gpio, bit);
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return 0;
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}
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static int soft_spi_cs_activate(struct udevice *dev)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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struct soft_spi_priv *priv = dev_get_priv(dev);
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gpio_set_value(plat->cs.gpio, !(priv->mode & SPI_CS_HIGH));
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gpio_set_value(plat->sclk.gpio, priv->mode & SPI_CPOL);
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gpio_set_value(plat->cs.gpio, priv->mode & SPI_CS_HIGH);
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return 0;
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}
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static int soft_spi_cs_deactivate(struct udevice *dev)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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struct soft_spi_priv *priv = dev_get_priv(dev);
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gpio_set_value(plat->cs.gpio, !(priv->mode & SPI_CS_HIGH));
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return 0;
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}
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static int soft_spi_claim_bus(struct udevice *dev)
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{
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/*
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* Make sure the SPI clock is in idle state as defined for
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* this slave.
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*/
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return soft_spi_scl(dev, 0);
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}
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static int soft_spi_release_bus(struct udevice *dev)
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{
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/* Nothing to do */
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return 0;
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}
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/*-----------------------------------------------------------------------
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* SPI transfer
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*
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* This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
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* "bitlen" bits in the SPI MISO port. That's just the way SPI works.
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*
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* The source of the outgoing bits is the "dout" parameter and the
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* destination of the input bits is the "din" parameter. Note that "dout"
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* and "din" can point to the same memory location, in which case the
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* input data overwrites the output data (since both are buffered by
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* temporary variables, this is OK).
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*/
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static int soft_spi_xfer(struct udevice *dev, unsigned int bitlen,
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const void *dout, void *din, unsigned long flags)
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{
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struct soft_spi_priv *priv = dev_get_priv(dev);
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struct soft_spi_platdata *plat = dev->platdata;
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uchar tmpdin = 0;
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uchar tmpdout = 0;
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const u8 *txd = dout;
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u8 *rxd = din;
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int cpol = priv->mode & SPI_CPOL;
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int cpha = priv->mode & SPI_CPHA;
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unsigned int j;
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debug("spi_xfer: slave %s:%s dout %08X din %08X bitlen %u\n",
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dev->parent->name, dev->name, *(uint *)txd, *(uint *)rxd,
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bitlen);
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if (flags & SPI_XFER_BEGIN)
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soft_spi_cs_activate(dev);
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for (j = 0; j < bitlen; j++) {
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/*
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* Check if it is time to work on a new byte.
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*/
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if ((j % 8) == 0) {
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if (txd)
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tmpdout = *txd++;
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else
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tmpdout = 0;
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if (j != 0) {
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if (rxd)
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*rxd++ = tmpdin;
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}
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tmpdin = 0;
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}
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if (!cpha)
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soft_spi_scl(dev, !cpol);
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soft_spi_sda(dev, tmpdout & 0x80);
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udelay(plat->spi_delay_us);
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if (cpha)
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soft_spi_scl(dev, !cpol);
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else
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soft_spi_scl(dev, cpol);
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tmpdin <<= 1;
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tmpdin |= gpio_get_value(plat->miso.gpio);
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tmpdout <<= 1;
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udelay(plat->spi_delay_us);
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if (cpha)
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soft_spi_scl(dev, cpol);
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}
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/*
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* If the number of bits isn't a multiple of 8, shift the last
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* bits over to left-justify them. Then store the last byte
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* read in.
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*/
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if (rxd) {
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if ((bitlen % 8) != 0)
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tmpdin <<= 8 - (bitlen % 8);
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*rxd++ = tmpdin;
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}
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if (flags & SPI_XFER_END)
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soft_spi_cs_deactivate(dev);
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return 0;
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}
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static int soft_spi_set_speed(struct udevice *dev, unsigned int speed)
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{
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/* Accept any speed */
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return 0;
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}
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static int soft_spi_set_mode(struct udevice *dev, unsigned int mode)
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{
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struct soft_spi_priv *priv = dev_get_priv(dev);
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priv->mode = mode;
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return 0;
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}
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static int soft_spi_child_pre_probe(struct udevice *dev)
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{
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struct spi_slave *slave = dev_get_parentdata(dev);
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slave->dev = dev;
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return spi_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, slave);
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}
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static const struct dm_spi_ops soft_spi_ops = {
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.claim_bus = soft_spi_claim_bus,
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.release_bus = soft_spi_release_bus,
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.xfer = soft_spi_xfer,
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.set_speed = soft_spi_set_speed,
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.set_mode = soft_spi_set_mode,
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};
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static int soft_spi_ofdata_to_platdata(struct udevice *dev)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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const void *blob = gd->fdt_blob;
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int node = dev->of_offset;
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if (fdtdec_decode_gpio(blob, node, "cs-gpio", &plat->cs) ||
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fdtdec_decode_gpio(blob, node, "sclk-gpio", &plat->sclk) ||
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fdtdec_decode_gpio(blob, node, "mosi-gpio", &plat->mosi) ||
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fdtdec_decode_gpio(blob, node, "miso-gpio", &plat->miso))
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return -EINVAL;
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plat->spi_delay_us = fdtdec_get_int(blob, node, "spi-delay-us", 0);
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return 0;
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}
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static int soft_spi_probe(struct udevice *dev)
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{
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struct spi_slave *slave = dev_get_parentdata(dev);
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struct soft_spi_platdata *plat = dev->platdata;
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gpio_request(plat->cs.gpio, "soft_spi_cs");
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gpio_request(plat->sclk.gpio, "soft_spi_sclk");
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gpio_request(plat->mosi.gpio, "soft_spi_mosi");
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gpio_request(plat->miso.gpio, "soft_spi_miso");
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gpio_direction_output(plat->sclk.gpio, slave->mode & SPI_CPOL);
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gpio_direction_output(plat->mosi.gpio, 1);
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gpio_direction_input(plat->miso.gpio);
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gpio_direction_output(plat->cs.gpio, !(slave->mode & SPI_CS_HIGH));
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return 0;
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}
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static const struct udevice_id soft_spi_ids[] = {
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{ .compatible = "u-boot,soft-spi" },
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{ }
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};
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U_BOOT_DRIVER(soft_spi) = {
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.name = "soft_spi",
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.id = UCLASS_SPI,
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.of_match = soft_spi_ids,
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.ops = &soft_spi_ops,
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.ofdata_to_platdata = soft_spi_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct soft_spi_platdata),
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.priv_auto_alloc_size = sizeof(struct soft_spi_priv),
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.per_child_auto_alloc_size = sizeof(struct spi_slave),
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.probe = soft_spi_probe,
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.child_pre_probe = soft_spi_child_pre_probe,
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};
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