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mmc: Convert HI6220 MMC driver to driver model
Convert HiSilicon HI6220 MMC driver based on DWMMC IP to driver model. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Enable this on poplar] Signed-off-by: Tom Rini <trini@konsulko.com>
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5bb409c1ba
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3 changed files with 71 additions and 31 deletions
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@ -18,6 +18,7 @@ CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey"
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CONFIG_ENV_IS_IN_FAT=y
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CONFIG_ENV_FAT_INTERFACE="mmc"
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CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
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CONFIG_DM_MMC=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_K3=y
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CONFIG_CONS_INDEX=4
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@ -16,6 +16,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x20000000
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CONFIG_FASTBOOT_BUF_SIZE=0x10000000
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_FLASH_MMC_DEV=0
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CONFIG_DM_MMC=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_K3=y
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CONFIG_USB=y
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@ -5,51 +5,89 @@
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*/
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#include <common.h>
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#include <dm.h>
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#include <dwmmc.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <linux/errno.h>
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#define DWMMC_MAX_CH_NUM 4
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DECLARE_GLOBAL_DATA_PTR;
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#define DWMMC_MAX_FREQ 50000000
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#define DWMMC_MIN_FREQ 400000
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struct hi6220_dwmmc_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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/* Source clock is configured to 100MHz by ATF bl1*/
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#define MMC0_DEFAULT_FREQ 100000000
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struct hi6220_dwmmc_priv_data {
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struct dwmci_host host;
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};
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static int hi6220_dwmci_core_init(struct dwmci_host *host, int index)
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static int hi6220_dwmmc_ofdata_to_platdata(struct udevice *dev)
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{
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host->name = "Hisilicon DWMMC";
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struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
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struct dwmci_host *host = &priv->host;
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host->dev_index = index;
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host->name = dev->name;
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host->ioaddr = (void *)devfdt_get_addr(dev);
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host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
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"bus-width", 4);
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/* use non-removable property for differentiating SD card and eMMC */
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if (dev_read_bool(dev, "non-removable"))
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host->dev_index = 0;
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else
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host->dev_index = 1;
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host->priv = priv;
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/* Add the mmc channel to be registered with mmc core */
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if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) {
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printf("DWMMC%d registration failed\n", index);
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return -1;
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}
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return 0;
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}
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/*
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* This function adds the mmc channel to be registered with mmc core.
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* index - mmc channel number.
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* regbase - register base address of mmc channel specified in 'index'.
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* bus_width - operating bus width of mmc channel specified in 'index'.
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*/
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int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
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static int hi6220_dwmmc_probe(struct udevice *dev)
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{
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struct dwmci_host *host = NULL;
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struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev);
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
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struct dwmci_host *host = &priv->host;
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host = calloc(1, sizeof(struct dwmci_host));
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if (!host) {
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pr_err("dwmci_host calloc failed!\n");
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return -ENOMEM;
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}
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/* Use default bus speed due to absence of clk driver */
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host->bus_hz = 50000000;
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host->ioaddr = (void *)(ulong)regbase;
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host->buswidth = bus_width;
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host->bus_hz = MMC0_DEFAULT_FREQ;
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dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000);
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host->mmc = &plat->mmc;
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return hi6220_dwmci_core_init(host, index);
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host->mmc->priv = &priv->host;
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upriv->mmc = host->mmc;
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host->mmc->dev = dev;
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return dwmci_probe(dev);
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}
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static int hi6220_dwmmc_bind(struct udevice *dev)
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{
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struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev);
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int ret;
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ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
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if (ret)
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return ret;
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return 0;
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}
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static const struct udevice_id hi6220_dwmmc_ids[] = {
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{ .compatible = "hisilicon,hi6220-dw-mshc" },
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{ }
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};
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U_BOOT_DRIVER(hi6220_dwmmc_drv) = {
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.name = "hi6220_dwmmc",
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.id = UCLASS_MMC,
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.of_match = hi6220_dwmmc_ids,
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.ofdata_to_platdata = hi6220_dwmmc_ofdata_to_platdata,
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.ops = &dm_dwmci_ops,
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.bind = hi6220_dwmmc_bind,
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.probe = hi6220_dwmmc_probe,
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.priv_auto_alloc_size = sizeof(struct hi6220_dwmmc_priv_data),
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.platdata_auto_alloc_size = sizeof(struct hi6220_dwmmc_plat),
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};
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