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ppc/85xx: Make L2 support more robust

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According the user manual, we need loop-check the L2 enable bit set.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Dave Liu 2009-10-22 00:10:23 -05:00 • committed by Kumar Gala
parent 613ad28c3d
commit 654ea1f318
1 changed files with 4 additions and 1 deletions

5
cpu/mpc85xx/cpu_init.c
View file

@ -360,8 +360,11 @@ int cpu_init_r(void)
/* enable the cache */ /* enable the cache */
mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0); mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0);
if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) {
while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E))
;
printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64); printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64);
}
#else #else
puts("disabled\n"); puts("disabled\n");
#endif #endif