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arm: at91: at91sam9m10g45ek/corvus remove useless chip select 1 init
On these boards the DDR is connected to a dedicated controller and not to chip select 1 of the EBI. Signed-off-by: Erik van Luijk <evanluijk@interact.nl> Tested-by: Erik van Luijk <evanluijk@interact.nl>
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0c01c3e876
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2 changed files with 0 additions and 16 deletions
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@ -131,21 +131,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
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void mem_init(void)
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{
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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struct atmel_mpddr ddr2;
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unsigned long csa;
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ddr2_conf(&ddr2);
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/* enable DDR2 clock */
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writel(0x4, &pmc->scer);
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/* Chip select 1 is for DDR2/SDRAM */
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csa = readl(&mat->ebicsa);
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csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
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csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
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writel(csa, &mat->ebicsa);
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/* DDRAM2 Controller initialize */
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ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
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}
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@ -144,21 +144,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
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void mem_init(void)
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{
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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struct atmel_mpddr ddr2;
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unsigned long csa;
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ddr2_conf(&ddr2);
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/* enable DDR2 clock */
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writel(0x4, &pmc->scer);
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/* Chip select 1 is for DDR2/SDRAM */
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csa = readl(&mat->ebicsa);
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csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
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csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
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writel(csa, &mat->ebicsa);
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/* DDRAM2 Controller initialize */
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ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
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}
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