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x86: coreboot: Fix cosmetic issues
Clean up arch/x86/cpu/coreboot.c to fix several cosmetic issues. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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2 changed files with 3 additions and 25 deletions
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@ -7,16 +7,10 @@
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*/
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#include <common.h>
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#include <asm/u-boot-x86.h>
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#include <flash.h>
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#include <netdev.h>
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#include <ns16550.h>
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#include <asm/msr.h>
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#include <asm/cache.h>
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#include <asm/cpu.h>
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#include <asm/io.h>
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#include <asm/msr.h>
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#include <asm/mtrr.h>
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#include <asm/arch/tables.h>
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#include <asm/arch/sysinfo.h>
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#include <asm/arch/timestamp.h>
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@ -53,13 +47,6 @@ int last_stage_init(void)
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return 0;
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}
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#ifndef CONFIG_SYS_NO_FLASH
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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return 0;
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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@ -67,7 +54,8 @@ int board_eth_init(bd_t *bis)
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void board_final_cleanup(void)
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{
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/* Un-cache the ROM so the kernel has one
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/*
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* Un-cache the ROM so the kernel has one
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* more MTRR available.
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*
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* Coreboot should have assigned this to the
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@ -91,15 +79,6 @@ void board_final_cleanup(void)
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outb(0xcb, 0xb2);
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}
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void panic_puts(const char *str)
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{
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NS16550_t port = (NS16550_t)0x3f8;
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NS16550_init(port, 1);
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while (*str)
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NS16550_putc(port, *str++);
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}
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int misc_init_r(void)
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{
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return 0;
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@ -16,7 +16,6 @@ void init_gd(gd_t *id, u64 *gdt_addr);
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void setup_gdt(gd_t *id, u64 *gdt_addr);
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int init_cache(void);
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int cleanup_before_linux(void);
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void panic_puts(const char *str);
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/* cpu/.../timer.c */
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void timer_isr(void *);
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