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powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL
Using the TPL method for nand boot by sram was already supported. Here add some code for mpc85xx ifc nand boot. - For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec. - Use a clear function name for nand spl boot. - Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c in spl/Makefile; Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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parent
76356eb57c
commit
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4 changed files with 34 additions and 14 deletions
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@ -57,7 +57,14 @@ SECTIONS
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. = ALIGN(8);
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. = ALIGN(8);
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__init_begin = .;
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__init_begin = .;
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__init_end = .;
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__init_end = .;
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/* FIXME for non-NAND SPL */
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/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
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#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
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.bootpg ADDR(.text) - 0x1000 :
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{
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KEEP(*(.bootpg))
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} :text = 0xffff
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#else
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#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
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#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
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.bootpg ADDR(.text) + 0x1000 :
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.bootpg ADDR(.text) + 0x1000 :
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{
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{
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@ -69,12 +76,6 @@ SECTIONS
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#else
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#else
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#error unknown NAND controller
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#error unknown NAND controller
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#endif
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#endif
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#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
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.bootpg ADDR(.text) - 0x1000 :
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{
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KEEP(*(.bootpg))
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} :text = 0xffff
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#else
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.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
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.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
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KEEP(*(.resetvec))
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KEEP(*(.resetvec))
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} = 0xffff
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} = 0xffff
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@ -62,6 +62,7 @@ CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
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CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
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CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
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CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
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CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
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CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
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CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
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CONFIG_SPL_DRIVERS_MISC_SUPPORT (drivers/misc)
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CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o)
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CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o)
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CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
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CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
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CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
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CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
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@ -88,7 +88,11 @@ static inline int bad_block(uchar *marker, int port_size)
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return __raw_readw((u16 *)marker) != 0xffff;
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return __raw_readw((u16 *)marker) != 0xffff;
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}
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}
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static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
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#ifdef CONFIG_TPL_BUILD
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int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
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#else
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static int nand_load(uint32_t offs, unsigned int uboot_size, void *vdst)
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#endif
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{
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{
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struct fsl_ifc *ifc = IFC_BASE_ADDR;
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struct fsl_ifc *ifc = IFC_BASE_ADDR;
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uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
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uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
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@ -105,6 +109,7 @@ static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
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int sram_addr;
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int sram_addr;
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int pg_no;
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int pg_no;
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uchar *dst = vdst;
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/* Get NAND Flash configuration */
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/* Get NAND Flash configuration */
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csor = CONFIG_SYS_NAND_CSOR;
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csor = CONFIG_SYS_NAND_CSOR;
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@ -208,8 +213,19 @@ static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
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offs += page_size;
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offs += page_size;
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} while ((offs & (blk_size - 1)) && (pos < uboot_size));
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} while ((offs & (blk_size - 1)) && (pos < uboot_size));
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}
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}
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return 0;
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}
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}
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/*
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* Defines a static function nand_load_image() here, because non-static makes
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* the code too large for certain SPLs(minimal SPL, maximum size <= 4Kbytes)
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*/
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#ifndef CONFIG_TPL_BUILD
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#define nand_spl_load_image(offs, uboot_size, vdst) \
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nand_load(offs, uboot_size, vdst)
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#endif
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/*
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/*
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* Main entrypoint for NAND Boot. It's necessary that SDRAM is already
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* Main entrypoint for NAND Boot. It's necessary that SDRAM is already
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* configured and available since this code loads the main U-boot image
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* configured and available since this code loads the main U-boot image
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@ -221,16 +237,17 @@ void nand_boot(void)
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/*
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/*
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* Load U-Boot image from NAND into RAM
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* Load U-Boot image from NAND into RAM
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*/
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*/
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nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
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nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
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(uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
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CONFIG_SYS_NAND_U_BOOT_SIZE,
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(uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
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#ifdef CONFIG_NAND_ENV_DST
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#ifdef CONFIG_NAND_ENV_DST
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nand_load(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
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nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
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(uchar *)CONFIG_NAND_ENV_DST);
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(uchar *)CONFIG_NAND_ENV_DST);
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#ifdef CONFIG_ENV_OFFSET_REDUND
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#ifdef CONFIG_ENV_OFFSET_REDUND
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nand_load(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
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nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
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(uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
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(uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
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#endif
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#endif
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#endif
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#endif
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/*
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/*
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@ -72,6 +72,7 @@ LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/
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LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/ \
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LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/ \
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drivers/power/pmic/
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drivers/power/pmic/
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LIBS-$(if $(CONFIG_CMD_NAND),$(CONFIG_SPL_NAND_SUPPORT)) += drivers/mtd/nand/
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LIBS-$(if $(CONFIG_CMD_NAND),$(CONFIG_SPL_NAND_SUPPORT)) += drivers/mtd/nand/
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LIBS-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += drivers/misc/
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LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/
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LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/
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LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/
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LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/
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LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/
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LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/
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