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pci: Fix decode regions for memory banks

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Since memory banks may not be located behind each other we need to add
them separately.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
This commit is contained in:
Bernhard Messerklinger 2018-02-15 08:59:53 +01:00 • committed by Tom Rini
parent 4be9f1f25d
commit 664758c3dd
1 changed files with 16 additions and 1 deletions
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17
drivers/pci/pci-uclass.c
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@ -815,7 +815,6 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
ofnode node) ofnode node)
{ {
int pci_addr_cells, addr_cells, size_cells; int pci_addr_cells, addr_cells, size_cells;
phys_addr_t base = 0, size;
int cells_per_record; int cells_per_record;
const u32 *prop; const u32 *prop;
int len; int len;
@ -874,6 +873,21 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
} }
/* Add a region for our local memory */ /* Add a region for our local memory */
#ifdef CONFIG_NR_DRAM_BANKS
bd_t *bd = gd->bd;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
if (bd->bi_dram[i].size) {
pci_set_region(hose->regions + hose->region_count++,
bd->bi_dram[i].start,
bd->bi_dram[i].start,
bd->bi_dram[i].size,
PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
}
}
#else
phys_addr_t base = 0, size;
size = gd->ram_size; size = gd->ram_size;
#ifdef CONFIG_SYS_SDRAM_BASE #ifdef CONFIG_SYS_SDRAM_BASE
base = CONFIG_SYS_SDRAM_BASE; base = CONFIG_SYS_SDRAM_BASE;
@ -882,6 +896,7 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node,
size = gd->pci_ram_top - base; size = gd->pci_ram_top - base;
pci_set_region(hose->regions + hose->region_count++, base, base, pci_set_region(hose->regions + hose->region_count++, base, base,
size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
#endif
return 0; return 0;
} }