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keystone2: ddr3: eliminate using global ddr3_size variable
KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after relocation, writing to it corrupts relocation table. This patch removes the global ddr3_size variable and uses local one instead. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
parent
bba379d498
commit
66c98a0c38
6 changed files with 17 additions and 36 deletions
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@ -263,17 +263,14 @@ static void ddr3_map_ecc_cic2_irq(u32 base)
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}
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}
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#endif
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#endif
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void ddr3_init_ecc(u32 base)
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void ddr3_init_ecc(u32 base, u32 ddr3_size)
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{
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{
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u32 ddr3_size;
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if (!ddr3_ecc_support_rmw(base)) {
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if (!ddr3_ecc_support_rmw(base)) {
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ddr3_disable_ecc(base);
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ddr3_disable_ecc(base);
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return;
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return;
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}
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}
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ddr3_ecc_init_range(base);
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ddr3_ecc_init_range(base);
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ddr3_size = ddr3_get_size();
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ddr3_reset_data(CONFIG_SYS_SDRAM_BASE, ddr3_size);
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ddr3_reset_data(CONFIG_SYS_SDRAM_BASE, ddr3_size);
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/* mapping DDR3 ECC system interrupt from CIC2 to GIC */
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/* mapping DDR3 ECC system interrupt from CIC2 to GIC */
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@ -48,10 +48,9 @@ struct ddr3_emif_config {
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unsigned int sdrfc;
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unsigned int sdrfc;
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};
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};
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void ddr3_init(void);
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u32 ddr3_init(void);
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int ddr3_get_size(void);
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void ddr3_reset_ddrphy(void);
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void ddr3_reset_ddrphy(void);
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void ddr3_init_ecc(u32 base);
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void ddr3_init_ecc(u32 base, u32 ddr3_size);
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void ddr3_disable_ecc(u32 base);
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void ddr3_disable_ecc(u32 base);
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void ddr3_check_ecc_int(u32 base);
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void ddr3_check_ecc_int(u32 base);
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int ddr3_ecc_support_rmw(u32 base);
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int ddr3_ecc_support_rmw(u32 base);
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@ -35,12 +35,14 @@ static struct aemif_config aemif_configs[] = {
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int dram_init(void)
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int dram_init(void)
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{
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{
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ddr3_init();
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u32 ddr3_size;
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ddr3_size = ddr3_init();
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gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_MAX_RAM_BANK_SIZE);
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CONFIG_MAX_RAM_BANK_SIZE);
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aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
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aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
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ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE);
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ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
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return 0;
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return 0;
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}
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}
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@ -11,11 +11,11 @@
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#include "ddr3_cfg.h"
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#include "ddr3_cfg.h"
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#include <asm/arch/ddr3.h>
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#include <asm/arch/ddr3.h>
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static int ddr3_size;
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static struct pll_init_data ddr3_400 = DDR3_PLL_400;
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static struct pll_init_data ddr3_400 = DDR3_PLL_400;
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void ddr3_init(void)
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u32 ddr3_init(void)
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{
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{
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u32 ddr3_size;
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char dimm_name[32];
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char dimm_name[32];
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if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1))
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if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1))
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@ -43,13 +43,11 @@ void ddr3_init(void)
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printf("DRAM: 4 GiB\n");
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printf("DRAM: 4 GiB\n");
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ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g);
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ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g);
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ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g);
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ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g);
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} else {
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printf("Unknown SO-DIMM. Cannot configure DDR3\n");
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while (1)
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;
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}
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}
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}
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/**
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* ddr3_get_size - return ddr3 size in GiB
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*/
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int ddr3_get_size(void)
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{
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return ddr3_size;
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return ddr3_size;
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}
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}
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@ -12,14 +12,13 @@
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#include <asm/arch/ddr3.h>
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#include <asm/arch/ddr3.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/hardware.h>
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static int ddr3_size;
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struct pll_init_data ddr3a_333 = DDR3_PLL_333(A);
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struct pll_init_data ddr3a_333 = DDR3_PLL_333(A);
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struct pll_init_data ddr3a_400 = DDR3_PLL_400(A);
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struct pll_init_data ddr3a_400 = DDR3_PLL_400(A);
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void ddr3_init(void)
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u32 ddr3_init(void)
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{
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{
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char dimm_name[32];
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char dimm_name[32];
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u32 ddr3_size;
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ddr3_get_dimm_params(dimm_name);
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ddr3_get_dimm_params(dimm_name);
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@ -93,12 +92,6 @@ void ddr3_init(void)
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/* Apply the workaround for PG 1.0 and 1.1 Silicons */
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/* Apply the workaround for PG 1.0 and 1.1 Silicons */
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if (cpu_revision() <= 1)
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if (cpu_revision() <= 1)
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ddr3_err_reset_workaround();
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ddr3_err_reset_workaround();
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}
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/**
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* ddr3_get_size - return ddr3 size in GiB
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*/
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int ddr3_get_size(void)
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{
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return ddr3_size;
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return ddr3_size;
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}
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}
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@ -11,28 +11,20 @@
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#include "ddr3_cfg.h"
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#include "ddr3_cfg.h"
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#include <asm/arch/ddr3.h>
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#include <asm/arch/ddr3.h>
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static int ddr3_size;
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static struct pll_init_data ddr3_400 = DDR3_PLL_400;
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static struct pll_init_data ddr3_400 = DDR3_PLL_400;
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void ddr3_init(void)
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u32 ddr3_init(void)
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{
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{
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init_pll(&ddr3_400);
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init_pll(&ddr3_400);
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/* No SO-DIMM, 2GB discreet DDR */
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/* No SO-DIMM, 2GB discreet DDR */
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printf("DRAM: 2 GiB\n");
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printf("DRAM: 2 GiB\n");
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ddr3_size = 2;
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/* Reset DDR3 PHY after PLL enabled */
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/* Reset DDR3 PHY after PLL enabled */
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ddr3_reset_ddrphy();
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ddr3_reset_ddrphy();
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ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g);
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ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g);
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ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g);
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ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g);
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}
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/**
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return 2;
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* ddr3_get_size - return ddr3 size in GiB
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*/
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int ddr3_get_size(void)
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{
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return ddr3_size;
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}
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}
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