keystone2: ddr3: eliminate using global ddr3_size variable

KS2 ddr3 initialization uses ddr3_size global variable before u-boot
relocation. Even if the variable is not being used after relocation,
writing to it corrupts relocation table.

This patch removes the global ddr3_size variable and uses local one
instead.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Vitaly Andrianov 2015-02-11 14:07:58 -05:00 committed by Tom Rini
parent bba379d498
commit 66c98a0c38
6 changed files with 17 additions and 36 deletions

View file

@ -263,17 +263,14 @@ static void ddr3_map_ecc_cic2_irq(u32 base)
} }
#endif #endif
void ddr3_init_ecc(u32 base) void ddr3_init_ecc(u32 base, u32 ddr3_size)
{ {
u32 ddr3_size;
if (!ddr3_ecc_support_rmw(base)) { if (!ddr3_ecc_support_rmw(base)) {
ddr3_disable_ecc(base); ddr3_disable_ecc(base);
return; return;
} }
ddr3_ecc_init_range(base); ddr3_ecc_init_range(base);
ddr3_size = ddr3_get_size();
ddr3_reset_data(CONFIG_SYS_SDRAM_BASE, ddr3_size); ddr3_reset_data(CONFIG_SYS_SDRAM_BASE, ddr3_size);
/* mapping DDR3 ECC system interrupt from CIC2 to GIC */ /* mapping DDR3 ECC system interrupt from CIC2 to GIC */

View file

@ -48,10 +48,9 @@ struct ddr3_emif_config {
unsigned int sdrfc; unsigned int sdrfc;
}; };
void ddr3_init(void); u32 ddr3_init(void);
int ddr3_get_size(void);
void ddr3_reset_ddrphy(void); void ddr3_reset_ddrphy(void);
void ddr3_init_ecc(u32 base); void ddr3_init_ecc(u32 base, u32 ddr3_size);
void ddr3_disable_ecc(u32 base); void ddr3_disable_ecc(u32 base);
void ddr3_check_ecc_int(u32 base); void ddr3_check_ecc_int(u32 base);
int ddr3_ecc_support_rmw(u32 base); int ddr3_ecc_support_rmw(u32 base);

View file

@ -35,12 +35,14 @@ static struct aemif_config aemif_configs[] = {
int dram_init(void) int dram_init(void)
{ {
ddr3_init(); u32 ddr3_size;
ddr3_size = ddr3_init();
gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE); CONFIG_MAX_RAM_BANK_SIZE);
aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE); ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
return 0; return 0;
} }

View file

@ -11,11 +11,11 @@
#include "ddr3_cfg.h" #include "ddr3_cfg.h"
#include <asm/arch/ddr3.h> #include <asm/arch/ddr3.h>
static int ddr3_size;
static struct pll_init_data ddr3_400 = DDR3_PLL_400; static struct pll_init_data ddr3_400 = DDR3_PLL_400;
void ddr3_init(void) u32 ddr3_init(void)
{ {
u32 ddr3_size;
char dimm_name[32]; char dimm_name[32];
if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1)) if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1))
@ -43,13 +43,11 @@ void ddr3_init(void)
printf("DRAM: 4 GiB\n"); printf("DRAM: 4 GiB\n");
ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g); ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g);
ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g); ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g);
} else {
printf("Unknown SO-DIMM. Cannot configure DDR3\n");
while (1)
;
} }
}
/**
* ddr3_get_size - return ddr3 size in GiB
*/
int ddr3_get_size(void)
{
return ddr3_size; return ddr3_size;
} }

View file

@ -12,14 +12,13 @@
#include <asm/arch/ddr3.h> #include <asm/arch/ddr3.h>
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
static int ddr3_size;
struct pll_init_data ddr3a_333 = DDR3_PLL_333(A); struct pll_init_data ddr3a_333 = DDR3_PLL_333(A);
struct pll_init_data ddr3a_400 = DDR3_PLL_400(A); struct pll_init_data ddr3a_400 = DDR3_PLL_400(A);
void ddr3_init(void) u32 ddr3_init(void)
{ {
char dimm_name[32]; char dimm_name[32];
u32 ddr3_size;
ddr3_get_dimm_params(dimm_name); ddr3_get_dimm_params(dimm_name);
@ -93,12 +92,6 @@ void ddr3_init(void)
/* Apply the workaround for PG 1.0 and 1.1 Silicons */ /* Apply the workaround for PG 1.0 and 1.1 Silicons */
if (cpu_revision() <= 1) if (cpu_revision() <= 1)
ddr3_err_reset_workaround(); ddr3_err_reset_workaround();
}
/**
* ddr3_get_size - return ddr3 size in GiB
*/
int ddr3_get_size(void)
{
return ddr3_size; return ddr3_size;
} }

View file

@ -11,28 +11,20 @@
#include "ddr3_cfg.h" #include "ddr3_cfg.h"
#include <asm/arch/ddr3.h> #include <asm/arch/ddr3.h>
static int ddr3_size;
static struct pll_init_data ddr3_400 = DDR3_PLL_400; static struct pll_init_data ddr3_400 = DDR3_PLL_400;
void ddr3_init(void) u32 ddr3_init(void)
{ {
init_pll(&ddr3_400); init_pll(&ddr3_400);
/* No SO-DIMM, 2GB discreet DDR */ /* No SO-DIMM, 2GB discreet DDR */
printf("DRAM: 2 GiB\n"); printf("DRAM: 2 GiB\n");
ddr3_size = 2;
/* Reset DDR3 PHY after PLL enabled */ /* Reset DDR3 PHY after PLL enabled */
ddr3_reset_ddrphy(); ddr3_reset_ddrphy();
ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g); ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_2g);
ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g); ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_2g);
}
/** return 2;
* ddr3_get_size - return ddr3 size in GiB
*/
int ddr3_get_size(void)
{
return ddr3_size;
} }