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pandaboard: 1/1] ARM:OMAP4+: panda-es: Support Rev B3 Elpida DDR2 RAM

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Signed-off-by: Hardik Patel <hardik.patel@volansystech.com>
This commit is contained in:
Hardik Patel 2013-11-27 21:16:21 +05:30 • committed by Tom Rini
parent 3558243b6f
commit 675cc77a3a
3 changed files with 66 additions and 2 deletions
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4
arch/arm/cpu/armv7/omap4/sdram_elpida.c
View file

@ -32,7 +32,7 @@
#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
static const struct emif_regs emif_regs_elpida_200_mhz_2cs = { const struct emif_regs emif_regs_elpida_200_mhz_2cs = {
.sdram_config_init = 0x80000eb9, .sdram_config_init = 0x80000eb9,
.sdram_config = 0x80001ab9, .sdram_config = 0x80001ab9,
.ref_ctrl = 0x0000030c, .ref_ctrl = 0x0000030c,
@ -46,7 +46,7 @@ static const struct emif_regs emif_regs_elpida_200_mhz_2cs = {
.emif_ddr_phy_ctlr_1 = 0x049ff808 .emif_ddr_phy_ctlr_1 = 0x049ff808
}; };
static const struct emif_regs emif_regs_elpida_380_mhz_1cs = { const struct emif_regs emif_regs_elpida_380_mhz_1cs = {
.sdram_config_init = 0x80000eb1, .sdram_config_init = 0x80000eb1,
.sdram_config = 0x80001ab1, .sdram_config = 0x80001ab1,
.ref_ctrl = 0x000005cd, .ref_ctrl = 0x000005cd,

4
arch/arm/include/asm/arch-omap4/sys_proto.h
View file

@ -16,6 +16,10 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
extern const struct emif_regs emif_regs_elpida_400_mhz_1cs;
extern const struct emif_regs emif_regs_elpida_400_mhz_2cs;
struct omap_sysinfo { struct omap_sysinfo {
char *board_string; char *board_string;
}; };

60
board/ti/panda/panda.c
View file

@ -122,6 +122,66 @@ int get_board_revision(void)
return board_id; return board_id;
} }
/**
* is_panda_es_rev_b3() - Detect if we are running on rev B3 of panda board ES
*
*
* Detect if we are running on B3 version of ES panda board,
* This can be done by reading the level of GPIO 171 and checking the
* processor revisions.
* GPIO171: 1 => Panda ES Rev B3
*
* Return : return 1 if Panda ES Rev B3 , else return 0
*/
u8 is_panda_es_rev_b3(void)
{
int processor_rev = omap_revision();
int ret = 0;
if ((processor_rev >= OMAP4460_ES1_0 &&
processor_rev <= OMAP4460_ES1_1)) {
/* Setup the mux for the common board ID pins (gpio 171) */
writew((IEN | M3),
(*ctrl)->control_padconf_core_base + UNIPRO_TX0);
/* if processor_rev is panda ES and GPIO171 is 1,it is rev b3 */
ret = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
}
return ret;
}
#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
/*
* emif_get_reg_dump() - emif_get_reg_dump strong function
*
* @emif_nr - emif base
* @regs - reg dump of timing values
*
* Strong function to override emif_get_reg_dump weak function in sdram_elpida.c
*/
void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
{
u32 omap4_rev = omap_revision();
/* Same devices and geometry on both EMIFs */
if (omap4_rev == OMAP4430_ES1_0)
*regs = &emif_regs_elpida_380_mhz_1cs;
else if (omap4_rev == OMAP4430_ES2_0)
*regs = &emif_regs_elpida_200_mhz_2cs;
else if (omap4_rev == OMAP4430_ES2_3)
*regs = &emif_regs_elpida_400_mhz_1cs;
else if (omap4_rev < OMAP4470_ES1_0) {
if(is_panda_es_rev_b3())
*regs = &emif_regs_elpida_400_mhz_1cs;
else
*regs = &emif_regs_elpida_400_mhz_2cs;
}
else
*regs = &emif_regs_elpida_400_mhz_1cs;
}
#endif
/** /**
* @brief misc_init_r - Configure Panda board specific configurations * @brief misc_init_r - Configure Panda board specific configurations
* such as power configurations, ethernet initialization as phase2 of * such as power configurations, ethernet initialization as phase2 of