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arm: stm32: cleanup arch gpio.h

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Cosmetic update of gpio.h:
- remove enumerate: stm32_gpio_port, stm32_gpio_pin
  because STM32_GPIO_XXX values are unused
- move STM32_GPIOS_PER_BANK in stm32_gpio.c
  as its value is IP dependent and not arch dependent

No functional change as number of banks and number of gpio by banks
is managed by device tree since since DM migration and
commit 8f651ca60b ("pinctrl: stm32: Add get_pins_count() ops").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Patrick Delaunay 2020-10-02 14:08:54 +02:00
parent e07f76b25d
commit 6af78d03d3
3 changed files with 6 additions and 70 deletions
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37
arch/arm/include/asm/arch-stm32/gpio.h
View file

@ -7,39 +7,6 @@
#ifndef _GPIO_H_ #ifndef _GPIO_H_
#define _GPIO_H_ #define _GPIO_H_
#define STM32_GPIOS_PER_BANK 16
enum stm32_gpio_port {
STM32_GPIO_PORT_A = 0,
STM32_GPIO_PORT_B,
STM32_GPIO_PORT_C,
STM32_GPIO_PORT_D,
STM32_GPIO_PORT_E,
STM32_GPIO_PORT_F,
STM32_GPIO_PORT_G,
STM32_GPIO_PORT_H,
STM32_GPIO_PORT_I
};
enum stm32_gpio_pin {
STM32_GPIO_PIN_0 = 0,
STM32_GPIO_PIN_1,
STM32_GPIO_PIN_2,
STM32_GPIO_PIN_3,
STM32_GPIO_PIN_4,
STM32_GPIO_PIN_5,
STM32_GPIO_PIN_6,
STM32_GPIO_PIN_7,
STM32_GPIO_PIN_8,
STM32_GPIO_PIN_9,
STM32_GPIO_PIN_10,
STM32_GPIO_PIN_11,
STM32_GPIO_PIN_12,
STM32_GPIO_PIN_13,
STM32_GPIO_PIN_14,
STM32_GPIO_PIN_15
};
enum stm32_gpio_mode { enum stm32_gpio_mode {
STM32_GPIO_MODE_IN = 0, STM32_GPIO_MODE_IN = 0,
STM32_GPIO_MODE_OUT, STM32_GPIO_MODE_OUT,
@ -85,8 +52,8 @@ enum stm32_gpio_af {
}; };
struct stm32_gpio_dsc { struct stm32_gpio_dsc {
enum stm32_gpio_port port; u8 port;
enum stm32_gpio_pin pin; u8 pin;
}; };
struct stm32_gpio_ctl { struct stm32_gpio_ctl {

37
arch/arm/mach-stm32mp/include/mach/gpio.h
View file

@ -8,39 +8,6 @@
#define _STM32_GPIO_H_ #define _STM32_GPIO_H_
#include <asm/gpio.h> #include <asm/gpio.h>
#define STM32_GPIOS_PER_BANK 16
enum stm32_gpio_port {
STM32_GPIO_PORT_A = 0,
STM32_GPIO_PORT_B,
STM32_GPIO_PORT_C,
STM32_GPIO_PORT_D,
STM32_GPIO_PORT_E,
STM32_GPIO_PORT_F,
STM32_GPIO_PORT_G,
STM32_GPIO_PORT_H,
STM32_GPIO_PORT_I
};
enum stm32_gpio_pin {
STM32_GPIO_PIN_0 = 0,
STM32_GPIO_PIN_1,
STM32_GPIO_PIN_2,
STM32_GPIO_PIN_3,
STM32_GPIO_PIN_4,
STM32_GPIO_PIN_5,
STM32_GPIO_PIN_6,
STM32_GPIO_PIN_7,
STM32_GPIO_PIN_8,
STM32_GPIO_PIN_9,
STM32_GPIO_PIN_10,
STM32_GPIO_PIN_11,
STM32_GPIO_PIN_12,
STM32_GPIO_PIN_13,
STM32_GPIO_PIN_14,
STM32_GPIO_PIN_15
};
enum stm32_gpio_mode { enum stm32_gpio_mode {
STM32_GPIO_MODE_IN = 0, STM32_GPIO_MODE_IN = 0,
STM32_GPIO_MODE_OUT, STM32_GPIO_MODE_OUT,
@ -86,8 +53,8 @@ enum stm32_gpio_af {
}; };
struct stm32_gpio_dsc { struct stm32_gpio_dsc {
enum stm32_gpio_port port; u8 port;
enum stm32_gpio_pin pin; u8 pin;
}; };
struct stm32_gpio_ctl { struct stm32_gpio_ctl {

2
drivers/gpio/stm32_gpio.c
View file

@ -18,6 +18,8 @@
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/io.h> #include <linux/io.h>
#define STM32_GPIOS_PER_BANK 16
#define MODE_BITS(gpio_pin) ((gpio_pin) * 2) #define MODE_BITS(gpio_pin) ((gpio_pin) * 2)
#define MODE_BITS_MASK 3 #define MODE_BITS_MASK 3
#define BSRR_BIT(gpio_pin, value) BIT((gpio_pin) + (value ? 0 : 16)) #define BSRR_BIT(gpio_pin, value) BIT((gpio_pin) + (value ? 0 : 16))