ppc4xx: Consolidate pci_master_init() function

This patch removes the duplicted implementations of the pci_master_init()
function by introducing a weak default function for it. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2009-11-12 17:19:37 +01:00
parent a760b02031
commit 6c70049bd1
12 changed files with 31 additions and 181 deletions

View file

@ -466,27 +466,6 @@ phys_size_t initdram (int board_type)
#endif #endif
} }
/*************************************************************************
* pci_master_init
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*--------------------------------------------------------------------------+
| Write the PowerPC440 EP PCI Configuration regs.
| Enable PowerPC440 EP to be a master on the PCI bus (PMM).
| Enable PowerPC440 EP to act as a PCI memory target (PTM).
+--------------------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/*----------------------------------------------------------------------------+ /*----------------------------------------------------------------------------+
| is_powerpc440ep_pass1. | is_powerpc440ep_pass1.
+----------------------------------------------------------------------------*/ +----------------------------------------------------------------------------*/

View file

@ -370,23 +370,6 @@ void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
} }
#endif #endif
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
#if defined(CONFIG_POST) #if defined(CONFIG_POST)
/* /*
* Returns 1 if keys pressed to start the power-on long-running tests * Returns 1 if keys pressed to start the power-on long-running tests

View file

@ -352,27 +352,6 @@ phys_size_t initdram(int board)
return CONFIG_SYS_SDRAM_BANKS * (CONFIG_SYS_KBYTES_SDRAM * 1024); /* return bytes */ return CONFIG_SYS_SDRAM_BANKS * (CONFIG_SYS_KBYTES_SDRAM * 1024); /* return bytes */
} }
/*************************************************************************
* pci_master_init
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*--------------------------------------------------------------------------+
| Write the PowerPC440 EP PCI Configuration regs.
| Enable PowerPC440 EP to be a master on the PCI bus (PMM).
| Enable PowerPC440 EP to act as a PCI memory target (PTM).
+--------------------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/************************************************************************* /*************************************************************************
* hw_watchdog_reset * hw_watchdog_reset
* *

View file

@ -360,23 +360,6 @@ int checkboard(void)
return (0); return (0);
} }
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
int last_stage_init(void) int last_stage_init(void)
{ {
int e, i; int e, i;

View file

@ -39,6 +39,8 @@
#include <miiphy.h> #include <miiphy.h>
#endif #endif
#include <serial.h> #include <serial.h>
#include <asm/4xx_pci.h>
#include "fpga.h" #include "fpga.h"
#include "pmc440.h" #include "pmc440.h"
@ -600,24 +602,16 @@ void pci_target_init(struct pci_controller *hose)
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ #endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/* /*
* pci_master_init * Override weak default pci_master_init()
*/ */
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) #if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose) void pci_master_init(struct pci_controller *hose)
{ {
unsigned short temp_short;
/* /*
* Write the PowerPC440 EP PCI Configuration regs. * Only configure the master in monach mode
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/ */
if (is_monarch()) { if (is_monarch())
pci_read_config_word(0, PCI_COMMAND, &temp_short); __pci_master_init(hose);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
} }
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */ #endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */

View file

@ -174,24 +174,3 @@ int pci_pre_init(struct pci_controller *hose)
return 1; return 1;
} }
#endif /* defined(CONFIG_PCI) */ #endif /* defined(CONFIG_PCI) */
/*
* pci_master_init
*
*/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */

View file

@ -622,23 +622,6 @@ void pci_target_init(struct pci_controller *hose)
} }
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ #endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif
#if defined(CONFIG_POST) #if defined(CONFIG_POST)
/* /*
* Returns 1 if keys pressed to start the power-on long-running tests * Returns 1 if keys pressed to start the power-on long-running tests

View file

@ -275,27 +275,6 @@ int checkboard(void)
return (0); return (0);
} }
/*************************************************************************
* pci_master_init
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*--------------------------------------------------------------------------+
| Write the PowerPC440 EP PCI Configuration regs.
| Enable PowerPC440 EP to be a master on the PCI bus (PMM).
| Enable PowerPC440 EP to act as a PCI memory target (PTM).
+--------------------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
void hw_watchdog_reset(void) void hw_watchdog_reset(void)
{ {
int val; int val;

View file

@ -22,6 +22,8 @@
#include <asm/processor.h> #include <asm/processor.h>
#include <ppc440.h> #include <ppc440.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/4xx_pci.h>
#include "../common/nm.h" #include "../common/nm.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -377,23 +379,14 @@ int pci_pre_init(struct pci_controller *hose)
} }
/* /*
* pci_master_init * Override weak default pci_master_init()
*
*/ */
void pci_master_init(struct pci_controller *hose) void pci_master_init(struct pci_controller *hose)
{ {
unsigned short temp_short; if (!board_with_pci())
if (!board_with_pci()) { return; } return;
/*--------------------------------------------------------------- __pci_master_init(hose);
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*--------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
} }
#endif /* defined(CONFIG_PCI) */ #endif /* defined(CONFIG_PCI) */

View file

@ -550,27 +550,6 @@ phys_size_t initdram (int board_type)
return dram_size; return dram_size;
} }
/*************************************************************************
* pci_master_init
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*--------------------------------------------------------------------------+
| Write the PowerPC440 EP PCI Configuration regs.
| Enable PowerPC440 EP to be a master on the PCI bus (PMM).
| Enable PowerPC440 EP to act as a PCI memory target (PTM).
+--------------------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/************************************************************************* /*************************************************************************
* hw_watchdog_reset * hw_watchdog_reset
* *

View file

@ -686,6 +686,24 @@ void pci_target_init(struct pci_controller * hose)
int pci_pre_init(struct pci_controller *hose) int pci_pre_init(struct pci_controller *hose)
__attribute__((weak, alias("__pci_pre_init"))); __attribute__((weak, alias("__pci_pre_init")));
#if defined(CONFIG_SYS_PCI_MASTER_INIT)
void __pci_master_init(struct pci_controller *hose)
{
u16 reg;
/*
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/
pci_read_config_word(0, PCI_COMMAND, &reg);
pci_write_config_word(0, PCI_COMMAND, reg |
PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
}
void pci_master_init(struct pci_controller *hose)
__attribute__((weak, alias("__pci_master_init")));
#endif /* CONFIG_SYS_PCI_MASTER_INIT */
int pci_440_init (struct pci_controller *hose) int pci_440_init (struct pci_controller *hose)
{ {
int reg_num = 0; int reg_num = 0;

View file

@ -55,5 +55,6 @@ void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev);
int pci_arbiter_enabled(void); int pci_arbiter_enabled(void);
int __pci_pre_init(struct pci_controller *hose); int __pci_pre_init(struct pci_controller *hose);
void __pci_target_init(struct pci_controller *hose); void __pci_target_init(struct pci_controller *hose);
void __pci_master_init(struct pci_controller *hose);
#endif #endif