From ad61658dd6d81f451454074e9d41d0cf3317763f Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 7 Jul 2019 20:59:54 +0800 Subject: [PATCH 01/36] ARM: dts: import meerkat96 board support It imports device tree source of meerkat96 board from Linux Kernel. Signed-off-by: Shawn Guo --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx7d-meerkat96.dts | 375 +++++++++++++++++++++++++++++++ 2 files changed, 376 insertions(+) create mode 100644 arch/arm/dts/imx7d-meerkat96.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 727da1a280..5c07824135 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -633,6 +633,7 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7-colibri-emmc.dtb \ imx7-colibri-rawnand.dtb \ imx7s-warp.dtb \ + imx7d-meerkat96.dtb \ imx7d-pico-pi.dtb \ imx7d-pico-hobbit.dtb diff --git a/arch/arm/dts/imx7d-meerkat96.dts b/arch/arm/dts/imx7d-meerkat96.dts new file mode 100644 index 0000000000..dd8003bd1f --- /dev/null +++ b/arch/arm/dts/imx7d-meerkat96.dts @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2019 Linaro Ltd. + */ + +/dts-v1/; + +#include "imx7d.dtsi" + +/ { + model = "96Boards Meerkat96 Board"; + compatible = "novtech,imx7d-meerkat96", "fsl,imx7d"; + + chosen { + stdout-path = &uart6; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512MB */ + }; + + reg_wlreg_on: regulator-wlreg-on { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wlreg_on>; + regulator-name = "wlreg_on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100>; + gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg1_vbus: regulator-usb-otg1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usb_otg2_vbus: regulator-usb-otg2-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led1 { + label = "green:user1"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + led2 { + label = "green:user2"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + + led3 { + label = "green:user3"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + linux,default-trigger = "mmc1"; + default-state = "off"; + }; + + led4 { + label = "green:user4"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + linux,default-trigger = "none"; + default-state = "off"; + panic-indicator; + }; + + led5 { + label = "yellow:wlan"; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + led6 { + label = "blue:bt"; + gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "bluetooth-power"; + default-state = "off"; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; +}; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + uart-has-rtscts; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + status = "okay"; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart7 &pinctrl_bt_gpios>; + assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + uart-has-rtscts; + fsl,dte-mode; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + device-wakeup-gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>; + }; +}; + +&usbotg1 { + vbus-supply = <®_usb_otg1_vbus>; + status = "okay"; +}; + +&usbotg2 { + vbus-supply = <®_usb_otg2_vbus>; + dr_mode = "host"; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + keep-power-in-suspend; + fsl,tuning-step = <2>; + vmmc-supply = <®_3p3v>; + no-1-8-v; + broken-cd; + status = "okay"; +}; + +&usdhc3 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <4>; + no-1-8-v; + no-mmc; + non-removable; + keep-power-in-suspend; + wakeup-source; + vmmc-supply = <®_wlreg_on>; + vqmmc-supply =<®_3p3v>; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wlan_irq>; + interrupt-parent = <&gpio6>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wake"; + }; +}; + +&iomuxc { + pinctrl_bt_gpios: btgpiosgrp { + fsl,pins = < + MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13 0x59 + MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x1f + >; + }; + + pinctrl_gpio_leds: gpioledsgrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 + MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x59 + MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59 + MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x59 + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x59 + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f + MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f + MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA 0x4000007f + MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL 0x4000007f + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f + MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f + >; + }; + + pinctrl_lcdif: lcdifgrp { + fsl,pins = < + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 + MX7D_PAD_LCD_RESET__LCD_RESET 0x79 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79 + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX7D_PAD_SD3_DATA4__UART3_DCE_RX 0x79 + MX7D_PAD_SD3_DATA5__UART3_DCE_TX 0x79 + MX7D_PAD_SD3_DATA6__UART3_DCE_RTS 0x79 + MX7D_PAD_SD3_DATA7__UART3_DCE_CTS 0x79 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX7D_PAD_SD1_CD_B__UART6_DCE_RX 0x79 + MX7D_PAD_SD1_WP__UART6_DCE_TX 0x79 + >; + }; + + pinctrl_uart7: uart7grp { + fsl,pins = < + MX7D_PAD_ECSPI2_SCLK__UART7_DTE_TX 0x79 + MX7D_PAD_ECSPI2_MOSI__UART7_DTE_RX 0x79 + MX7D_PAD_ECSPI2_MISO__UART7_DTE_CTS 0x79 + MX7D_PAD_ECSPI2_SS0__UART7_DTE_RTS 0x79 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 + MX7D_PAD_SD3_CLK__SD3_CLK 0x0D + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 + >; + }; + + pinctrl_wlan_irq: wlanirqgrp { + fsl,pins = < + MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 0x19 + >; + }; + + pinctrl_wlreg_on: wlregongrp { + fsl,pins = < + MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15 0x19 + >; + }; +}; From 6802d7951c8f5a6098a30ab686e867dc0724affc Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 7 Jul 2019 20:59:55 +0800 Subject: [PATCH 02/36] Add i.MX7D based Meerkat96 board support The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of 96Boards community and complies with all Consumer Edition board specifications. https://www.novtech.com/products/meerkat96.html https://www.96boards.org/product/imx7-96/ The initial supported/tested devices include: - Debug serial - SD - USB Host (with Ethernet) With these support, it's good enough for loading Linux Kernel from SD or Ethernet over USB. Signed-off-by: Shawn Guo Reviewed-by: Peng Fan Tested-by: Manivannan Sadhasivam --- arch/arm/mach-imx/mx7/Kconfig | 10 +++ board/novtech/meerkat96/Kconfig | 12 +++ board/novtech/meerkat96/MAINTAINERS | 6 ++ board/novtech/meerkat96/Makefile | 1 + board/novtech/meerkat96/README | 18 ++++ board/novtech/meerkat96/imximage.cfg | 127 +++++++++++++++++++++++++++ board/novtech/meerkat96/meerkat96.c | 71 +++++++++++++++ configs/meerkat96_defconfig | 52 +++++++++++ include/configs/meerkat96.h | 48 ++++++++++ 9 files changed, 345 insertions(+) create mode 100644 board/novtech/meerkat96/Kconfig create mode 100644 board/novtech/meerkat96/MAINTAINERS create mode 100644 board/novtech/meerkat96/Makefile create mode 100644 board/novtech/meerkat96/README create mode 100644 board/novtech/meerkat96/imximage.cfg create mode 100644 board/novtech/meerkat96/meerkat96.c create mode 100644 configs/meerkat96_defconfig create mode 100644 include/configs/meerkat96.h diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 232f33285d..286d36589d 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -28,6 +28,15 @@ config TARGET_CL_SOM_IMX7 select SUPPORT_SPL imply CMD_DM +config TARGET_MEERKAT96 + bool "NovTech Meerkat96 board" + select BOARD_LATE_INIT + select DM + select DM_SERIAL + select DM_THERMAL + select MX7D + imply CMD_DM + config TARGET_MX7DSABRESD bool "mx7dsabresd" select BOARD_LATE_INIT @@ -67,6 +76,7 @@ config SYS_SOC source "board/compulab/cl-som-imx7/Kconfig" source "board/freescale/mx7dsabresd/Kconfig" +source "board/novtech/meerkat96/Kconfig" source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" diff --git a/board/novtech/meerkat96/Kconfig b/board/novtech/meerkat96/Kconfig new file mode 100644 index 0000000000..b0e46fcc1b --- /dev/null +++ b/board/novtech/meerkat96/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MEERKAT96 + +config SYS_BOARD + default "meerkat96" + +config SYS_VENDOR + default "novtech" + +config SYS_CONFIG_NAME + default "meerkat96" + +endif diff --git a/board/novtech/meerkat96/MAINTAINERS b/board/novtech/meerkat96/MAINTAINERS new file mode 100644 index 0000000000..0eca2940d5 --- /dev/null +++ b/board/novtech/meerkat96/MAINTAINERS @@ -0,0 +1,6 @@ +MEERKAT96 BOARD +M: Shawn Guo +S: Maintained +F: board/novtech/meerkat96 +F: include/configs/meerkat96.h +F: configs/meerkat96_defconfig diff --git a/board/novtech/meerkat96/Makefile b/board/novtech/meerkat96/Makefile new file mode 100644 index 0000000000..f27e05641b --- /dev/null +++ b/board/novtech/meerkat96/Makefile @@ -0,0 +1 @@ +obj-y := meerkat96.o diff --git a/board/novtech/meerkat96/README b/board/novtech/meerkat96/README new file mode 100644 index 0000000000..bca2fad5a2 --- /dev/null +++ b/board/novtech/meerkat96/README @@ -0,0 +1,18 @@ +* Build U-Boot for Meerkat96 board + + $ make mrproper + $ make meerkat96_defconfig + $ make + + It will generate the U-Boot binary called u-boot-dtb.imx + +* Install U-Boot to MicroSD card + + Plug MicroSD card to a Linux machine (with card reader), find the + device name and replace sd[x] with the name in the following command. + + $ sudo dd if=u-boot-dtb.imx of=/dev/sd[x] bs=512 seek=2 + + It will install U-Boot to MicroSD card at 1KiB offset. Insert the + card to Meerkat96 MicroSD slot, power up the board, and U-Boot should + boot from the card. diff --git a/board/novtech/meerkat96/imximage.cfg b/board/novtech/meerkat96/imximage.cfg new file mode 100644 index 0000000000..3bd8cc55e5 --- /dev/null +++ b/board/novtech/meerkat96/imximage.cfg @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : sd + */ + +BOOT_FROM sd + +/* + * Secure boot support + */ +#ifdef CONFIG_SECURE_BOOT +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable OCRAM EPDC */ +DATA 4 0x30340004 0x4F400005 + +/* ============================================================================= + * DDR Controller Registers + * ============================================================================= + * Memory type: DDR3 + * Manufacturer: ISSI + * Device Part Number: IS43TR16256AL-125KBL + * Clock Freq.: 533MHz + * Density per CS in Gb: 4 + * Chip Selects used: 1 + * Number of Banks: 8 + * Row address: 15 + * Column address: 10 + * Data bus width: 16 + * ROW-BANK interleave: ENABLED + * ============================================================================= + */ + +DATA 4 0x30391000 0x00000002 // deassert presetn +DATA 4 0x307A0000 0x01041001 // DDRC_MSTR +DATA 4 0x307A0064 0x00400046 // DDRC_RFSHTMG +DATA 4 0x307a0490 0x00000001 // DDRC_PCTRL_0 +DATA 4 0x307A00D4 0x00690000 // DDRC_INIT1 +DATA 4 0x307A00D0 0x00020083 // DDRC_INIT0 +DATA 4 0x307A00DC 0x09300004 // DDRC_INIT3 +DATA 4 0x307A00E0 0x04080000 // DDRC_INIT4 +DATA 4 0x307A00E4 0x00100004 // DDRC_INIT5 +DATA 4 0x307A00F4 0x0000033F // DDRC_RANKCTL +DATA 4 0x307A0100 0x090B1109 // DDRC_DRAMTMG0 +DATA 4 0x307A0104 0x0007020D // DDRC_DRAMTMG1 +DATA 4 0x307A0108 0x03040407 // DDRC_DRAMTMG2 +DATA 4 0x307A010C 0x00002006 // DDRC_DRAMTMG3 +DATA 4 0x307A0110 0x04020205 // DDRC_DRAMTMG4 +DATA 4 0x307A0114 0x03030202 // DDRC_DRAMTMG5 +DATA 4 0x307A0120 0x00000803 // DDRC_DRAMTMG8 +DATA 4 0x307A0180 0x00800020 // DDRC_ZQCTL0 +DATA 4 0x307A0190 0x02098204 // DDRC_DFITMG0 +DATA 4 0x307A0194 0x00030303 // DDRC_DFITMG1 +DATA 4 0x307A01A0 0x80400003 // DDRC_DFIUPD0 +DATA 4 0x307A01A4 0x00100020 // DDRC_DFIUPD1 +DATA 4 0x307A01A8 0x80100004 // DDRC_DFIUPD2 +DATA 4 0x307A0200 0x00000015 // DDRC_ADDRMAP0 +DATA 4 0x307A0204 0x00070707 // DDRC_ADDRMAP1 +DATA 4 0x307A0210 0x00000F0F // DDRC_ADDRMAP4 +DATA 4 0x307A0214 0x06060606 // DDRC_ADDRMAP5 +DATA 4 0x307A0218 0x0F060606 // DDRC_ADDRMAP6 +DATA 4 0x307A0240 0x06000604 // DDRC_ODTCFG +DATA 4 0x307A0244 0x00000001 // DDRC_ODTMAP + + +/* ============================================================================= + * PHY Control Register + * ============================================================================= + */ + +DATA 4 0x30391000 0x00000000 // deassert presetn +DATA 4 0x30790000 0x17420F40 // DDR_PHY_PHY_CON0 +DATA 4 0x30790004 0x10210100 // DDR_PHY_PHY_CON1 +DATA 4 0x30790010 0x00060807 // DDR_PHY_PHY_CON4 +DATA 4 0x307900B0 0x1010007E // DDR_PHY_MDLL_CON0 +DATA 4 0x3079009C 0x00000D6E // DDR_PHY_DRVDS_CON0 +DATA 4 0x30790030 0x08080808 // DDR_PHY_OFFSET_WR_CON0 +DATA 4 0x30790020 0x08080808 // DDR_PHY_OFFSET_RD_CON0 +DATA 4 0x30790050 0x01000010 // DDR_PHY_OFFSETD_CON0 +DATA 4 0x30790050 0x00000010 // DDR_PHY_OFFSETD_CON0 +DATA 4 0x30790018 0x0000000F // DDR_PHY_LP_CON0 +DATA 4 0x307900C0 0x0E407304 // DDR_PHY_ZQ_CON0 - Start Manual ZQ +DATA 4 0x307900C0 0x0E447304 +DATA 4 0x307900C0 0x0E447306 +DATA 4 0x307900C0 0x0E447304 // <= NOTE: Depending on JTAG device used, may need ~ 7 us pause at this point. +DATA 4 0x307900C0 0x0E407304 // DDR_PHY_ZQ_CON0 - End Manual ZQ + + +/* ============================================================================= + * Final Initialization start sequence + * ============================================================================= + */ + +DATA 4 0x30384130 0x00000000 // Disable Clock +DATA 4 0x30340020 0x00000178 // IOMUX_GRP_GRP8 - Start input to PHY +DATA 4 0x30384130 0x00000002 // Enable Clock +/* <= NOTE: Depending on JTAG device used, may need ~ 250 us pause at this point. */ diff --git a/board/novtech/meerkat96/meerkat96.c b/board/novtech/meerkat96/meerkat96.c new file mode 100644 index 0000000000..5fb4d43997 --- /dev/null +++ b/board/novtech/meerkat96/meerkat96.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Linaro Ltd. + * Copyright (C) 2016 NXP Semiconductors + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ + PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) + +static iomux_v3_cfg_t const meerkat96_pads[] = { + /* UART6 as debug serial */ + MX7D_PAD_SD1_CD_B__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_SD1_WP__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + /* WDOG1 for reset */ + MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_SIZE; + + return 0; +} + +int board_early_init_f(void) +{ + imx_iomux_v3_setup_multiple_pads(meerkat96_pads, + ARRAY_SIZE(meerkat96_pads)); + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int checkboard(void) +{ + char *mode; + + if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT)) + mode = "secure"; + else + mode = "non-secure"; + + printf("Board: i.MX7D Meerkat96 in %s mode\n", mode); + + return 0; +} + +int board_late_init(void) +{ + set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR); + + return 0; +} diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig new file mode 100644 index 0000000000..a2b5194679 --- /dev/null +++ b/configs/meerkat96_defconfig @@ -0,0 +1,52 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_MEERKAT96=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +# CONFIG_ARMV7_VIRT is not set +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/novtech/meerkat96/imximage.cfg" +CONFIG_BOUNCE_BUFFER=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_MMC_BROKEN_CD=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h new file mode 100644 index 0000000000..d0450af954 --- /dev/null +++ b/include/configs/meerkat96.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Linaro Ltd. + * Copyright (C) 2016 NXP Semiconductors + * + * Configuration settings for Meerkat96 board. + */ + +#ifndef __MEERKAT96_CONFIG_H +#define __MEERKAT96_CONFIG_H + +#include "mx7_common.h" +#include + +#define PHYS_SDRAM_SIZE SZ_512M + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Environment configs */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_OFFSET (8 * SZ_64K) + +/* USB configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) + +#endif From 6ee03c92121575b8a2d4a2c7f39959fdf32436ef Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Thu, 20 Jun 2019 22:34:35 +0200 Subject: [PATCH 03/36] mx6: mx6sabre common: Use more conventional spelling of fdtfile Both the distro boot configuration as well as the general pxe support standardized on fdtfile as the variable to hold the dtb filename. Adjust to follow that such that e.g. "pxe boot" will just work. Signed-off-by: Sjoerd Simons --- include/configs/mx6sabre_common.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index d704cda2a6..56b10d8eb2 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -51,7 +51,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ - "fdt_file=undefined\0" \ + "fdtfile=undefined\0" \ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ @@ -87,7 +87,7 @@ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run finduuid; " \ "run mmcargs; " \ @@ -116,7 +116,7 @@ "fi; " \ "${get_cmd} ${image}; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "if ${get_cmd} ${fdt_addr} ${fdtfile}; then " \ "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ @@ -129,20 +129,20 @@ "bootz; " \ "fi;\0" \ "findfdt="\ - "if test $fdt_file = undefined; then " \ + "if test $fdtfile = undefined; then " \ "if test $board_name = SABREAUTO && test $board_rev = MX6QP; then " \ - "setenv fdt_file imx6qp-sabreauto.dtb; fi; " \ + "setenv fdtfile imx6qp-sabreauto.dtb; fi; " \ "if test $board_name = SABREAUTO && test $board_rev = MX6Q; then " \ - "setenv fdt_file imx6q-sabreauto.dtb; fi; " \ + "setenv fdtfile imx6q-sabreauto.dtb; fi; " \ "if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \ - "setenv fdt_file imx6dl-sabreauto.dtb; fi; " \ + "setenv fdtfile imx6dl-sabreauto.dtb; fi; " \ "if test $board_name = SABRESD && test $board_rev = MX6QP; then " \ - "setenv fdt_file imx6qp-sabresd.dtb; fi; " \ + "setenv fdtfile imx6qp-sabresd.dtb; fi; " \ "if test $board_name = SABRESD && test $board_rev = MX6Q; then " \ - "setenv fdt_file imx6q-sabresd.dtb; fi; " \ + "setenv fdtfile imx6q-sabresd.dtb; fi; " \ "if test $board_name = SABRESD && test $board_rev = MX6DL; then " \ - "setenv fdt_file imx6dl-sabresd.dtb; fi; " \ - "if test $fdt_file = undefined; then " \ + "setenv fdtfile imx6dl-sabresd.dtb; fi; " \ + "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine dtb to use; fi; " \ "fi;\0" \ From dc6c8fb84e805c81b8ae5765f1ef8455ba5e0903 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 11 Oct 2019 00:59:48 +0200 Subject: [PATCH 04/36] ARM: dts: imx6q-tbs2910: Sync devicetree with kernel 5.3 Signed-off-by: Soeren Moch --- arch/arm/dts/imx6q-tbs2910.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/imx6q-tbs2910.dts b/arch/arm/dts/imx6q-tbs2910.dts index 21e62c0cab..cc5df37b46 100644 --- a/arch/arm/dts/imx6q-tbs2910.dts +++ b/arch/arm/dts/imx6q-tbs2910.dts @@ -24,6 +24,7 @@ }; memory@10000000 { + device_type = "memory"; reg = <0x10000000 0x80000000>; }; @@ -104,7 +105,7 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; status = "okay"; }; From 2fabe35187a3523e72437e415bc1be9187be010a Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 11 Oct 2019 00:59:49 +0200 Subject: [PATCH 05/36] board: tbs2910: Convert pci to driver model So we can get rid of legacy pci config code. PCI_PNP is not required for this board, remove it to reduce the size of the u-boot binary. DM_PCI does not start the host controller automatically anymore. Do so in preboot instead. Signed-off-by: Soeren Moch --- board/tbs/tbs2910/tbs2910.c | 17 ----------------- configs/tbs2910_defconfig | 4 +++- 2 files changed, 3 insertions(+), 18 deletions(-) diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index d8db7a884f..efc6f88198 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -22,10 +22,6 @@ #include DECLARE_GLOBAL_DATA_PTR; -#define WEAK_PULLUP (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_SRE_SLOW) - #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) @@ -63,13 +59,6 @@ static iomux_v3_cfg_t const enet_pads[] = { MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -static iomux_v3_cfg_t const pcie_pads[] = { - /* W_DISABLE# */ - MX6_PAD_KEY_COL4__GPIO4_IO14 | MUX_PAD_CTRL(WEAK_PULLUP), - /* PERST# */ - MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - int dram_init(void) { gd->ram_size = 2048ul * 1024 * 1024; @@ -87,11 +76,6 @@ static void setup_iomux_enet(void) gpio_set_value(IMX_GPIO_NR(1, 25), 1); } -static void setup_pcie(void) -{ - imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads)); -} - static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); @@ -236,7 +220,6 @@ int board_phy_config(struct phy_device *phydev) int board_eth_init(bd_t *bis) { setup_iomux_enet(); - setup_pcie(); return cpu_eth_init(bis); } diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 3148a325e9..98e5ca0846 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -9,7 +9,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="usb start; if hdmidet; then run set_con_hdmi; else run set_con_serial; fi" +CONFIG_PREBOOT="echo PCI:; pci enum; pci 1; usb start; if hdmidet; then run set_con_hdmi; else run set_con_serial; fi" CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOUNCE_BUFFER=y @@ -54,6 +54,8 @@ CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y +# CONFIG_PCI_PNP is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_RTC=y From 954252aa350931ebf6b114cd0f59a05ab03f6bbf Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 11 Oct 2019 00:59:50 +0200 Subject: [PATCH 06/36] board: tbs2910: Convert eth to driver model So we can remove lots of legacy config code. Signed-off-by: Soeren Moch --- board/tbs/tbs2910/tbs2910.c | 75 ------------------------------------- configs/tbs2910_defconfig | 3 ++ include/configs/tbs2910.h | 9 ----- 3 files changed, 3 insertions(+), 84 deletions(-) diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index efc6f88198..b4fd183394 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -14,8 +14,6 @@ #include #include #include -#include -#include #include #include #include @@ -26,9 +24,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), @@ -39,43 +34,12 @@ static iomux_v3_cfg_t const uart2_pads[] = { MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; -static iomux_v3_cfg_t const enet_pads[] = { - MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - /* AR8035 PHY Reset */ - MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - int dram_init(void) { gd->ram_size = 2048ul * 1024 * 1024; return 0; } -static void setup_iomux_enet(void) -{ - imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); - - /* Reset AR8035 PHY */ - gpio_request(IMX_GPIO_NR(1, 25), "ETH_PHY_RESET"); - gpio_direction_output(IMX_GPIO_NR(1, 25) , 0); - udelay(500); - gpio_set_value(IMX_GPIO_NR(1, 25), 1); -} - static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); @@ -184,45 +148,6 @@ static void setup_display(void) } #endif /* CONFIG_VIDEO_IPUV3 */ -static int ar8035_phy_fixup(struct phy_device *phydev) -{ - unsigned short val; - - /* To enable AR8035 ouput a 125MHz clk from CLK_25M */ - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); - phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); - - val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); - val &= 0xffe3; - val |= 0x18; - phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); - - /* introduce tx clock delay */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); - val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); - val |= 0x0100; - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - ar8035_phy_fixup(phydev); - - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - -int board_eth_init(bd_t *bis) -{ - setup_iomux_enet(); - return cpu_eth_init(bis); -} - int board_early_init_f(void) { setup_iomux_uart(); diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 98e5ca0846..42e6f58eee 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -52,6 +52,9 @@ CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 11f76e777b..46d67a7fcf 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -40,15 +40,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ -/* Ethernet */ -#define CONFIG_FEC_MXC -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHY_ATHEROS - /* Framebuffer */ #ifdef CONFIG_VIDEO #define CONFIG_VIDEO_BMP_RLE8 From f9faa1616b3ba09797d127eb63b00a210cc7f0af Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Wed, 9 Oct 2019 12:53:55 -0500 Subject: [PATCH 07/36] ARM: imx6q_logic: Enable 256KB OCRAM Since this board config only supports, the i.MX6D/i.MX6Q configurations, 256K of on-chip RAM is available which increases the space available to SPL to help further reduce board code and further enable device tree functions. This patch enables 256K of RAM. Signed-off-by: Adam Ford Reviewed-by: Fabio Estevam --- configs/imx6q_logic_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 6125ee2bc2..a9e8cbea94 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_MX6_OCRAM_256KB=y CONFIG_TARGET_MX6LOGICPD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y From 2881ec544d316f435ec5f064269be41446e2a522 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Wed, 9 Oct 2019 12:53:56 -0500 Subject: [PATCH 08/36] ARM: imx6q_logic: Enable Pin muxing in SPL With the 256KB of OCRAM available to SPL now, there should be enough room to enable the pinmuxing in SPL from the device tree. This patch enables SPL_PINCTRL et al and adds the serial and usdhc pin mux references to the -u-boot.dtsi file so the pins can be configured from the device tree. Signed-off-by: Adam Ford Reviewed-by: Fabio Estevam Reviewed-by: Peng Fan --- arch/arm/dts/imx6q-logicpd-u-boot.dtsi | 12 ++++++++++++ configs/imx6q_logic_defconfig | 1 + 2 files changed, 13 insertions(+) diff --git a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi index 625bed8f7d..ee44ed91fe 100644 --- a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi +++ b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi @@ -16,3 +16,15 @@ &usdhc2 { u-boot,dm-spl; }; + +&pinctrl_uart1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index a9e8cbea94..c120cb2f54 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -78,6 +78,7 @@ CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_REGULATOR=y From 43db8e3e41c4e70641c64984918572dfe3facdb1 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Wed, 9 Oct 2019 12:53:57 -0500 Subject: [PATCH 09/36] ARM: imx6q_logic: Remove legacy pinmuxing code from board file. With the OCRAM expanded to 256KB and the SPL_PINCTRL enabled with -u-boot.dtsi entries to include the pinmuxing in SPL, the manual code setting up the pinmux can go away. This patch removes the legacy pinmuxing code from the board file. Signed-off-by: Adam Ford Reviewed-by: Fabio Estevam --- board/logicpd/imx6/imx6logic.c | 85 ---------------------------------- 1 file changed, 85 deletions(-) diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index 4bacd8660a..3c1a3a9fa2 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -42,32 +42,6 @@ int dram_init(void) return 0; } -static iomux_v3_cfg_t const uart1_pads[] = { - MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static iomux_v3_cfg_t const uart2_pads[] = { - MX6_PAD_SD4_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD4_DAT5__UART2_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD4_DAT6__UART2_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD4_DAT7__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static iomux_v3_cfg_t const uart3_pads[] = { - MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_EIM_EB3__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static void setup_iomux_uart(void) -{ - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); - imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); - imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads)); -} - static iomux_v3_cfg_t const nand_pads[] = { MX6_PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL), MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL), @@ -135,7 +109,6 @@ int overwrite_console(void) int board_early_init_f(void) { - setup_iomux_uart(); setup_nand_pins(); return 0; } @@ -177,36 +150,6 @@ int spl_start_uboot(void) } #endif -/* SD interface */ -#define USDHC_PAD_CTRL \ - (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc1_pads[] = { - MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -#ifdef CONFIG_FSL_ESDHC_IMX -struct fsl_esdhc_cfg usdhc_cfg[] = { - {USDHC1_BASE_ADDR}, /* SOM */ - {USDHC2_BASE_ADDR} /* Baseboard */ -}; - void board_boot_order(u32 *spl_boot_list) { struct src *psrc = (struct src *)SRC_BASE_ADDR; @@ -236,34 +179,6 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[2] = BOOT_DEVICE_BOARD; } -int board_mmc_init(bd_t *bis) -{ - struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned int reg = readl(&psrc->sbmr1) >> 11; - /* - * Upon reading BOOT_CFG register the following map is done: - * Bit 11 and 12 of BOOT_CFG register can determine the current - * mmc port - * 0x1 SD1-SOM - * 0x2 SD2-Baseboard - */ - - reg &= 0x3; /* Only care about bottom 2 bits */ - - switch (reg) { - case 0: - SETUP_IOMUX_PADS(usdhc1_pads); - break; - case 1: - SETUP_IOMUX_PADS(usdhc2_pads); - break; - } - - return 0; -} - -#endif - static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; From b86745efea580e0da82dc061afc5159f0809e057 Mon Sep 17 00:00:00 2001 From: Jun Nie Date: Tue, 16 Jul 2019 15:42:56 +0800 Subject: [PATCH 10/36] pico-imx7d: add config to enable CAAM Add config to enable CAAM so that hardware random number generator works. Signed-off-by: Jun Nie --- configs/pico-imx7d_bl33_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index d7752446cd..c3c309c93c 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SECURE_BOOT=y CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y From 7cc7c1e9db61ecf02e6f9b7d3d27171aaf1719fe Mon Sep 17 00:00:00 2001 From: Jun Nie Date: Tue, 16 Jul 2019 15:42:57 +0800 Subject: [PATCH 11/36] pico-imx7d: Support distro boot for FIT image case Support distro boot for pico imx7d in FIT image case. Signed-off-by: Jun Nie Tested-by: Joris Offouga --- include/configs/pico-imx7d.h | 37 +++++++++++------------------------- 1 file changed, 11 insertions(+), 26 deletions(-) diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 5c4b90a8a1..607784e423 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -55,17 +55,17 @@ /* When booting with FIT specify the node entry containing boot.scr */ #if defined(CONFIG_FIT) #define PICO_BOOT_ENV \ - "bootscr_fitimage_name=bootscr\0" \ - "bootscriptaddr=0x83200000\0" \ - "fdtovaddr=0x83100000\0" \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "rootwait rw;\0" \ - "loadbootscript=" \ - "load mmc ${mmcdev}:${mmcpart} ${bootscriptaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source ${bootscriptaddr}:${bootscr_fitimage_name}\0" + BOOTENV \ + "fdtovaddr=0x83100000\0" \ + "scriptaddr=0x83200000\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "rootwait rw\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "iminfo ${scriptaddr};" \ + "if test $? -eq 1; then hab_failsafe; fi;" \ + "source ${scriptaddr}:bootscr\0" #else #define PICO_BOOT_ENV \ "bootmenu_0=Boot using PICO-Hobbit baseboard=" \ @@ -112,21 +112,6 @@ "setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \ PICO_BOOT_ENV -#if defined(CONFIG_FIT) -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "iminfo ${bootscriptaddr};" \ - "if test $? -eq 1; then hab_failsafe; fi;" \ - "run bootscript; " \ - "else " \ - "echo Fail to load fitImage with boot script;" \ - "hab_failsafe;" \ - "fi; " \ - "fi" -#endif - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ From a142e601f89ed6ca91e5a960618939dbb04f4a87 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:22 +0200 Subject: [PATCH 12/36] imx: tpc70: config: Add script commands to update u-boot and OE's wic Signed-off-by: Lukasz Majewski --- include/configs/kp_imx6q_tpc.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index c160ad5bf6..d20fc7eb10 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -81,11 +81,32 @@ "rdinit=/sbin/init\0" \ "addinitrd=setenv bootargs ${bootargs} rdinit=${rdinit} ${debug} \0" \ "fit_config=mx6q_tpc70_conf\0" \ + "uboot_file=u-boot.img\0" \ + "SPL_file=SPL\0" \ + "wic_file=kp-image-kpimx6qtpc.wic\0" \ "upd_image=st.4k\0" \ "updargs=setenv bootargs console=${console} ${smp}"\ "rdinit=${rdinit} ${debug} ${displayargs}\0" \ "loadusb=usb start; " \ "fatload usb 0 ${loadaddr} ${upd_image}\0" \ + "upd_uboot_sd=" \ + "if tftp ${loadaddr} ${uboot_file}; then " \ + "setexpr blkc ${filesize} / 0x200;" \ + "setexpr blkc ${blkc} + 1;" \ + "mmc write ${loadaddr} 0x8A ${blkc};" \ + "fi;\0" \ + "upd_SPL_sd=" \ + "if tftp ${loadaddr} ${SPL_file}; then " \ + "setexpr blkc ${filesize} / 0x200;" \ + "setexpr blkc ${blkc} + 1;" \ + "mmc write ${loadaddr} 0x2 ${blkc};" \ + "fi;\0" \ + "upd_wic=" \ + "if tftp ${loadaddr} ${wic_file}; then " \ + "setexpr blkc ${filesize} / 0x200;" \ + "setexpr blkc ${blkc} + 1;" \ + "mmc write ${loadaddr} 0x0 ${blkc};" \ + "fi;\0" \ "usbupd=echo Booting update from usb ...; " \ "setenv bootargs; " \ "run updargs; " \ From 309ce98fcbc186789f11794af491f8e6c9627443 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:23 +0200 Subject: [PATCH 13/36] imx: tpc70: config: Update TPC70 config to support eMMC's boot0 SPL update The TPC70 can boot from eMMC's boot0. This patch allows it to update this HW partition's SPL. Signed-off-by: Lukasz Majewski --- include/configs/kp_imx6q_tpc.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index d20fc7eb10..28b4b55e6a 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -42,6 +42,7 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_MMC_ENV_DEV 1 /* 0 = SDHC2, 1 = SDHC4 (eMMC) */ +#define CONFIG_SUPPORT_EMMC_BOOT /* UART */ #define CONFIG_MXC_UART @@ -101,6 +102,10 @@ "setexpr blkc ${blkc} + 1;" \ "mmc write ${loadaddr} 0x2 ${blkc};" \ "fi;\0" \ + "upd_SPL_mmc=mmc dev 1; mmc partconf 1 0 1 1; run upd_SPL_sd\0" \ + "upd_uboot_mmc=mmc dev 1; mmc partconf 1 0 1 1; run upd_uboot_sd\0" \ + "up_mmc=run upd_SPL_mmc; run upd_uboot_mmc\0" \ + "up_sd=run upd_SPL_sd; run upd_uboot_sd\0" \ "upd_wic=" \ "if tftp ${loadaddr} ${wic_file}; then " \ "setexpr blkc ${filesize} / 0x200;" \ From 58c76e63f17f87afdc45ec32a84c5e86fc2b6fdd Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:24 +0200 Subject: [PATCH 14/36] imx: tpc70: Add board_boot_order() to distinguish between eMMC and SD boot The TPC70 can boot from SD card (debug/development) and eMMC (production). The board_boot_order() function provides a run time check for the device from which one wants to boot (it is selected by GPIO pins setup). Moreover, a fallback to SD card is provided if the detection is not possible or working properly. Signed-off-by: Lukasz Majewski --- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c index e284d5ec57..e48a577f79 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c @@ -308,6 +308,26 @@ int board_mmc_init(bd_t *bd) return fsl_esdhc_initialize(bd, &usdhc_cfg[0]); } +void board_boot_order(u32 *spl_boot_list) +{ + u32 boot_device = spl_boot_device(); + u32 reg = imx6_src_get_boot_mode(); + + reg = (reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT; + + debug("%s: boot device: 0x%x (0x4 SD, 0x6 eMMC)\n", __func__, reg); + if (boot_device == BOOT_DEVICE_MMC1) + if (reg == IMX6_BMODE_MMC || reg == IMX6_BMODE_EMMC) + boot_device = BOOT_DEVICE_MMC2; + + spl_boot_list[0] = boot_device; + /* + * Below boot device is a 'fallback' - it shall always be possible to + * boot from SD card + */ + spl_boot_list[1] = BOOT_DEVICE_MMC1; +} + void board_init_f(ulong dummy) { /* setup AIPS and disable watchdog */ From eff76b10faba9f2896ac499457508d607a661f50 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:25 +0200 Subject: [PATCH 15/36] imx: tpc70: cosmetic: Replace magic numbers when setting ENET clock This is a cosmetic change, just to use proper define instead of magic numbers. Signed-off-by: Lukasz Majewski --- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index 2c541ace02..144d2c58c4 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -119,7 +119,8 @@ static int setup_fec_clock(void) struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; /* set gpr1[21] to select anatop clock */ - clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, 0x1 << 21); + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK, + IOMUXC_GPR1_ENET_CLK_SEL_MASK); return enable_fec_anatop_clock(0, ENET_50MHZ); } From b7cb2ae72de706d2c435c4abea2b83a8acf18ca0 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:26 +0200 Subject: [PATCH 16/36] imx: tpc70: led: Enable LED default state This change sets the default state of LEDs on TPC70. Signed-off-by: Lukasz Majewski --- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index 144d2c58c4..7876a63068 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -28,6 +28,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -291,6 +292,9 @@ int board_late_init(void) add_board_boot_modes(board_boot_modes); #endif + if (IS_ENABLED(CONFIG_LED)) + led_default_state(); + env_set("boardname", "kp-tpc"); env_set("boardsoc", "imx6q"); return 0; From f1a46398f0abe64fd216068787ddf9b4553ea218 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:27 +0200 Subject: [PATCH 17/36] imx: tpc70: dts: Add TPC70 board (imx6q based) device tree description This commit defines the TPC70 imx6q board with device tree description. Signed-off-by: Lukasz Majewski --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6q-kp.dts | 219 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 220 insertions(+) create mode 100644 arch/arm/dts/imx6q-kp.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5c07824135..7d1de944e1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -580,6 +580,7 @@ dtb-y += \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \ imx6q-icore-rqs.dtb \ + imx6q-kp.dtb \ imx6q-logicpd.dtb \ imx6q-nitrogen6x.dtb \ imx6q-novena.dtb \ diff --git a/arch/arm/dts/imx6q-kp.dts b/arch/arm/dts/imx6q-kp.dts new file mode 100644 index 0000000000..12d6db6f80 --- /dev/null +++ b/arch/arm/dts/imx6q-kp.dts @@ -0,0 +1,219 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + */ + +/dts-v1/; +#include +#include "imx6q.dtsi" + +/ { + model = "K+P iMX6Q"; + compatible = "kp,imx6-kp", "fsl,imx6"; + + aliases { + mmc0 = &usdhc2; + mmc1 = &usdhc4; + usb1 = &usbh1; + }; + + chosen { + stdout-path = &uart1; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + green { + label = "green"; + gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "gpio"; + default-state = "off"; + }; + + red { + label = "red"; + gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "gpio"; + default-state = "off"; + }; + }; + + memory@10000000 { + reg = <0x10000000 0x40000000>; + }; + + reg_usb_h1_vbus: regulator-usb_h1_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-mode = "rgmii"; + fsl,magic-packet; + fsl,enet-loopback-clk; /* anatop reference clk via PAD loopback */ + fsl,enet-freq = <1>; /* ENET_25MHZ = 0, ENET_50MHZ = 1 */ + /* ENET_100MHZ = 2, ENET_125MHZ = 3 */ + status = "okay"; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&iomuxc { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 + >; + }; + + pinctrl_leds: gpioledsgrp { + fsl,pins = < + MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b0 + MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 + >; + }; + + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b1 + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17019 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10019 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17019 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17019 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17019 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17019 + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x20000 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x20000 + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17019 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10019 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17019 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17019 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17019 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17019 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17019 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17019 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17019 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17019 + >; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + vbus-supply = <®_usb_h1_vbus>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; + non-removable; + no-1-8-v; + keep-power-in-suspend; + status = "okay"; +}; From 62cef35bb0be0ef83052f5515433c159817a2289 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:28 +0200 Subject: [PATCH 18/36] imx: dts: Add u-boot specific set of device tree properties for tpc70 This commit adds new file - imx6q-kp-u-boot.dtsi with a set of u-boot specific properties for imx6q KP device. Signed-off-by: Lukasz Majewski --- arch/arm/dts/imx6q-kp-u-boot.dtsi | 59 +++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 arch/arm/dts/imx6q-kp-u-boot.dtsi diff --git a/arch/arm/dts/imx6q-kp-u-boot.dtsi b/arch/arm/dts/imx6q-kp-u-boot.dtsi new file mode 100644 index 0000000000..e6b71b22ae --- /dev/null +++ b/arch/arm/dts/imx6q-kp-u-boot.dtsi @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + */ + +#include "imx6qdl-u-boot.dtsi" + +/ { + clocks { + u-boot,dm-spl; + osc { + u-boot,dm-spl; + }; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + }; +}; + +&clks { + u-boot,dm-pre-reloc; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&pinctrl_uart1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc4 { + u-boot,dm-spl; +}; + +&uart1 { + u-boot,dm-spl; +}; + +&usdhc2 { + u-boot,dm-spl; +}; + +&usdhc4 { + u-boot,dm-spl; +}; + +&wdog1 { + u-boot,dm-spl; +}; From 0bcb11fa1f04baeb0d5462a358aa86b16062bebd Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:29 +0200 Subject: [PATCH 19/36] imx: tpc70: Convert TPC70 (imx6q) board to use DM/DTS in SPL and u-boot This patch converts the TPC70 to use driver model and device tree description in both SPL and u-boot proper. Notable changes (DM/DTS conversion): - PINCTRL{_IMX6} - DM_I2C - enable 'regulator' and 'pmic' commands - DM_MMC and BLK (USDHC) - DM_ETH - DM WDT (including SYSRESET) Signed-off-by: Lukasz Majewski --- arch/arm/mach-imx/mx6/Kconfig | 10 ++ board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 165 +--------------------- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 133 +---------------- configs/kp_imx6q_tpc_defconfig | 30 +++- include/configs/kp_imx6q_tpc.h | 21 --- 5 files changed, 45 insertions(+), 314 deletions(-) diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 7e5a667e81..00e3c486bc 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -510,9 +510,19 @@ config TARGET_KP_IMX6Q_TPC select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select DM + select SPL_DM if SPL select DM_THERMAL + select DM_MMC + select DM_ETH + select DM_REGULATOR + select SPL_DM_REGULATOR if SPL + select DM_SERIAL + select DM_I2C + select DM_GPIO + select DM_USB select MX6QDL select SUPPORT_SPL + select SPL_SEPARATE_BSS if SPL imply CMD_DM imply CMD_SPL diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index 7876a63068..22ae94e99f 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -9,65 +9,18 @@ #include #include #include -#include #include #include -#include -#include #include -#include -#include #include #include -#include -#include -#include #include -#include -#include -#include #include #include #include DECLARE_GLOBAL_DATA_PTR; -#define ENET_PAD_CTRL \ - (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ - PAD_CTL_HYS) - -#define I2C_PAD_CTRL \ - (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ - PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST) - -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) - -static struct i2c_pads_info kp_imx6q_tpc_i2c_pad_info0 = { - .scl = { - .i2c_mode = MX6Q_PAD_CSI0_DAT9__I2C1_SCL | PC, - .gpio_mode = MX6Q_PAD_CSI0_DAT9__GPIO5_IO27 | PC, - .gp = IMX_GPIO_NR(5, 27) - }, - .sda = { - .i2c_mode = MX6Q_PAD_CSI0_DAT8__I2C1_SDA | PC, - .gpio_mode = MX6Q_PAD_CSI0_DAT8__GPIO5_IO26 | PC, - .gp = IMX_GPIO_NR(5, 26) - } -}; - -static struct i2c_pads_info kp_imx6q_tpc_i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, - .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, - .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC, - .gp = IMX_GPIO_NR(4, 13) - } -}; - int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -84,37 +37,6 @@ int overwrite_console(void) } #ifdef CONFIG_FEC_MXC -static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - /* AR8031 PHY Reset */ - IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -static void eth_phy_reset(void) -{ - /* Reset AR8031 PHY */ - gpio_direction_output(IMX_GPIO_NR(1, 25), 0); - mdelay(10); - gpio_set_value(IMX_GPIO_NR(1, 25), 1); - udelay(100); -} - static int setup_fec_clock(void) { struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; @@ -126,15 +48,6 @@ static int setup_fec_clock(void) return enable_fec_anatop_clock(0, ENET_50MHZ); } -int board_eth_init(bd_t *bis) -{ - SETUP_IOMUX_PADS(enet_pads); - setup_fec_clock(); - eth_phy_reset(); - - return cpu_eth_init(bis); -} - static int ar8031_phy_fixup(struct phy_device *phydev) { unsigned short val; @@ -169,53 +82,6 @@ int board_phy_config(struct phy_device *phydev) } #endif -#ifdef CONFIG_FSL_ESDHC_IMX - -#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) -static struct fsl_esdhc_cfg usdhc_cfg[] = { - { USDHC2_BASE_ADDR }, - { USDHC4_BASE_ADDR }, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - return !gpio_get_value(USDHC2_CD_GPIO); - case USDHC4_BASE_ADDR: - return 1; /* eMMC/uSDHC4 is always present */ - } - - return 0; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-Boot device node) (Physical Port) - * mmc0 micro SD - * mmc2 eMMC - */ - gpio_direction_input(USDHC2_CD_GPIO); - - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) - return ret; - } - - return 0; -} -#endif - #ifdef CONFIG_USB_EHCI_MX6 static void setup_usb(void) { @@ -225,30 +91,6 @@ static void setup_usb(void) */ imx_iomux_set_gpr_register(1, 13, 1, 0); } - -int board_usb_phy_mode(int port) -{ - if (port == 1) - return USB_INIT_HOST; - else - return USB_INIT_DEVICE; -} - -int board_ehci_power(int port, int on) -{ - switch (port) { - case 0: - break; - case 1: - gpio_direction_output(IMX_GPIO_NR(3, 31), !!on); - break; - default: - printf("MXC USB port %d not yet supported\n", port); - return -EINVAL; - } - - return 0; -} #endif int board_early_init_f(void) @@ -257,6 +99,10 @@ int board_early_init_f(void) setup_usb(); #endif +#ifdef CONFIG_FEC_MXC + setup_fec_clock(); +#endif + return 0; } @@ -270,9 +116,6 @@ int board_init(void) /* Enable eim_slow clocks */ setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET); - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &kp_imx6q_tpc_i2c_pad_info0); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &kp_imx6q_tpc_i2c_pad_info1); - return 0; } diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c index e48a577f79..25a5e4b9ba 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c @@ -9,30 +9,12 @@ #include #include #include -#include #include -#include #include -#include -#include -#include -#include #include #include -#include -#include -#include -#include #include -#define UART_PAD_CTRL \ - (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -#define USDHC_PAD_CTRL \ - (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - DECLARE_GLOBAL_DATA_PTR; static void ccgr_init(void) @@ -48,60 +30,6 @@ static void ccgr_init(void) writel(0x000003FF, &ccm->CCGR6); } -/* onboard microSD */ -static iomux_v3_cfg_t const usdhc2_pads[] = { - IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -/* eMMC */ -static iomux_v3_cfg_t const usdhc4_pads[] = { - IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), -}; - -/* SD */ -static void setup_iomux_sd(void) -{ - SETUP_IOMUX_PADS(usdhc2_pads); - SETUP_IOMUX_PADS(usdhc4_pads); -} - -/* UART */ -static iomux_v3_cfg_t const uart1_pads[] = { - IOMUX_PADS(PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), -}; - -static void setup_iomux_uart(void) -{ - SETUP_IOMUX_PADS(uart1_pads); -} - -/* USB */ -static iomux_v3_cfg_t const usb_pads[] = { - IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL)), - IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -static void setup_iomux_usb(void) -{ - SETUP_IOMUX_PADS(usb_pads); -} - /* DDR3 */ static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = { .dram_sdclk_0 = 0x00000030, @@ -255,59 +183,6 @@ static void spl_dram_init(void) #endif } -struct fsl_esdhc_cfg usdhc_cfg[] = { - {USDHC2_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - case USDHC4_BASE_ADDR: - ret = 1; /* eMMC/uSDHC4 is always present */ - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bd) -{ - struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned int reg = readl(&psrc->sbmr1) >> 11; - /* - * Upon reading BOOT_CFG register the following map is done: - * Bit 11 and 12 of BOOT_CFG register can determine the current - * mmc port - * 0x1 SD1 - * 0x3 SD4 - */ - - switch (reg & 0x3) { - case 0x1: - SETUP_IOMUX_PADS(usdhc2_pads); - usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; - break; - case 0x3: - SETUP_IOMUX_PADS(usdhc4_pads); - usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; - break; - } - - return fsl_esdhc_initialize(bd, &usdhc_cfg[0]); -} - void board_boot_order(u32 *spl_boot_list) { u32 boot_device = spl_boot_device(); @@ -339,9 +214,8 @@ void board_init_f(ulong dummy) /* setup GP timer */ timer_init(); - setup_iomux_sd(); - setup_iomux_uart(); - setup_iomux_usb(); + /* Early - pre reloc - driver model setup */ + spl_early_init(); /* UART clocks enabled and gd valid - init serial console */ preloader_console_init(); @@ -351,7 +225,4 @@ void board_init_f(ulong dummy) /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); - - /* load/boot image from boot device */ - board_init_r(NULL, 0); } diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index fdfb899903..3d93c20999 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2200 CONFIG_MX6_DDRCAL=y CONFIG_TARGET_KP_IMX6Q_TPC=y CONFIG_SPL_MMC_SUPPORT=y @@ -14,11 +15,14 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOUNCE_BUFFER=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR="." @@ -33,14 +37,38 @@ CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-kp" +CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents interrupts dmas dma-names" CONFIG_ENV_IS_IN_MMC=y +# CONFIG_BLOCK_CACHE is not set +CONFIG_SPL_CLK_IMX6Q=y +CONFIG_CLK_IMX6Q=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 28b4b55e6a..08cf90280e 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -25,30 +25,9 @@ #define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M) /* FEC ethernet */ -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_ARP_TIMEOUT 200UL -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_SPEED 100000 - -/* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_MMC_ENV_DEV 1 /* 0 = SDHC2, 1 = SDHC4 (eMMC) */ -#define CONFIG_SUPPORT_EMMC_BOOT - -/* UART */ -#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 /* USB Configs */ #ifdef CONFIG_CMD_USB From 5e9387130566219ab70170f9c6d98966be5a960a Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Thu, 10 Oct 2019 16:11:30 +0200 Subject: [PATCH 20/36] imx: config: Update KP's TPC70 config to support SWUpdate This patch updates envs responsible for using USB pendrive as a SWUpdate based tool for recovery and update. Signed-off-by: Lukasz Majewski --- include/configs/kp_imx6q_tpc.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 08cf90280e..f6746a93ca 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -65,8 +65,9 @@ "SPL_file=SPL\0" \ "wic_file=kp-image-kpimx6qtpc.wic\0" \ "upd_image=st.4k\0" \ - "updargs=setenv bootargs console=${console} ${smp}"\ - "rdinit=${rdinit} ${debug} ${displayargs}\0" \ + "updargs=setenv bootargs console=${console} ${smp} ${displayargs}\0" \ + "initrd_ram_dev=/dev/ram\0" \ + "addswupdate=setenv bootargs ${bootargs} root=${initrd_ram_dev} rw\0" \ "loadusb=usb start; " \ "fatload usb 0 ${loadaddr} ${upd_image}\0" \ "upd_uboot_sd=" \ @@ -94,6 +95,8 @@ "usbupd=echo Booting update from usb ...; " \ "setenv bootargs; " \ "run updargs; " \ + "run addinitrd; " \ + "run addswupdate; " \ "run loadusb; " \ "bootm ${loadaddr}#${fit_config}\0" \ BOOTENV From 9a2738581af7892687fe0c8a6588983452921fb9 Mon Sep 17 00:00:00 2001 From: Ye Li Date: Fri, 12 Jul 2019 09:33:52 +0000 Subject: [PATCH 21/36] imx8: Jump from alias to OCRAM address at SPL init When running SPL on iMX8, the A core starts at address 0 which is a alias to OCRAM 0x100000. The alias only map first 96KB of OCRAM, so this require the SPL size can't beyond 96KB. But when using SPL DM, the size increase significantly and may exceed 96KB. So to fix the problem, we will change SPL linker address to OCRAM address 0x100000. And then jump to the absolute address not the PC relative address for entering OCRAM. Signed-off-by: Ye Li Reviewed-by: Oleksandr Suvorov --- arch/arm/Kconfig | 1 + arch/arm/include/asm/arch-imx8/boot0.h | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 arch/arm/include/asm/arch-imx8/boot0.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c5027c1338..1df2aba3c2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -788,6 +788,7 @@ config ARCH_IMX8 select ARM64 select DM select OF_CONTROL + select ENABLE_ARM_SOC_BOOT0_HOOK config ARCH_IMX8M bool "NXP i.MX8M platform" diff --git a/arch/arm/include/asm/arch-imx8/boot0.h b/arch/arm/include/asm/arch-imx8/boot0.h new file mode 100644 index 0000000000..5ce781adb7 --- /dev/null +++ b/arch/arm/include/asm/arch-imx8/boot0.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#if defined(CONFIG_SPL_BUILD) + /* + * We use absolute address not PC relative address to jump. + * When running SPL on iMX8, the A core starts at address 0, a alias to OCRAM 0x100000, + * our linker address for SPL is from 0x100000. So using absolute address can jump to + * the OCRAM address from the alias. + * The alias only map first 96KB of OCRAM, so this require the SPL size can't beyond 96KB. + * But when using SPL DM, the size increase significantly and may exceed 96KB. + * That's why we have to jump to OCRAM. + */ + + ldr x0, =reset + br x0 +#else + b reset +#endif From f9f42b07ff7b986699977c3e3c1eebe8a0535a72 Mon Sep 17 00:00:00 2001 From: Ye Li Date: Fri, 12 Jul 2019 09:33:55 +0000 Subject: [PATCH 22/36] imx8qm/qxp: Set SPL TEXT base to OCRAM base Modify the SPL TEXT base from OCRAM alias to OCRAM base 0x100000, so we can use full OCRAM not limit to 96KB Signed-off-by: Ye Li Reviewed-by: Oleksandr Suvorov --- configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + include/configs/imx8qm_mek.h | 1 - 3 files changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 57cf659b25..747f3ea9f3 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -3,6 +3,7 @@ CONFIG_SPL_SYS_ICACHE_OFF=y CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_IMX8=y CONFIG_SYS_TEXT_BASE=0x80020000 +CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index ded6036be9..2f41e1bac2 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -3,6 +3,7 @@ CONFIG_SPL_SYS_ICACHE_OFF=y CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_IMX8=y CONFIG_SYS_TEXT_BASE=0x80020000 +CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 869035172e..2b8f85ded1 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -10,7 +10,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_TEXT_BASE 0x0 #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR From 5f1e987c8bef414b24c08ddb3adc135c440349c6 Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Fri, 11 Oct 2019 12:57:06 +0300 Subject: [PATCH 23/36] apalis_imx6: remove legacy sdboot wrapper Remove legacy sdboot wrapper as distroboot can be used instead. Signed-off-by: Igor Opaniuk --- include/configs/apalis_imx6.h | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 5139b01ab3..a5f9a96732 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -158,24 +158,6 @@ "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} ${fdt_file} " \ "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" -#define SD_BOOTCMD \ - "set_sdargs=setenv sdargs ip=off root=PARTUUID=${uuid} ro,noatime " \ - "rootfstype=ext4 rootwait\0" \ - "sdboot=run setup; run sdfinduuid; run set_sdargs; " \ - "setenv bootargs ${defargs} ${sdargs} ${setupargs} " \ - "${vidargs}; echo Booting from SD card; " \ - "run sddtbload; load mmc ${sddev}:${sdbootpart} " \ - "${kernel_addr_r} ${boot_file} && run fdt_fixup && " \ - "bootz ${kernel_addr_r} ${dtbparam}\0" \ - "sdbootpart=1\0" \ - "sddev=1\0" \ - "sddtbload=setenv dtbparam; load mmc ${sddev}:${sdbootpart} " \ - "${fdt_addr_r} " \ - "${fdt_file} && setenv dtbparam \" - " \ - "${fdt_addr_r}\" && true\0" \ - "sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \ - "sdrootpart=2\0" - #ifndef CONFIG_TDX_APALIS_IMX6_V1_0 #define FDT_FILE "imx6q-apalis-eval.dtb" #define FDT_FILE_V1_0 "imx6q-apalis_v1_0-eval.dtb" @@ -196,7 +178,6 @@ "fdt_fixup=;\0" \ MEM_LAYOUT_ENV_SETTINGS \ NFS_BOOTCMD \ - SD_BOOTCMD \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ "flash_eth.img && source ${loadaddr}\0" \ From 3bae9bb2863df21a63e4be6196d13c4f2e89482d Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Fri, 11 Oct 2019 12:57:07 +0300 Subject: [PATCH 24/36] colibri-imx6ull: remove legacy sdboot wrapper Remove legacy sdboot wrapper as distroboot can be used instead. Signed-off-by: Igor Opaniuk --- include/configs/colibri-imx6ull.h | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 0a4f30fbaf..de94eb95fe 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -56,19 +56,6 @@ "tftp ${fdt_addr_r} " FDT_FILE " && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ -#define SD_BOOTCMD \ - "set_sdargs=setenv sdargs root=PARTUUID=${uuid} ro rootwait\0" \ - "sdboot=run setup; run sdfinduuid; run set_sdargs; " \ - "setenv bootargs ${defargs} ${sdargs} " \ - "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ - "load mmc ${sddev}:${sdbootpart} ${kernel_addr_r} ${kernel_file} && " \ - "load mmc ${sddev}:${sdbootpart} ${fdt_addr_r} " FDT_FILE " && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ - "sdbootpart=1\0" \ - "sddev=0\0" \ - "sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \ - "sdrootpart=2\0" - #define UBI_BOOTCMD \ "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \ "ubi.fm_autoconvert=1\0" \ @@ -95,7 +82,6 @@ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ NFS_BOOTCMD \ - SD_BOOTCMD \ UBI_BOOTCMD \ "console=ttymxc0\0" \ "defargs=user_debug=30\0" \ From 541bfadc70479a8e585a2fc1834b568d7ce527a0 Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Fri, 11 Oct 2019 12:57:08 +0300 Subject: [PATCH 25/36] colibri_imx6: remove legacy sdboot wrapper Remove legacy sdboot wrapper as distroboot can be used instead. Signed-off-by: Igor Opaniuk --- include/configs/colibri_imx6.h | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 69bf8225fe..1f2b89e722 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -148,23 +148,6 @@ "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} ${fdt_file} " \ "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" -#define SD_BOOTCMD \ - "set_sdargs=setenv sdargs ip=off root=PARTUUID=${uuid} rw,noatime " \ - "rootfstype=ext4 rootwait\0" \ - "sdboot=run setup; run sdfinduuid; run set_sdargs; " \ - "setenv bootargs ${defargs} ${sdargs} ${setupargs} " \ - "${vidargs}; echo Booting from SD card; " \ - "run sddtbload; load mmc ${sddev}:${sdbootpart} "\ - "${kernel_addr_r} ${boot_file} && run fdt_fixup && " \ - "bootz ${kernel_addr_r} ${dtbparam}\0" \ - "sdbootpart=1\0" \ - "sddev=1\0" \ - "sddtbload=setenv dtbparam; load mmc ${sddev}:${sdbootpart} " \ - "${fdt_addr_r} ${fdt_file} && setenv dtbparam \" - " \ - "${fdt_addr_r}\" && true\0" \ - "sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \ - "sdrootpart=2\0" - #define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ @@ -180,7 +163,6 @@ "fdt_fixup=;\0" \ MEM_LAYOUT_ENV_SETTINGS \ NFS_BOOTCMD \ - SD_BOOTCMD \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ "flash_eth.img && source ${loadaddr}\0" \ From e2c3c2e32c51d9bab98123782d561b204b6e163d Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Fri, 11 Oct 2019 12:57:09 +0300 Subject: [PATCH 26/36] colibri_imx7: remove legacy sdboot wrapper Remove legacy sdboot wrapper as distroboot can be used instead. Signed-off-by: Igor Opaniuk --- include/configs/colibri_imx7.h | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index ade4df5ad8..c2d98291b0 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -109,28 +109,6 @@ "ramdisk_addr_r=0x82100000\0" \ "scriptaddr=0x82500000\0" -#if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND) -#define SD_BOOTDEV 0 -#elif defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC) -#define SD_BOOTDEV 1 -#endif - -#define SD_BOOTCMD \ - "set_sdargs=setenv sdargs root=PARTUUID=${uuid} ro rootwait\0" \ - "sdboot=run setup; run sdfinduuid; run set_sdargs; " \ - "setenv bootargs ${defargs} ${sdargs} " \ - "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ - "run m4boot && " \ - "load mmc ${sddev}:${sdbootpart} ${kernel_addr_r} ${kernel_file} && " \ - "load mmc ${sddev}:${sdbootpart} ${fdt_addr_r} " \ - "${soc}-colibri-${fdt_board}.dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ - "sdbootpart=1\0" \ - "sddev=" __stringify(SD_BOOTDEV) "\0" \ - "sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \ - "sdrootpart=2\0" - - #define NFS_BOOTCMD \ "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ "nfsboot=run setup; " \ @@ -184,7 +162,6 @@ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ NFS_BOOTCMD \ - SD_BOOTCMD \ MODULE_EXTRA_ENV_SETTINGS \ "boot_file=zImage\0" \ "console=ttymxc0\0" \ From 80cc95140cc1edc0744e3773cdfdcbe799d8c943 Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Tue, 18 Jun 2019 22:13:20 +0200 Subject: [PATCH 27/36] spl, Makefile: Take external offset into account for fit images When building a FIT image for SPL to load also take into account the configured external offset. This allows the SPL to load the u-boot FIT image correctly when configuring SECURE_BOOT on i.mx6 is enabled (with CONFIG_FIT_EXTERNAL_OFFSET=0x3000). Note this doesn't allow secure booting; but it does allow an unsigned SPL/u-boot with secure boot support eanbled to boot on open device. Signed-off-by: Sjoerd Simons --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 842bc6c11b..6fda3268e7 100644 --- a/Makefile +++ b/Makefile @@ -1260,6 +1260,7 @@ endif ifdef CONFIG_SPL_LOAD_FIT MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ + -p $(CONFIG_FIT_EXTERNAL_OFFSET) \ -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \ $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) else From 792b253658d7fa9c08717c802fa02e80d44e85ec Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Mon, 22 Jul 2019 12:05:06 +0300 Subject: [PATCH 28/36] colibri_imx7: provide proper node name to pmic_get Implementation of pmic_get() uses uclass_find_device_by_name(), which behaviour was changed in 4213609cc7 ("drivers: core: use strcmp when find device by name"). Now we have to supply full node name with unit address. Fixes boot issue: U-Boot 2019.07-00788-g0ef6e69a1e-dirty (Jul 19 2019 - 15:27:02 +0300) CPU: Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz) CPU: Extended Commercial temperature grade (-20C to 105C) at 41C Reset cause: POR DRAM: 512 MiB initcall sequence 9ffd3a4c failed at call 87803c61 (err=-19) ERROR Please RESET the board Fixes: 4213609cc7("drivers: core: use strcmp when find device by name") Signed-off-by: Igor Opaniuk Reviewed-by: Oleksandr Suvorov --- board/toradex/colibri_imx7/colibri_imx7.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index 0eb83474c4..c001316591 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -274,7 +274,7 @@ int power_init_board(void) int ret; - ret = pmic_get("rn5t567", &dev); + ret = pmic_get("rn5t567@33", &dev); if (ret) return ret; ver = pmic_reg_read(dev, RN5T567_LSIVER); @@ -308,7 +308,7 @@ void reset_cpu(ulong addr) { struct udevice *dev; - pmic_get("rn5t567", &dev); + pmic_get("rn5t567@33", &dev); /* Use PMIC to reset, set REPWRTIM to 0 and REPWRON to 1 */ pmic_reg_write(dev, RN5T567_REPCNT, 0x1); From 4e1c879f71296777ce59b0130c415cfcabf35c8e Mon Sep 17 00:00:00 2001 From: Shyam Saini Date: Fri, 14 Jun 2019 13:05:34 +0530 Subject: [PATCH 29/36] configs: icorem6: Enable nandbcb command This also enables mtd configs which are required by nandbcb command. This command would be used to configure boot control block(BCB) while writing spl image on nand device. Signed-off-by: Shyam Saini --- configs/imx6qdl_icore_mmc_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 6f4f712c8a..23e78a8ef4 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_BASE=0x021f0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set +CONFIG_CMD_NANDBCB=y CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_FIT=y @@ -58,6 +59,9 @@ CONFIG_SYS_I2C_MXC=y CONFIG_FSL_USDHC=y CONFIG_NAND=y CONFIG_NAND_MXS=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" +CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:2m(spl),2m(uboot),1m(env),8m(kernel),1m(dtb),-(rootfs)" CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y From 89bc388a320a0a42c60582b02264a0d95c287c3b Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 18 Jul 2019 15:04:22 -0300 Subject: [PATCH 30/36] imx: Place imx_ddr_size() into a separate file Place imx_ddr_size() into a separate file. The motivation for doing this is to be able to easily reuse imx_ddr_size() on i.MX7ULP. Currently imx_ddr_size() is inside arch/arm/mach-imx/cpu.c, which is not built for i.MX7ULP. Changing the logic to allow building cpu.c for i.MX7UP would require adding several ifdef's, leading to a not a very elegant solution. To allow better reuse, just place imx_ddr_size() into a common mmdc_size.c file. Signed-off-by: Fabio Estevam Signed-off-by: Stefano Babic --- arch/arm/mach-imx/Makefile | 3 ++ arch/arm/mach-imx/cpu.c | 53 --------------------------------- arch/arm/mach-imx/mmdc_size.c | 55 +++++++++++++++++++++++++++++++++++ 3 files changed, 58 insertions(+), 53 deletions(-) create mode 100644 arch/arm/mach-imx/mmdc_size.c diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index fbd99a3499..cb6ef533de 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -21,6 +21,9 @@ endif ifeq ($(SOC),$(filter $(SOC),mx5 mx6)) obj-y += cpu.o speed.o +ifneq ($(CONFIG_MX51),y) +obj-y += mmdc_size.o +endif obj-$(CONFIG_GPT_TIMER) += timer.o obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o endif diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index efd8fc614a..d39f607e3f 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -87,59 +87,6 @@ static char *get_reset_cause(void) } #endif -#if defined(CONFIG_MX53) || defined(CONFIG_MX6) -#if defined(CONFIG_MX53) -#define MEMCTL_BASE ESDCTL_BASE_ADDR -#else -#define MEMCTL_BASE MMDC_P0_BASE_ADDR -#endif -static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; -static const unsigned char bank_lookup[] = {3, 2}; - -/* these MMDC registers are common to the IMX53 and IMX6 */ -struct esd_mmdc_regs { - uint32_t ctl; - uint32_t pdc; - uint32_t otc; - uint32_t cfg0; - uint32_t cfg1; - uint32_t cfg2; - uint32_t misc; -}; - -#define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7) -#define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl >> 20) & 7) -#define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl >> 16) & 3) -#define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl >> 30) & 1) -#define ESD_MMDC_MISC_GET_BANK(mdmisc) ((misc >> 5) & 1) - -/* - * imx_ddr_size - return size in bytes of DRAM according MMDC config - * The MMDC MDCTL register holds the number of bits for row, col, and data - * width and the MMDC MDMISC register holds the number of banks. Combine - * all these bits to determine the meme size the MMDC has been configured for - */ -unsigned imx_ddr_size(void) -{ - struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE; - unsigned ctl = readl(&mem->ctl); - unsigned misc = readl(&mem->misc); - int bits = 11 + 0 + 0 + 1; /* row + col + bank + width */ - - bits += ESD_MMDC_CTL_GET_ROW(ctl); - bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)]; - bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)]; - bits += ESD_MMDC_CTL_GET_WIDTH(ctl); - bits += ESD_MMDC_CTL_GET_CS1(ctl); - - /* The MX6 can do only 3840 MiB of DRAM */ - if (bits == 32) - return 0xf0000000; - - return 1 << bits; -} -#endif - #if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) const char *get_imx_type(u32 imxtype) diff --git a/arch/arm/mach-imx/mmdc_size.c b/arch/arm/mach-imx/mmdc_size.c new file mode 100644 index 0000000000..8a3c6bdea6 --- /dev/null +++ b/arch/arm/mach-imx/mmdc_size.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include + +#if defined(CONFIG_MX53) +#define MEMCTL_BASE ESDCTL_BASE_ADDR +#else +#define MEMCTL_BASE MMDC_P0_BASE_ADDR +#endif +static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; +static const unsigned char bank_lookup[] = {3, 2}; + +/* these MMDC registers are common to the IMX53 and IMX6 */ +struct esd_mmdc_regs { + uint32_t ctl; + uint32_t pdc; + uint32_t otc; + uint32_t cfg0; + uint32_t cfg1; + uint32_t cfg2; + uint32_t misc; +}; + +#define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7) +#define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl >> 20) & 7) +#define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl >> 16) & 3) +#define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl >> 30) & 1) +#define ESD_MMDC_MISC_GET_BANK(mdmisc) ((misc >> 5) & 1) + +/* + * imx_ddr_size - return size in bytes of DRAM according MMDC config + * The MMDC MDCTL register holds the number of bits for row, col, and data + * width and the MMDC MDMISC register holds the number of banks. Combine + * all these bits to determine the meme size the MMDC has been configured for + */ +unsigned imx_ddr_size(void) +{ + struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE; + unsigned ctl = readl(&mem->ctl); + unsigned misc = readl(&mem->misc); + int bits = 11 + 0 + 0 + 1; /* row + col + bank + width */ + + bits += ESD_MMDC_CTL_GET_ROW(ctl); + bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)]; + bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)]; + bits += ESD_MMDC_CTL_GET_WIDTH(ctl); + bits += ESD_MMDC_CTL_GET_CS1(ctl); + + /* The MX6 can do only 3840 MiB of DRAM */ + if (bits == 32) + return 0xf0000000; + + return 1 << bits; +} From a02a5fb6ff8d1b5e9cd481cea69f3ad471033b1c Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 18 Jul 2019 15:04:23 -0300 Subject: [PATCH 31/36] imx: mmdc_size: Fix checkpatch warnings The original imx_ddr_size() implementation had some issues reported by checkpatch like this: CHECK: Prefer kernel type 'u32' over 'uint32_t' #127: FILE: arch/arm/mach-imx/mmdc_size.c:16: + uint32_t ctl; WARNING: Prefer 'unsigned int' to bare use of 'unsigned' #151: FILE: arch/arm/mach-imx/mmdc_size.c:40: + unsigned ctl = readl(&mem->ctl); Fix all of them. Signed-off-by: Fabio Estevam --- arch/arm/mach-imx/mmdc_size.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-imx/mmdc_size.c b/arch/arm/mach-imx/mmdc_size.c index 8a3c6bdea6..13f587c38a 100644 --- a/arch/arm/mach-imx/mmdc_size.c +++ b/arch/arm/mach-imx/mmdc_size.c @@ -13,13 +13,13 @@ static const unsigned char bank_lookup[] = {3, 2}; /* these MMDC registers are common to the IMX53 and IMX6 */ struct esd_mmdc_regs { - uint32_t ctl; - uint32_t pdc; - uint32_t otc; - uint32_t cfg0; - uint32_t cfg1; - uint32_t cfg2; - uint32_t misc; + u32 ctl; + u32 pdc; + u32 otc; + u32 cfg0; + u32 cfg1; + u32 cfg2; + u32 misc; }; #define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7) @@ -34,11 +34,11 @@ struct esd_mmdc_regs { * width and the MMDC MDMISC register holds the number of banks. Combine * all these bits to determine the meme size the MMDC has been configured for */ -unsigned imx_ddr_size(void) +unsigned int imx_ddr_size(void) { struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE; - unsigned ctl = readl(&mem->ctl); - unsigned misc = readl(&mem->misc); + unsigned int ctl = readl(&mem->ctl); + unsigned int misc = readl(&mem->misc); int bits = 11 + 0 + 0 + 1; /* row + col + bank + width */ bits += ESD_MMDC_CTL_GET_ROW(ctl); From d9fba73a88afa4b8e2fdcc81778116bba8fbb243 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 18 Jul 2019 15:04:24 -0300 Subject: [PATCH 32/36] imx: mmdc_size: Allow building it for i.MX7ULP i.MX7ULP uses the same MMDC controller IP as found on i.MX53 and i.MX6, so build mmdc_size.c for i.MX7ULP as well. Signed-off-by: Fabio Estevam --- arch/arm/mach-imx/Makefile | 2 +- arch/arm/mach-imx/mmdc_size.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index cb6ef533de..9dfe883ead 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -51,7 +51,7 @@ obj-$(CONFIG_IMX_HAB) += hab.o obj-$(CONFIG_SYSCOUNTER_TIMER) += syscounter.o endif ifeq ($(SOC),$(filter $(SOC),mx7ulp)) -obj-y += cache.o +obj-y += cache.o mmdc_size.o obj-$(CONFIG_IMX_HAB) += hab.o endif ifeq ($(SOC),$(filter $(SOC),vf610)) diff --git a/arch/arm/mach-imx/mmdc_size.c b/arch/arm/mach-imx/mmdc_size.c index 13f587c38a..1a094726aa 100644 --- a/arch/arm/mach-imx/mmdc_size.c +++ b/arch/arm/mach-imx/mmdc_size.c @@ -5,8 +5,10 @@ #if defined(CONFIG_MX53) #define MEMCTL_BASE ESDCTL_BASE_ADDR -#else +#elif defined(CONFIG_MX6) #define MEMCTL_BASE MMDC_P0_BASE_ADDR +#elif defined(CONFIG_MX7ULP) +#define MEMCTL_BASE MMDC0_RBASE #endif static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9}; static const unsigned char bank_lookup[] = {3, 2}; From 49cf320f7a9d6e053b190a60bf7e1cba00d3e49c Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 18 Jul 2019 15:04:25 -0300 Subject: [PATCH 33/36] mx7ulp_evk: Use imx_ddr_size() Use imx_ddr_size() to retrieve the total DDR size instead of passing a hardcoded memory size. imx_ddr_size() calculates the memory size based on the actual MMDC registers values and is useful to detect misconfigurations, so switch to this more robust approach. Signed-off-by: Fabio Estevam --- board/freescale/mx7ulp_evk/mx7ulp_evk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c index 7527263577..c939514a5f 100644 --- a/board/freescale/mx7ulp_evk/mx7ulp_evk.c +++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c @@ -17,7 +17,7 @@ DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { - gd->ram_size = PHYS_SDRAM_SIZE; + gd->ram_size = imx_ddr_size(); return 0; } From 5fba75373b6118a2e7f75740bd7374b534d722c7 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 9 Oct 2019 03:08:17 +0000 Subject: [PATCH 34/36] imx: imx8mm_evk: add board_mmc_get_env_dev Add board_mmc_get_env_dev to correctly return devno for mmc env Signed-off-by: Peng Fan --- board/freescale/imx8mm_evk/imx8mm_evk.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c index 3706e1ec55..e4742338e3 100644 --- a/board/freescale/imx8mm_evk/imx8mm_evk.c +++ b/board/freescale/imx8mm_evk/imx8mm_evk.c @@ -19,6 +19,11 @@ int board_init(void) return 0; } +int board_mmc_get_env_dev(int devno) +{ + return devno; +} + int board_late_init(void) { #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG From b4eca2d787b09509e6a5a0f597e91bcb00558b4d Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Tue, 18 Jun 2019 23:08:59 +0200 Subject: [PATCH 35/36] imx :hab: Add hab version command THe RVT data includes a major and minor version in its header parameter. Add a new command to print this out. Signed-off-by: Sjoerd Simons --- arch/arm/include/asm/mach-imx/hab.h | 1 + arch/arm/mach-imx/hab.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/arm/include/asm/mach-imx/hab.h b/arch/arm/include/asm/mach-imx/hab.h index b905d84bdc..d8bd77075a 100644 --- a/arch/arm/include/asm/mach-imx/hab.h +++ b/arch/arm/include/asm/mach-imx/hab.h @@ -189,6 +189,7 @@ typedef void hapi_clock_init_t(void); #define HAB_CID_ROM 0 /**< ROM Caller ID */ #define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/ +#define HAB_TAG_RVT 0xDD /* ROM Vector Table */ #define HAB_CMD_HDR 0xD4 /* CSF Header */ #define HAB_CMD_WRT_DAT 0xCC /* Write Data command tag */ #define HAB_CMD_CHK_DAT 0xCF /* Check Data command tag */ diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c index ce50dbe907..30db820b56 100644 --- a/arch/arm/mach-imx/hab.c +++ b/arch/arm/mach-imx/hab.c @@ -365,6 +365,21 @@ static int do_hab_failsafe(cmd_tbl_t *cmdtp, int flag, int argc, return 0; } +static int do_hab_version(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + struct hab_hdr *hdr = (struct hab_hdr *)HAB_RVT_BASE; + + if (hdr->tag != HAB_TAG_RVT) { + printf("Unexpected header tag: %x\n", hdr->tag); + return CMD_RET_FAILURE; + } + + printf("HAB version: %d.%d\n", hdr->par >> 4, hdr->par & 0xf); + + return 0; +} + static int do_authenticate_image_or_failover(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { @@ -421,6 +436,12 @@ U_BOOT_CMD( "ivt_offset - hex offset of IVT in the image" ); +U_BOOT_CMD( + hab_version, 1, 0, do_hab_version, + "print HAB major/minor version", + "" + ); + #endif /* !defined(CONFIG_SPL_BUILD) */ /* Get CSF Header length */ From d02be21d3004b51c6fc9a54b90d31dcc2dac4a9a Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 24 Jul 2019 08:54:16 +0000 Subject: [PATCH 36/36] i2c: imx_lpi2c: add ipg clk The controller needs two clk, per clk and ipg clk, so let's add ipg clk. Signed-off-by: Peng Fan --- drivers/i2c/imx_lpi2c.c | 11 +++++++++++ include/imx_lpi2c.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c index 4586d4331f..2de99d019e 100644 --- a/drivers/i2c/imx_lpi2c.c +++ b/drivers/i2c/imx_lpi2c.c @@ -471,6 +471,17 @@ static int imx_lpi2c_probe(struct udevice *bus) dev_err(bus, "Failed to enable per clk\n"); return ret; } + + ret = clk_get_by_name(bus, "ipg", &i2c_bus->ipg_clk); + if (ret) { + dev_err(bus, "Failed to get ipg clk\n"); + return ret; + } + ret = clk_enable(&i2c_bus->ipg_clk); + if (ret) { + dev_err(bus, "Failed to enable ipg clk\n"); + return ret; + } } else { /* To i.MX7ULP, only i2c4-7 can be handled by A7 core */ ret = enable_i2c_clk(1, bus->seq); diff --git a/include/imx_lpi2c.h b/include/imx_lpi2c.h index 2700e5f876..3ce9edaf10 100644 --- a/include/imx_lpi2c.h +++ b/include/imx_lpi2c.h @@ -18,6 +18,7 @@ struct imx_lpi2c_bus { struct i2c_pads_info *pads_info; struct udevice *bus; struct clk per_clk; + struct clk ipg_clk; }; struct imx_lpi2c_reg {