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Merge branch 'CR_4563_memcpy_samin.guo' into 'jh7110-master'
CR4563:Configure the l2 prefetcher parameter See merge request sdk/u-boot!48
This commit is contained in:
commit
6f85c682b9
3 changed files with 103 additions and 22 deletions
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@ -71,6 +71,16 @@
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};
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};
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&cachectrl {
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reg = <0x0 0x2010000 0x0 0x4000>,
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<0x0 0x2030000 0x0 0x80000>,
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<0x0 0x8000000 0x0 0x2000000>;
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reg-names = "control", "prefetcher", "sideband";
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prefetch-dist-size = <0x4>;
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prefetch-hart-mask = <0x1e>;
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prefetch-enable;
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};
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&uart0 {
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clock-frequency = <24000000>;
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current-speed = <115200>;
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@ -238,32 +238,10 @@ static void get_cpu_voltage_type(struct udevice *dev)
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}
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#endif
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/*enable U74-mc hart1~hart4 prefetcher*/
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static void enable_prefetcher(void)
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{
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u32 hart;
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u32 *reg;
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#define L2_PREFETCHER_BASE_ADDR 0x2030000
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#define L2_PREFETCHER_OFFSET 0x2000
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/*hart1~hart4*/
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for (hart = 1; hart < 5; hart++) {
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reg = (u32 *)((u64)(L2_PREFETCHER_BASE_ADDR
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+ hart*L2_PREFETCHER_OFFSET));
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mb(); /* memory barrier */
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setbits_le32(reg, 0x1);
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mb(); /* memory barrier */
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}
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}
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int board_init(void)
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{
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enable_caches();
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/*enable hart1-hart4 prefetcher*/
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enable_prefetcher();
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jh7110_timer_init();
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jh7110_usb_init(true);
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93
drivers/cache/cache-sifive-ccache.c
vendored
93
drivers/cache/cache-sifive-ccache.c
vendored
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@ -15,10 +15,96 @@
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#define SIFIVE_CCACHE_WAY_ENABLE 0x008
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/* Prefetch */
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#define SIFIVE_PREFET_HARD_BASE(hart) ((hart)*0x2000)
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/* Prefetch Control Register */
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#define SIFIVE_PREFT_EN_MASK BIT(0)
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#define SIFIVE_PREFT_CROSS_PAGE_DIS_MASK BIT(1)
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#define SIFIVE_PREFT_DIST_MASK GENMASK(7, 2)
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#define SIFIVE_PREFT_MAX_ALLOC_DIST_MASK GENMASK(13, 8)
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#define SIFIVE_PREFT_LIN_TO_EXP_THRD_MASK GENMASK(19, 14)
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#define SIFIVE_PREFT_AGE_OUT_EN_MASK BIT(20)
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#define SIFIVE_PREFT_NUM_LDS_AGE_OUT_MASK GENMASK(27, 21)
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#define SIFIVE_PREFT_CROSS_PAGE_EN_MASK BIT(28)
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/* Prefetch Advanced Control Register */
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#define SIFIVE_PREFT_ADV_Q_FULL_THRD GENMASK(3, 0)
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#define SIFIVE_PREFT_ADV_HIT_CACHE_THRD GENMASK(8, 4)
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#define SIFIVE_PREFT_ADV_HIT_MSHR_THRD GENMASK(12, 9)
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#define SIFIVE_PREFT_ADV_WINDOW_MASK GENMASK(18, 13)
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#define SIFIVE_PREFET_HARD_MASK 0x1e
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#define SIFIVE_MAX_HART_ID 0x20
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#define SIFIVE_PREFT_DIST_VAL 0x3
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#define SIFIVE_PREFT_DIST_MAX 0x3f
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#define SIFIVE_PREFT_EN 0x1
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struct sifive_ccache {
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void __iomem *base;
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void __iomem *pre_base;
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u32 pre_hart_mask;
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u32 pre_dist_size;
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};
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static int sifive_prefetcher_parse(struct udevice *dev)
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{
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struct sifive_ccache *priv = dev_get_priv(dev);
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if (!priv->pre_base)
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return -EINVAL;
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if (!dev_read_bool(dev, "prefetch-enable"))
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return -ENOENT;
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priv->pre_hart_mask = dev_read_u32_default(dev, "prefetch-hart-mask",
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SIFIVE_PREFET_HARD_MASK);
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priv->pre_dist_size = dev_read_u32_default(dev, "prefetch-dist-size",
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SIFIVE_PREFT_DIST_VAL);
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return 0;
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}
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static void sifive_prefetcher_cfg_by_id(struct udevice *dev, u32 hart)
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{
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struct sifive_ccache *priv = dev_get_priv(dev);
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void __iomem *reg;
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u32 val;
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/* Prefetch Control Register */
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reg = priv->pre_base + SIFIVE_PREFET_HARD_BASE(hart);
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val = readl(reg);
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val &= ~SIFIVE_PREFT_MAX_ALLOC_DIST_MASK;
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val |= SIFIVE_PREFT_DIST_MAX << __ffs(SIFIVE_PREFT_MAX_ALLOC_DIST_MASK);
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writel(val, reg);
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val = readl(reg);
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val &= ~SIFIVE_PREFT_DIST_MASK;
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val |= priv->pre_dist_size << __ffs(SIFIVE_PREFT_DIST_MASK);
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writel(val, reg);
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val |= SIFIVE_PREFT_EN << __ffs(SIFIVE_PREFT_EN_MASK);
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writel(val, reg);
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}
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static int sifive_prefetcher_enable(struct udevice *dev)
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{
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struct sifive_ccache *priv = dev_get_priv(dev);
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u32 hart;
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int ret;
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ret = sifive_prefetcher_parse(dev);
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if (ret)
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return ret;
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for (hart = 0; hart < SIFIVE_MAX_HART_ID; hart++) {
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if (BIT(hart) & priv->pre_hart_mask)
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sifive_prefetcher_cfg_by_id(dev, hart);
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}
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return 0;
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}
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static int sifive_ccache_enable(struct udevice *dev)
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{
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struct sifive_ccache *priv = dev_get_priv(dev);
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@ -31,6 +117,8 @@ static int sifive_ccache_enable(struct udevice *dev)
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writel(ways - 1, priv->base + SIFIVE_CCACHE_WAY_ENABLE);
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sifive_prefetcher_enable(dev);
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return 0;
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}
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@ -51,11 +139,16 @@ static const struct cache_ops sifive_ccache_ops = {
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static int sifive_ccache_probe(struct udevice *dev)
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{
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struct sifive_ccache *priv = dev_get_priv(dev);
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fdt_addr_t addr;
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priv->base = dev_read_addr_ptr(dev);
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if (!priv->base)
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return -EINVAL;
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addr = dev_read_addr_name(dev, "prefetcher");
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if (addr != FDT_ADDR_T_NONE)
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priv->pre_base = (void *)(uintptr_t)addr;
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return 0;
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}
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