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Merge branch 'master' of git://git.denx.de/u-boot-sh

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- RCar Gen3 updates
This commit is contained in:
Tom Rini 2021-02-21 11:16:38 -05:00
commit 72993e8e03
2 changed files with 24 additions and 7 deletions
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1
configs/rcar3_salvator-x_defconfig
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@ -71,6 +71,7 @@ CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y CONFIG_RENESAS_RAVB=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_DM_PCI=y CONFIG_DM_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_RCAR_GEN3=y CONFIG_PCI_RCAR_GEN3=y
CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_FIXED=y

30
drivers/pci/pci-rcar-gen3.c
View file

@ -23,6 +23,7 @@
#include <pci.h> #include <pci.h>
#include <wait_bit.h> #include <wait_bit.h>
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/log2.h>
#define PCIECAR 0x000010 #define PCIECAR 0x000010
#define PCIECCTLR 0x000018 #define PCIECCTLR 0x000018
@ -151,6 +152,16 @@ static int rcar_pcie_config_access(const struct udevice *udev,
struct rcar_gen3_pcie_priv *priv = dev_get_plat(udev); struct rcar_gen3_pcie_priv *priv = dev_get_plat(udev);
u32 reg = where & ~3; u32 reg = where & ~3;
/* Root bus */
if (PCI_DEV(bdf) == 0) {
if (access_type == RCAR_PCI_ACCESS_READ)
*data = readl(priv->regs + PCICONF(where / 4));
else
writel(*data, priv->regs + PCICONF(where / 4));
return 0;
}
/* Clear errors */ /* Clear errors */
clrbits_le32(priv->regs + PCIEERRFR, 0); clrbits_le32(priv->regs + PCIEERRFR, 0);
@ -187,11 +198,14 @@ static int rcar_gen3_pcie_addr_valid(pci_dev_t d, uint where)
{ {
u32 slot; u32 slot;
if (PCI_BUS(d))
return -EINVAL;
if (PCI_FUNC(d)) if (PCI_FUNC(d))
return -EINVAL; return -EINVAL;
slot = PCI_DEV(d); slot = PCI_DEV(d);
if (slot != 1) if (slot > 1)
return -EINVAL; return -EINVAL;
return 0; return 0;
@ -334,17 +348,19 @@ static int rcar_gen3_pcie_probe(struct udevice *dev)
if (hose->regions[i].phys_start == 0) if (hose->regions[i].phys_start == 0)
continue; continue;
mask = (hose->regions[i].size - 1) & ~0xf; mask = (roundup_pow_of_two(hose->regions[i].size) - 1) & ~0xf;
mask |= LAR_ENABLE; mask |= LAR_ENABLE;
writel(hose->regions[i].phys_start, priv->regs + PCIEPRAR(0)); writel(rounddown_pow_of_two(hose->regions[i].phys_start),
writel(hose->regions[i].phys_start, priv->regs + PCIELAR(0)); priv->regs + PCIEPRAR(0));
writel(rounddown_pow_of_two(hose->regions[i].phys_start),
priv->regs + PCIELAR(0));
writel(mask, priv->regs + PCIELAMR(0)); writel(mask, priv->regs + PCIELAMR(0));
break; break;
} }
writel(0, priv->regs + PCIEPRAR(4)); writel(0, priv->regs + PCIEPRAR(1));
writel(0, priv->regs + PCIELAR(4)); writel(0, priv->regs + PCIELAR(1));
writel(0, priv->regs + PCIELAMR(4)); writel(0, priv->regs + PCIELAMR(1));
ret = rcar_gen3_pcie_hw_init(dev); ret = rcar_gen3_pcie_hw_init(dev);
if (ret) if (ret)