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arm: zynq: Add initial support for Avnet MiniZed
Initial support for Avnet MiniZed board. Tested UART1 (serial console), QSPI(Flash), SDHCI1 (eMMC), USB. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Ibai Erkiaga
Michal Simek
parent
95d565fdc2
commit
7483969c55
3 changed files with 173 additions and 0 deletions
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@ -130,6 +130,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
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zynq-cc108.dtb \
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zynq-cse-qspi-single.dtb \
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zynq-microzed.dtb \
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zynq-minized.dtb \
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zynq-picozed.dtb \
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zynq-syzygy-hub.dtb \
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zynq-topic-miami.dtb \
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106
arch/arm/dts/zynq-minized.dts
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106
arch/arm/dts/zynq-minized.dts
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@ -0,0 +1,106 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Avnet MiniZed board
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*
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* (C) Copyright 2017 - 2018, Xilinx, Inc.
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*
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* Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
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*/
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/dts-v1/;
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#include "zynq-7000.dtsi"
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/ {
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model = "Avnet Zynq MiniZed Development Board";
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compatible = "avnet,minized", "xlnx,zynq-7000";
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aliases {
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serial0 = &uart1;
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serial1 = &uart0;
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spi0 = &qspi;
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mmc0 = &sdhci0;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x20000000>;
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};
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chosen {
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bootargs = "";
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stdout-path = "serial0:115200n8";
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};
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usb_phy0: phy0 {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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};
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};
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&qspi {
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status = "okay";
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is-dual = <0>;
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num-cs = <1>;
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flash@0 {
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compatible = "micron,m25p128";
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reg = <0x0>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "boot";
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reg = <0x0 0xff0000>;
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};
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partition@270000 {
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label = "kernel";
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reg = <0x270000 0xd80000>;
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};
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partition@ff0000 {
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label = "bootenv";
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reg = <0xff0000 0x10000>;
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};
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partition@1000000 {
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label = "spare";
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reg = <0x1000000 0x0>;
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};
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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usb-phy = <&usb_phy0>;
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usb-reset = <&gpio0 7 0>; /* USB_RST_N-MIO7 */
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};
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&sdhci1 {
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status = "okay";
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non-removable;
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bus-width = <4>;
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max-frequency = <12000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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mmccard: mmccard@0 {
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compatible = "mmc-card";
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reg = <0>;
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broken-hpi;
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};
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};
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66
configs/zynq_minized_defconfig
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66
configs/zynq_minized_defconfig
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@ -0,0 +1,66 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ZYNQ=y
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CONFIG_SYS_TEXT_BASE=0x4000000
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CONFIG_SPL=y
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CONFIG_SPL_STACK_R_ADDR=0x200000
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CONFIG_DEFAULT_DEVICE_TREE="zynq-minized"
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CONFIG_DEBUG_UART=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_FIT=y
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CONFIG_FIT_SIGNATURE=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_OS_BOOT=y
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CONFIG_SYS_PROMPT="Zynq> "
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CONFIG_CMD_THOR_DOWNLOAD=y
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CONFIG_CMD_DFU=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_FPGA_LOADBP=y
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CONFIG_CMD_FPGA_LOADFS=y
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CONFIG_CMD_FPGA_LOADMK=y
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CONFIG_CMD_FPGA_LOADP=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_FPGA_XILINX=y
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CONFIG_FPGA_ZYNQPL=y
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CONFIG_DM_GPIO=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ZYNQ=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHY_MARVELL=y
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CONFIG_PHY_REALTEK=y
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CONFIG_PHY_XILINX=y
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CONFIG_ZYNQ_GEM=y
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CONFIG_DEBUG_UART_ZYNQ=y
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CONFIG_DEBUG_UART_BASE=0xe0001000
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CONFIG_DEBUG_UART_CLOCK=50000000
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CONFIG_ZYNQ_SERIAL=y
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CONFIG_ZYNQ_QSPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_ULPI_VIEWPORT=y
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CONFIG_USB_ULPI=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
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CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
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CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
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CONFIG_CI_UDC=y
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CONFIG_USB_GADGET_DOWNLOAD=y
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CONFIG_USB_FUNCTION_THOR=y
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