From 27589e7d8cdd6d4c6152252896b3b63ba249ea50 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:38 +0100 Subject: [PATCH 001/140] net: FEC: Add compatible for vybrid (vf610) to reuse fec_mxc.c driver The NXP's FEC driver can be reused on vf610 device (with DM). Signed-off-by: Lukasz Majewski Reviewed-by: Stefan Agner --- drivers/net/fec_mxc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 84f010d805..a672250e16 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1491,6 +1491,7 @@ static const struct udevice_id fecmxc_ids[] = { { .compatible = "fsl,imx6ul-fec" }, { .compatible = "fsl,imx53-fec" }, { .compatible = "fsl,imx7d-fec" }, + { .compatible = "fsl,mvf600-fec" }, { } }; From f1cbd87e50e40b072f979334dcbcc42af7c45e05 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:39 +0100 Subject: [PATCH 002/140] net: Kconfig: FEC: Add dependency on VF610 Signed-off-by: Lukasz Majewski Reviewed-by: Stefan Agner --- drivers/net/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 77d0b3a01f..d0e5426a99 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -190,7 +190,7 @@ config FEC_MXC_MDIO_BASE config FEC_MXC bool "FEC Ethernet controller" - depends on MX5 || MX6 || MX7 || IMX8 + depends on MX5 || MX6 || MX7 || IMX8 || VF610 help This driver supports the 10/100 Fast Ethernet controller for NXP i.MX processors. From da6b81a8d8d9a1cac6c2a2744f5afe0a25b6bb1e Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:40 +0100 Subject: [PATCH 003/140] vybrid: ddr: Extend vf610-pinfunc.h with DDR pads definitions This patch provides definitions necessary for VF610 DDR pad configurations. Signed-off-by: Lukasz Majewski Reviewed-by: Stefan Agner --- arch/arm/dts/vf610-pinfunc.h | 50 ++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/dts/vf610-pinfunc.h b/arch/arm/dts/vf610-pinfunc.h index fcad7132c8..9456719074 100644 --- a/arch/arm/dts/vf610-pinfunc.h +++ b/arch/arm/dts/vf610-pinfunc.h @@ -807,4 +807,54 @@ #define VF610_PAD_PTA7__GPIO_134 0x218 0x000 ALT0 0x0 #define VF610_PAD_PTA7__VIU_PIX_CLK 0x218 0x3AC ALT1 0x1 +#define VF610_PAD_DDR_RESETB 0x21c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A15__DDR_A_15 0x220 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A14__DDR_A_14 0x224 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A13__DDR_A_13 0x228 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A12__DDR_A_12 0x22c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A11__DDR_A_11 0x230 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A10__DDR_A_10 0x234 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A9__DDR_A_9 0x238 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A8__DDR_A_8 0x23c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A7__DDR_A_7 0x240 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A6__DDR_A_6 0x244 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A5__DDR_A_5 0x248 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A4__DDR_A_4 0x24c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A3__DDR_A_3 0x250 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A2__DDR_A_2 0x254 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A1__DDR_A_1 0x258 0x000 ALT0 0x0 +#define VF610_PAD_DDR_A0__DDR_A_0 0x25c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_BA2__DDR_BA_2 0x260 0x000 ALT0 0x0 +#define VF610_PAD_DDR_BA1__DDR_BA_1 0x264 0x000 ALT0 0x0 +#define VF610_PAD_DDR_BA0__DDR_BA_0 0x268 0x000 ALT0 0x0 +#define VF610_PAD_DDR_CAS__DDR_CAS_B 0x26c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_CKE__DDR_CKE_0 0x270 0x000 ALT0 0x0 +#define VF610_PAD_DDR_CLK__DDR_CLK_0 0x274 0x000 ALT0 0x0 +#define VF610_PAD_DDR_CS__DDR_CS_B_0 0x278 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D15__DDR_D_15 0x27c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D14__DDR_D_14 0x280 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D13__DDR_D_13 0x284 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D12__DDR_D_12 0x288 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D11__DDR_D_11 0x28c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D10__DDR_D_10 0x290 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D9__DDR_D_9 0x294 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D8__DDR_D_8 0x298 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D7__DDR_D_7 0x29c 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D6__DDR_D_6 0x2a0 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D5__DDR_D_5 0x2a4 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D4__DDR_D_4 0x2a8 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D3__DDR_D_3 0x2ac 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D2__DDR_D_2 0x2b0 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D1__DDR_D_1 0x2b4 0x000 ALT0 0x0 +#define VF610_PAD_DDR_D0__DDR_D_0 0x2b8 0x000 ALT0 0x0 +#define VF610_PAD_DDR_DQM1__DDR_DQM_1 0x2bc 0x000 ALT0 0x0 +#define VF610_PAD_DDR_DQM0__DDR_DQM_0 0x2c0 0x000 ALT0 0x0 +#define VF610_PAD_DDR_DQS1__DDR_DQS_1 0x2c4 0x000 ALT0 0x0 +#define VF610_PAD_DDR_DQS0__DDR_DQS_0 0x2c8 0x000 ALT0 0x0 +#define VF610_PAD_DDR_RAS__DDR_RAS_B 0x2cc 0x000 ALT0 0x0 +#define VF610_PAD_DDR_WE__DDR_WE_B 0x2d0 0x000 ALT0 0x0 +#define VF610_PAD_DDR_ODT1__DDR_ODT_0 0x2d4 0x000 ALT0 0x0 +#define VF610_PAD_DDR_ODT0__DDR_ODT_1 0x2d8 0x000 ALT0 0x0 +#define VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 0x2dc 0x000 ALT0 0x0 +#define VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2 0x2e0 0x000 ALT0 0x0 #endif From 7db8b854d3f76d996c9adcd8a6a4ecd3ec30ebda Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:41 +0100 Subject: [PATCH 004/140] vybrid: clock: Provide enable_i2c_clk() function for Vybrid Provide function to enable I2C clocks for vf610 - in the generic code. This function overrides the default weak function implementation (which only returns 1). Signed-off-by: Lukasz Majewski Tested-by: Marcel Ziswiler --- arch/arm/cpu/armv7/vf610/generic.c | 22 ++++++++++++++++++++++ arch/arm/include/asm/arch-vf610/clock.h | 3 +++ 2 files changed, 25 insertions(+) diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index cbd3391918..e0c0b1bcb0 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -375,3 +375,25 @@ void enable_caches(void) mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option); } #endif + +#ifdef CONFIG_SYS_I2C_MXC +/* i2c_num can be from 0 - 3 */ +int enable_i2c_clk(unsigned char enable, unsigned int i2c_num) +{ + struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR; + + switch (i2c_num) { + case 0: + clrsetbits_le32(&ccm->ccgr4, CCM_CCGR4_I2C0_CTRL_MASK, + CCM_CCGR4_I2C0_CTRL_MASK); + case 2: + clrsetbits_le32(&ccm->ccgr10, CCM_CCGR10_I2C2_CTRL_MASK, + CCM_CCGR10_I2C2_CTRL_MASK); + break; + default: + return -EINVAL; + } + + return 0; +} +#endif diff --git a/arch/arm/include/asm/arch-vf610/clock.h b/arch/arm/include/asm/arch-vf610/clock.h index 3bd73a01f3..72184fd608 100644 --- a/arch/arm/include/asm/arch-vf610/clock.h +++ b/arch/arm/include/asm/arch-vf610/clock.h @@ -22,6 +22,9 @@ enum mxc_clock { void enable_ocotp_clk(unsigned char enable); unsigned int mxc_get_clock(enum mxc_clock clk); u32 get_lpuart_clk(void); +#ifdef CONFIG_SYS_I2C_MXC +int enable_i2c_clk(unsigned char enable, unsigned int i2c_num); +#endif #define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK) From bc51c911208bb4383b7f8d8f7544c844316a47b1 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:42 +0100 Subject: [PATCH 005/140] pcm052: board: Do not enable I2C2 code in the board file As the I2C2 clock is now enabled in the generic clock code, we can remove this code from a board file. Signed-off-by: Lukasz Majewski Tested-by: Marcel Ziswiler --- board/phytec/pcm052/pcm052.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index f988af2abc..cfc8009102 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -485,7 +485,7 @@ static void clock_init(void) clrsetbits_le32(&ccm->ccgr9, CCM_REG_CTRL_MASK, CCM_CCGR9_FEC0_CTRL_MASK | CCM_CCGR9_FEC1_CTRL_MASK); clrsetbits_le32(&ccm->ccgr10, CCM_REG_CTRL_MASK, - CCM_CCGR10_NFC_CTRL_MASK | CCM_CCGR10_I2C2_CTRL_MASK); + CCM_CCGR10_NFC_CTRL_MASK); clrsetbits_le32(&anadig->pll2_ctrl, ANADIG_PLL2_CTRL_POWERDOWN, ANADIG_PLL2_CTRL_ENABLE | ANADIG_PLL2_CTRL_DIV_SELECT); From a01cc0ac62d89942404415d42ea0d016a828502c Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:43 +0100 Subject: [PATCH 006/140] vybrid: Define the imx_get_mac_from_fuse() as a __weak function The proposed way of reading fused MAC in the imx_get_mac_from_fuse() may be different for other boards. This commit defines the imx_get_mac_from_fuse() as a weak function to allow board file overriding it with customized function. Signed-off-by: Lukasz Majewski --- arch/arm/cpu/armv7/vf610/generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index e0c0b1bcb0..90fa695e98 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -252,7 +252,7 @@ U_BOOT_CMD( ); #ifdef CONFIG_FEC_MXC -void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) +__weak void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; struct fuse_bank *bank = &ocotp->bank[4]; From fea63a5d7df09968635562959f1fcb403a37d1c5 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:44 +0100 Subject: [PATCH 007/140] pcm052: board: Remove "m4go" command as it is superseded by "bootaux" The "m4go" provides exactly the same functionality as the IMX generic "bootaux" command. Remove it to not duplicate the code. Signed-off-by: Lukasz Majewski --- board/phytec/pcm052/pcm052.c | 38 ------------------------------------ 1 file changed, 38 deletions(-) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index cfc8009102..4e4b870304 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -577,41 +577,3 @@ int checkboard(void) return 0; } - -static int do_m4go(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) -{ - ulong addr; - - /* Consume 'm4go' */ - argc--; argv++; - - /* - * Parse provided address - default to load_addr in case not provided. - */ - - if (argc) - addr = simple_strtoul(argv[0], NULL, 16); - else - addr = load_addr; - - /* - * Write boot address in PERSISTENT_ENTRY1[31:0] aka SRC_GPR2[31:0] - */ - writel(addr + 0x401, 0x4006E028); - - /* - * Start secondary processor by enabling its clock - */ - writel(0x15a5a, 0x4006B08C); - - return 1; -} - -U_BOOT_CMD( - m4go, 2 /* one arg max */, 1 /* repeatable */, do_m4go, - "start the secondary Cortex-M4 from scatter file image", - "[]\n" - " - start secondary Cortex-M4 core using a scatter file image\n" - "The argument needs to be a scatter file\n" -); From 5f1588acc2a2888c7932a7ef2080497cd8174059 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:45 +0100 Subject: [PATCH 008/140] pcm052: board: vybrid: Update the board name for BK4 device This commit provides distinction between PCM052 and BK4. Signed-off-by: Lukasz Majewski --- board/phytec/pcm052/pcm052.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index 4e4b870304..5f2c9a9c12 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -573,7 +573,10 @@ int board_init(void) int checkboard(void) { +#ifdef CONFIG_TARGET_BK4R1 + puts("Board: BK4r1 (L333)\n"); +#else puts("Board: PCM-052\n"); - +#endif return 0; } From 8b47abd2e2bc322a7610c1b5a4421b1442c21a15 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:46 +0100 Subject: [PATCH 009/140] ARM: DTS: vybrid: Update vf.dtsi file to descibe more vf610 hardware This patch allows moving vf610 based boards to a device tree and model. Ported from Linux kernel - v4.20 (tag) Signed-off-by: Lukasz Majewski Reviewed-by: Stefan Agner Tested-by: Marcel Ziswiler --- arch/arm/dts/vf.dtsi | 62 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm/dts/vf.dtsi b/arch/arm/dts/vf.dtsi index ad30059b9a..5e3b2c5b9d 100644 --- a/arch/arm/dts/vf.dtsi +++ b/arch/arm/dts/vf.dtsi @@ -22,6 +22,10 @@ spi1 = &dspi1; ehci0 = &ehci0; ehci1 = &ehci1; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; }; soc { @@ -89,6 +93,22 @@ status = "disabled"; }; + i2c0: i2c@40066000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,vf610-i2c"; + reg = <0x40066000 0x1000>; + status = "disabled"; + }; + + i2c1: i2c@40067000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,vf610-i2c"; + reg = <0x40067000 0x1000>; + status = "disabled"; + }; + iomuxc: iomuxc@40048000 { compatible = "fsl,vf610-iomuxc"; reg = <0x40048000 0x1000>; @@ -156,6 +176,48 @@ reg = <0x400b4000 0x800>; status = "disabled"; }; + + esdhc1: esdhc@400b2000 { + compatible = "fsl,esdhc"; + reg = <0x400b2000 0x1000>; + status = "disabled"; + }; + + fec0: fec@400d0000 { + compatible = "fsl,mvf600-fec"; + reg = <0x400d0000 0x1000>; + status = "disabled"; + }; + + fec1: fec@400d1000 { + compatible = "fsl,mvf600-fec"; + reg = <0x400d1000 0x1000>; + status = "disabled"; + }; + + nfc: nand@400e0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,vf610-nfc"; + reg = <0x400e0000 0x4000>; + status = "disabled"; + }; + + i2c2: i2c@400e6000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,vf610-i2c"; + reg = <0x400e6000 0x1000>; + status = "disabled"; + }; + + i2c3: i2c@400e7000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,vf610-i2c"; + reg = <0x400e7000 0x1000>; + status = "disabled"; + }; }; }; }; From fbe114aa4b2f906f48c30fe3590fc5c1a1886eff Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:47 +0100 Subject: [PATCH 010/140] pcm052: board: cosmetic: Add copyright notice to pcm052.c Signed-off-by: Lukasz Majewski --- board/phytec/pcm052/pcm052.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index 5f2c9a9c12..95df0be6c1 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -1,5 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * (C) Copyright 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de. + * * Copyright 2013 Freescale Semiconductor, Inc. */ From e78f9fd2eb1dace47d42e6672db2947910193fdb Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:48 +0100 Subject: [PATCH 011/140] ARM: DTS: Update pcm052 based dts files (bk4r1/pcm052) This commit provides update and renames the bk4r1.dts to vf610-bk4r1.dts file with more on SoC HW description. The pcm052.dts has been renamed to vf610-pcm052.dts as well. Moreover, a new vf610-pcm052.drsi file has been introduced to reuse the common code between devices based on Phytec's pcm052 modules. Ported from Linux kernel - v4.20 (tag) Signed-off-by: Lukasz Majewski --- arch/arm/dts/Makefile | 4 +- arch/arm/dts/bk4r1.dts | 47 ---- arch/arm/dts/vf610-bk4r1.dts | 97 +++++++ arch/arm/dts/{pcm052.dts => vf610-pcm052.dts} | 6 +- arch/arm/dts/vf610-pcm052.dtsi | 259 ++++++++++++++++++ configs/bk4r1_defconfig | 2 +- configs/pcm052_defconfig | 2 +- 7 files changed, 361 insertions(+), 56 deletions(-) delete mode 100644 arch/arm/dts/bk4r1.dts create mode 100644 arch/arm/dts/vf610-bk4r1.dts rename arch/arm/dts/{pcm052.dts => vf610-pcm052.dts} (81%) create mode 100644 arch/arm/dts/vf610-pcm052.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8167cdb4e8..82f28b25e2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -492,8 +492,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \ vf610-colibri.dtb \ vf610-twr.dtb \ - pcm052.dtb \ - bk4r1.dtb + vf610-pcm052.dtb \ + vf610-bk4r1.dtb dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \ imx53-kp.dtb diff --git a/arch/arm/dts/bk4r1.dts b/arch/arm/dts/bk4r1.dts deleted file mode 100644 index 866b80e0b0..0000000000 --- a/arch/arm/dts/bk4r1.dts +++ /dev/null @@ -1,47 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * Copyright 2016 Toradex AG - */ - -/dts-v1/; -#include "vf.dtsi" - -/ { - model = "Phytec phyCORE-Vybrid"; - compatible = "phytec,pcm052", "fsl,vf610"; - - chosen { - stdout-path = &uart1; - }; - - aliases { - spi0 = &qspi0; - }; - -}; - -&uart1 { - status = "okay"; -}; - -&qspi0 { - bus-num = <0>; - num-cs = <2>; - status = "okay"; - - qflash0: spi_flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-flash"; - spi-max-frequency = <108000000>; - reg = <0>; - }; - - qflash1: spi_flash@1 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-flash"; - spi-max-frequency = <66000000>; - reg = <1>; - }; -}; diff --git a/arch/arm/dts/vf610-bk4r1.dts b/arch/arm/dts/vf610-bk4r1.dts new file mode 100644 index 0000000000..55cd53384a --- /dev/null +++ b/arch/arm/dts/vf610-bk4r1.dts @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * (C) Copyright 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de. + * + * Copyright 2016 Toradex AG + */ + +/dts-v1/; +#include "vf610-pcm052.dtsi" +#include "vf610-pinfunc.h" + +/ { + model = "Liebherr (LVF) BK4 Vybrid Board"; + compatible = "lvf,bk4", "fsl,vf610"; + + leds { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + compatible = "gpio-leds"; + + /* PTE15 PORT3[24] H6 green */ + led@0 { + label = "0"; + gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + /* PTA12 PORT0[5] H5 green */ + led@1 { + label = "1"; + gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + /* PTE20 PORT3[39] H4 green */ + led@2 { + label = "2"; + gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + /* PTE12 PORT3[21] H3 green */ + led@3 { + label = "3"; + gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + /* LED6 is now PRESET ETH -> PTA16 PORT0[6] H6 red */ + /* PTE9 PORT3[18] H5 red */ + led@4 { + label = "5"; + gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + /* PTE23 PORT4[0] H4 red */ + led@5 { + label = "6"; + gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + /* PTE16 PORT3[25] H3 red */ + led@6 { + label = "7"; + gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_ddr &pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* ETH control pins */ + VF610_PAD_PTE17__GPIO_122 0x1183 + VF610_PAD_PTA16__GPIO_6 0x1183 + >; + }; + + pinctrl_gpio_leds: gpioledsgrp { + fsl,pins = < + /* LEDS */ + VF610_PAD_PTE15__GPIO_120 0x1183 + VF610_PAD_PTA12__GPIO_5 0x1183 + VF610_PAD_PTE9__GPIO_114 0x1183 + VF610_PAD_PTE20__GPIO_125 0x1183 + VF610_PAD_PTE23__GPIO_128 0x1183 + VF610_PAD_PTE16__GPIO_121 0x1183 + >; + }; +}; diff --git a/arch/arm/dts/pcm052.dts b/arch/arm/dts/vf610-pcm052.dts similarity index 81% rename from arch/arm/dts/pcm052.dts rename to arch/arm/dts/vf610-pcm052.dts index 6489fdc6f4..22026024ea 100644 --- a/arch/arm/dts/pcm052.dts +++ b/arch/arm/dts/vf610-pcm052.dts @@ -4,7 +4,7 @@ */ /dts-v1/; -#include "vf.dtsi" +#include "vf610-pcm052.dtsi" / { model = "Phytec phyCORE-Vybrid"; @@ -15,7 +15,3 @@ }; }; - -&uart1 { - status = "okay"; -}; diff --git a/arch/arm/dts/vf610-pcm052.dtsi b/arch/arm/dts/vf610-pcm052.dtsi new file mode 100644 index 0000000000..1383d03c22 --- /dev/null +++ b/arch/arm/dts/vf610-pcm052.dtsi @@ -0,0 +1,259 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * (C) Copyright 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de. + * + */ + +/dts-v1/; +#include "vf.dtsi" +#include "vf610-pinfunc.h" + +/ { + chosen { + stdout-path = &uart1; + }; + + aliases { + spi0 = &qspi0; + mmc0 = &esdhc1; + }; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + bus-width = <4>; + cd-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&fec0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth>; + + phy-mode = "rmii"; + status = "okay"; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth1>; + + phy-mode = "rmii"; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c256"; + reg = <0x50>; + pagesize = <64>; + u-boot,i2c-offset-len = <2>; + }; + + m41t62: rtc@68 { + compatible = "st,m41t62"; + reg = <0x68>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ddr>; + + pinctrl_ddr: ddrgrp { + fsl,pins = < + VF610_PAD_DDR_A15__DDR_A_15 0x1c0 + VF610_PAD_DDR_A14__DDR_A_14 0x1c0 + VF610_PAD_DDR_A13__DDR_A_13 0x1c0 + VF610_PAD_DDR_A12__DDR_A_12 0x1c0 + VF610_PAD_DDR_A11__DDR_A_11 0x1c0 + VF610_PAD_DDR_A10__DDR_A_10 0x1c0 + VF610_PAD_DDR_A9__DDR_A_9 0x1c0 + VF610_PAD_DDR_A8__DDR_A_8 0x1c0 + VF610_PAD_DDR_A7__DDR_A_7 0x1c0 + VF610_PAD_DDR_A6__DDR_A_6 0x1c0 + VF610_PAD_DDR_A5__DDR_A_5 0x1c0 + VF610_PAD_DDR_A4__DDR_A_4 0x1c0 + VF610_PAD_DDR_A3__DDR_A_3 0x1c0 + VF610_PAD_DDR_A2__DDR_A_2 0x1c0 + VF610_PAD_DDR_A1__DDR_A_1 0x1c0 + VF610_PAD_DDR_A0__DDR_A_0 0x1c0 + VF610_PAD_DDR_BA2__DDR_BA_2 0x1c0 + VF610_PAD_DDR_BA1__DDR_BA_1 0x1c0 + VF610_PAD_DDR_BA0__DDR_BA_0 0x1c0 + VF610_PAD_DDR_CAS__DDR_CAS_B 0x1c0 + VF610_PAD_DDR_CKE__DDR_CKE_0 0x1c0 + VF610_PAD_DDR_CLK__DDR_CLK_0 0x101c0 + VF610_PAD_DDR_CS__DDR_CS_B_0 0x1c0 + VF610_PAD_DDR_D15__DDR_D_15 0x1c0 + VF610_PAD_DDR_D14__DDR_D_14 0x1c0 + VF610_PAD_DDR_D13__DDR_D_13 0x1c0 + VF610_PAD_DDR_D12__DDR_D_12 0x1c0 + VF610_PAD_DDR_D11__DDR_D_11 0x1c0 + VF610_PAD_DDR_D10__DDR_D_10 0x1c0 + VF610_PAD_DDR_D9__DDR_D_9 0x1c0 + VF610_PAD_DDR_D8__DDR_D_8 0x1c0 + VF610_PAD_DDR_D7__DDR_D_7 0x1c0 + VF610_PAD_DDR_D6__DDR_D_6 0x1c0 + VF610_PAD_DDR_D5__DDR_D_5 0x1c0 + VF610_PAD_DDR_D4__DDR_D_4 0x1c0 + VF610_PAD_DDR_D3__DDR_D_3 0x1c0 + VF610_PAD_DDR_D2__DDR_D_2 0x1c0 + VF610_PAD_DDR_D1__DDR_D_1 0x1c0 + VF610_PAD_DDR_D0__DDR_D_0 0x1c0 + VF610_PAD_DDR_DQM1__DDR_DQM_1 0x1c0 + VF610_PAD_DDR_DQM0__DDR_DQM_0 0x1c0 + VF610_PAD_DDR_DQS1__DDR_DQS_1 0x101c0 + VF610_PAD_DDR_DQS0__DDR_DQS_0 0x101c0 + VF610_PAD_DDR_RAS__DDR_RAS_B 0x1c0 + VF610_PAD_DDR_WE__DDR_WE_B 0x1c0 + VF610_PAD_DDR_ODT1__DDR_ODT_0 0x1c0 + VF610_PAD_DDR_ODT0__DDR_ODT_1 0x1c0 + VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 0x1c0 + VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2 0x1c0 + VF610_PAD_DDR_RESETB 0x1006c + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTB28__GPIO_98 0x219d + >; + }; + + pinctrl_eth: ethgrp { + fsl,pins = < + VF610_PAD_PTA6__RMII_CLKIN 0x30dd + VF610_PAD_PTC0__ENET_RMII0_MDC 0x30de + VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30df + VF610_PAD_PTC2__ENET_RMII0_CRS 0x30dd + VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30dd + VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30dd + VF610_PAD_PTC5__ENET_RMII0_RXER 0x30dd + VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30de + VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30de + VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30de + >; + }; + + pinctrl_eth1: eth1grp { + fsl,pins = < + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30de + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30dd + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30dd + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30dd + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30dd + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30de + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30de + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30de + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + VF610_PAD_PTA22__I2C2_SCL 0x34df + VF610_PAD_PTA23__I2C2_SDA 0x34df + >; + }; + + pinctrl_nfc: nfcgrp { + fsl,pins = < + VF610_PAD_PTD31__NF_IO15 0x28df + VF610_PAD_PTD30__NF_IO14 0x28df + VF610_PAD_PTD29__NF_IO13 0x28df + VF610_PAD_PTD28__NF_IO12 0x28df + VF610_PAD_PTD27__NF_IO11 0x28df + VF610_PAD_PTD26__NF_IO10 0x28df + VF610_PAD_PTD25__NF_IO9 0x28df + VF610_PAD_PTD24__NF_IO8 0x28df + VF610_PAD_PTD23__NF_IO7 0x28df + VF610_PAD_PTD22__NF_IO6 0x28df + VF610_PAD_PTD21__NF_IO5 0x28df + VF610_PAD_PTD20__NF_IO4 0x28df + VF610_PAD_PTD19__NF_IO3 0x28df + VF610_PAD_PTD18__NF_IO2 0x28df + VF610_PAD_PTD17__NF_IO1 0x28df + VF610_PAD_PTD16__NF_IO0 0x28df + VF610_PAD_PTB24__NF_WE_B 0x28c2 + VF610_PAD_PTB25__NF_CE0_B 0x28c2 + VF610_PAD_PTB27__NF_RE_B 0x28c2 + VF610_PAD_PTC26__NF_RB_B 0x283d + VF610_PAD_PTC27__NF_ALE 0x28c2 + VF610_PAD_PTC28__NF_CLE 0x28c2 + >; + }; + + pinctrl_qspi0: qspi0grp { + fsl,pins = < + VF610_PAD_PTD0__QSPI0_A_QSCK 0x397f + VF610_PAD_PTD1__QSPI0_A_CS0 0x397f + VF610_PAD_PTD2__QSPI0_A_DATA3 0x397f + VF610_PAD_PTD3__QSPI0_A_DATA2 0x397f + VF610_PAD_PTD4__QSPI0_A_DATA1 0x397f + VF610_PAD_PTD5__QSPI0_A_DATA0 0x397f + VF610_PAD_PTD7__QSPI0_B_QSCK 0x397f + VF610_PAD_PTD8__QSPI0_B_CS0 0x397f + VF610_PAD_PTD11__QSPI0_B_DATA1 0x397f + VF610_PAD_PTD12__QSPI0_B_DATA0 0x397f + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + VF610_PAD_PTB4__UART1_TX 0x21a2 + VF610_PAD_PTB5__UART1_RX 0x21a1 + >; + }; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nfc>; + + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + + status = "okay"; +}; + +&qspi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi0>; + + bus-num = <0>; + num-cs = <2>; + status = "okay"; + + qflash0: spi_flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <108000000>; + reg = <0>; + }; + + qflash1: spi_flash@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <66000000>; + reg = <1>; + }; +}; diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 9e31b4ac97..b67a3946ac 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -25,7 +25,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=NAND,nor0=NOR" CONFIG_MTDPARTS_DEFAULT="mtdparts=NAND:640k(bootloader),128k(env1),128k(env2),128k(dtb),6144k(kernel),-(root);NOR:-(nor)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="bk4r1" +CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index e207df51a8..26ee823df3 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -24,7 +24,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=NAND" CONFIG_MTDPARTS_DEFAULT="mtdparts=NAND:640k(bootloader),128k(env1),128k(env2),128k(dtb),6144k(kernel),-(root)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="pcm052" +CONFIG_DEFAULT_DEVICE_TREE="vf610-pcm052" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y From 4c414ed361dc4f5601ba3d2fb2f2261dd053423e Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:49 +0100 Subject: [PATCH 012/140] ARM: DTS: Provide vf610-bk4r1-u-boot.dtsi for U-Boot specific properties This commit brings a separate file in which the U-Boot specific properties (like 'dm-pre-reloc') are provided. Such approach allows easy sync with upstream Linux kernel in the future. Signed-off-by: Lukasz Majewski Reviewed-by: Tom Rini --- arch/arm/dts/vf610-bk4r1-u-boot.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 arch/arm/dts/vf610-bk4r1-u-boot.dtsi diff --git a/arch/arm/dts/vf610-bk4r1-u-boot.dtsi b/arch/arm/dts/vf610-bk4r1-u-boot.dtsi new file mode 100644 index 0000000000..088926bde2 --- /dev/null +++ b/arch/arm/dts/vf610-bk4r1-u-boot.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + */ + +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&aips0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl_ddr { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart1 { + u-boot,dm-pre-reloc; +}; + +&uart1 { + u-boot,dm-pre-reloc; +}; From 9829b246d6995119e15ec4ac17882aaf443cd635 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:50 +0100 Subject: [PATCH 013/140] defconfig: bk4/pcm052: Update bk4r1|pcm052_defconfig to support DM/DT This commit updates BK4's and PCM052's config files to support as much as possible device tree and model in u-boot. Moreover, remove CONFIG_* from pcm052.h (as those are now in bk4|pcm052_defconfig) Signed-off-by: Lukasz Majewski --- configs/bk4r1_defconfig | 47 +++++++++++++++++++++++++++++++++++----- configs/pcm052_defconfig | 34 +++++++++++++++++++++++++++-- include/configs/pcm052.h | 34 ----------------------------- 3 files changed, 74 insertions(+), 41 deletions(-) diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index b67a3946ac..e3852f4856 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -2,15 +2,18 @@ CONFIG_ARM=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 +CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_TARGET_BK4R1=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_EEPROM=y +# CONFIG_CMD_ELF is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -19,19 +22,45 @@ CONFIG_CMD_SF=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_FAT=y -CONFIG_MTDIDS_DEFAULT="nand0=NAND,nor0=NOR" -CONFIG_MTDPARTS_DEFAULT="mtdparts=NAND:640k(bootloader),128k(env1),128k(env2),128k(dtb),6144k(kernel),-(root);NOR:-(nor)" +CONFIG_MTDIDS_DEFAULT="nand0=vf610_nfc,nor0=NOR" +CONFIG_MTDPARTS_DEFAULT="mtdparts=vf610_nfc:2048k(bootloader),128k(env1),128k(env2),10240k(initrd),40960k(dtbkernel),-(system);NOR:-(nor)" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1" CONFIG_ENV_IS_IN_NAND=y +CONFIG_NETCONSOLE=y CONFIG_DM=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_SYS_BOOTCOUNT_ADDR=0x4006e02c CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2 +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_SYS_I2C_MXC_I2C4=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_MXC_OCOTP=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_I2C_EEPROM_BUS=2 +CONFIG_SYS_EEPROM_SIZE=32768 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y +CONFIG_NAND_VF610_NFC_DT=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y @@ -39,10 +68,18 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_VYBRID=y +CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y +# CONFIG_SPL_SERIAL_PRESENT is not set +# CONFIG_TPL_SERIAL_PRESENT is not set CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 26ee823df3..906abbfd69 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -9,7 +9,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -18,7 +17,6 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_MTDIDS_DEFAULT="nand0=NAND" CONFIG_MTDPARTS_DEFAULT="mtdparts=NAND:640k(bootloader),128k(env1),128k(env2),128k(dtb),6144k(kernel),-(root)" @@ -29,12 +27,44 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2 +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_SYS_I2C_MXC_I2C4=y +CONFIG_MISC=y +CONFIG_MXC_OCOTP=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_I2C_EEPROM_BUS=2 +CONFIG_SYS_EEPROM_SIZE=32768 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y +CONFIG_NAND_VF610_NFC_DT=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_VYBRID=y +CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index e125a38e7d..c2ecb7ec18 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -24,48 +24,14 @@ /* NAND support */ #define CONFIG_SYS_NAND_ONFI_DETECTION -#ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR - -#define CONFIG_JFFS2_NAND - -/* Dynamic MTD partition support */ - -#endif - -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 - -/*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ - -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_FEC_MXC_PHYADDR 0 - /* QSPI Configs*/ - #ifdef CONFIG_FSL_QSPI #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 #define CONFIG_SYS_FSL_QSPI_LE #endif -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC_I2C3 -#define CONFIG_SYS_I2C_MXC - -/* RTC (actually an RV-4162 but M41T62-compatible) */ -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_RTC_BUS_NUM 2 - -/* EEPROM (24FC256) */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -#define CONFIG_SYS_I2C_EEPROM_BUS 2 - #define CONFIG_LOADADDR 0x82000000 From 8d9174003a7bc63f3bdaef8895999e041aab93a0 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:51 +0100 Subject: [PATCH 014/140] config: pcm052: Use SZ_X{MK} from linux/sizes.h for include/configs/pcm052.h Signed-off-by: Lukasz Majewski Reviewed-by: Marcel Ziswiler --- include/configs/pcm052.h | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index c2ecb7ec18..fb8f3c8609 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -9,6 +9,7 @@ #define __CONFIG_H #include +#include #define CONFIG_SKIP_LOWLEVEL_INIT @@ -16,7 +17,7 @@ #define CONFIG_CMDLINE_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M) /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -27,7 +28,7 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* QSPI Configs*/ #ifdef CONFIG_FSL_QSPI -#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_SIZE (SZ_16M) #define FSL_QSPI_FLASH_NUM 2 #define CONFIG_SYS_FSL_QSPI_LE #endif @@ -154,7 +155,7 @@ /* Physical memory map */ #define PHYS_SDRAM (0x80000000) -#define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024) +#define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * SZ_1M) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -167,17 +168,17 @@ /* environment organization */ #ifdef CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_SIZE (SZ_8K) -#define CONFIG_ENV_OFFSET (12 * 64 * 1024) +#define CONFIG_ENV_OFFSET (12 * SZ_64K) #define CONFIG_SYS_MMC_ENV_DEV 0 #endif #ifdef CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_SECT_SIZE (SZ_128K) +#define CONFIG_ENV_SIZE (SZ_8K) #define CONFIG_ENV_OFFSET 0xA0000 -#define CONFIG_ENV_SIZE_REDUND (8 * 1024) +#define CONFIG_ENV_SIZE_REDUND (SZ_8K) #define CONFIG_ENV_OFFSET_REDUND 0xC0000 #endif From 6f854c6655be7d9eb0841106cb51ff5c1f3a5661 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:52 +0100 Subject: [PATCH 015/140] config: bk4: Update include/configs/bk4r1.h file The BK4's config file has changed since its initial posting to main line. This commit reflects those changes. Signed-off-by: Lukasz Majewski --- include/configs/bk4r1.h | 214 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 206 insertions(+), 8 deletions(-) diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index a012705870..bbd3e4e636 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -1,24 +1,222 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * Copyright (C) 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * * Copyright 2016 3ADEV * Written-by: Albert ARIBAUD * - * Configuration settings for the phytec PCM-052 SoM-based BK4R1. + * Configuration settings for BK4R1. */ +#ifndef __CONFIG_H +#define __CONFIG_H + /* Define the BK4r1-specific env commands */ -#define PCM052_EXTRA_ENV_SETTINGS \ +#define BK4_EXTRA_ENV_SETTINGS \ + "bootlimit=3\0" \ + "eraseuserdata=false\0" \ + "altbootcmd=led 5 on; " \ + "boot\0" \ "set_gpio103=mw 0x400ff0c4 0x0080; mw 0x4004819C 0x000011bf\0" \ - "set_gpio122=mw 0x400481e8 0x0282; mw 0x400ff0c4 0x04000000\0" + "set_gpio102=mw 0x400ff0c4 0x40; mw 0x40048198 0x000011bf\0" \ + "set_gpio96=mw 0x40048180 0x282; mw 0x400ff0c4 0x1\0"\ + "set_gpio122=mw 0x400481e8 0x0282; mw 0x400ff0c4 0x04000000\0"\ + "set_gpio6=mw 0x40048018 0x282; mw 0x400ff008 0x40\0"\ + "manage_userdata=" MANAGE_USERDATA "\0"\ + "ncenable=true\0"\ + "ncserverip=192.168.0.77\0"\ + "if_netconsole=ping $ncserverip\0"\ + "start_netconsole=setenv ncip $serverip; setenv bootdelay 10;" \ + "setenv stdin nc; setenv stdout nc; setenv stderr nc; version;\0" \ + "preboot=" BK4_NET_INIT \ + "if ${ncenable}; then run if_netconsole start_netconsole; fi\0" /* BK4r1 boot command sets GPIO103/PTC30 to force USB hub out of reset*/ -#define PCM052_BOOTCOMMAND "run set_gpio103; sf probe; " +#define BK4_BOOTCOMMAND "run set_gpio122; run set_gpio96; sf probe; " \ + "run manage_userdata; " + +/* Enable PREBOOT variable */ +#define CONFIG_PREBOOT + +/* Set ARP_TIMEOUT to 500ms */ +#define CONFIG_ARP_TIMEOUT 500UL + +/* Set ARP_TIMEOUT_COUNT to 3 repetitions */ +#define CONFIG_NET_RETRY_COUNT 5 /* BK4r1 net init sets GPIO122/PTE17 to enable Ethernet */ -#define PCM052_NET_INIT "run set_gpio122; " +#define BK4_NET_INIT "run set_gpio122;" -/* add NOR to MTD env */ +/* Check if userdata volume shall be erased */ +#define MANAGE_USERDATA "if ${eraseuserdata}; " \ + "then ubi part system; " \ + "ubi remove userdata; " \ + "ubi create userdata; " \ + "ubi detach; " \ + "setenv eraseuserdata false; " \ + "saveenv; " \ + "fi; " -/* now include standard PCM052 config */ +/* Autoboot options */ +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT \ + "Enter passphrase to stop autoboot, booting in %d seconds\n" +#define CONFIG_AUTOBOOT_STOP_STR "123" -#include "configs/pcm052.h" +#include +#include + +#define CONFIG_SKIP_LOWLEVEL_INIT + +/* Enable passing of ATAGs */ +#define CONFIG_CMDLINE_TAG + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 4 * SZ_1M) + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* NAND support */ +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define IMX_FEC1_BASE ENET1_BASE_ADDR + +/* QSPI Configs*/ +#ifdef CONFIG_FSL_QSPI +#define FSL_QSPI_FLASH_SIZE (SZ_16M) +#define FSL_QSPI_FLASH_NUM 2 +#define CONFIG_SYS_FSL_QSPI_LE +#endif + +#define CONFIG_LOADADDR 0x82000000 + +/* We boot from the gfxRAM area of the OCRAM. */ +#define CONFIG_BOARD_SIZE_LIMIT 520192 + +/* boot command, including the target-defined one if any */ +#define CONFIG_BOOTCOMMAND BK4_BOOTCOMMAND "run bootcmd_nand" + +/* Extra env settings (including the target-defined ones if any) */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + BK4_EXTRA_ENV_SETTINGS \ + "autoload=no\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "blimg_file=u-boot.vyb\0" \ + "blimg_addr=0x81000000\0" \ + "dtbkernel_file=fitImage\0" \ + "dtbkernel_addr=0x82000000\0" \ + "ram_file=uRamdisk\0" \ + "ram_addr=0x83000000\0" \ + "filesys=rootfs.ubifs\0" \ + "sys_addr=0x81000000\0" \ + "nfs_root=/path/to/nfs/root\0" \ + "tftptimeout=1000\0" \ + "tftptimeoutcountmax=1000000\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + "ipaddr=192.168.0.60\0" \ + "serverip=192.168.0.1\0" \ + "bootargs_base=setenv bootargs rw " \ + "console=ttyLP1,115200n8\0" \ + "bootargs_sd=setenv bootargs ${bootargs} " \ + "root=/dev/mmcblk0p2 rootwait\0" \ + "bootargs_nand=setenv bootargs ${bootargs} " \ + "ubi.mtd=5 rootfstype=" \ + "ubifs root=ubi0:rootfs${active_workset}\0" \ + "bootargs_ram=setenv bootargs ${bootargs} " \ + "root=/dev/ram rw initrd=${ram_addr}\0" \ + "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \ + "fatload mmc 0:2 ${dtbkernel_addr} ${dtbkernel_file}; " \ + "bootm ${dtbkernel_addr}\0" \ + "bootcmd_nand=sf probe;run bootargs_base bootargs_nand bootargs_mtd; " \ + "ubi part dtbkernel; " \ + "ubi readvol ${dtbkernel_addr} dtbkernel${active_workset}; " \ + "led 0 on; " \ + "bootm ${dtbkernel_addr}\0" \ + "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \ + "nand read ${fdt_addr} dtb; " \ + "nand read ${kernel_addr} kernel; " \ + "nand read ${ram_addr} root; " \ + "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \ + "update_bootloader_from_sd=if fatload mmc 0:2 ${blimg_addr} " \ + "${blimg_file}; " \ + "then sf probe; " \ + "mtdparts default; " \ + "nand erase.part bootloader; " \ + "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \ + "update_bootloader_from_tftp=if tftp ${blimg_addr} "\ + "${tftpdir}${blimg_file}; "\ + "then sf probe; " \ + "mtdparts default; " \ + "nand erase.part bootloader; " \ + "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \ + "update_dtbkernel_from_sd=if fatload mmc 0:2 ${dtbkernel_addr} " \ + "${dtbkernel_file}; " \ + "then sf probe; " \ + "ubi part dtbkernel; " \ + "ubi write ${dtbkernel_addr} dtbkernel${active_workset} " \ + "${filesize}; " \ + "ubi detach; fi\0" \ + "update_dtbkernel_from_tftp=if tftp ${dtbkernel_addr} " \ + "${tftpdir}${dtbkernel_file}; " \ + "then sf probe; " \ + "ubi part dtbkernel; " \ + "ubi write ${dtbkernel_addr} dtbkernel${active_workset} " \ + "${filesize}; " \ + "ubi detach; fi\0" \ + "update_ramdisk_from_sd=if fatload mmc 0:2 ${ram_addr} " \ + "${ram_file}; " \ + "then sf probe; " \ + "mtdparts default; " \ + "nand erase.part initrd; " \ + "nand write ${ram_addr} initrd ${filesize}; fi\0" \ + "update_ramdisk_from_tftp=if tftp ${ram_addr} ${tftpdir}${ram_file}; " \ + "then sf probe; " \ + "nand erase.part initrd; " \ + "nand write ${ram_addr} initrd ${filesize}; fi\0" \ + "update_rootfs_from_sd=if fatload mmc 0:2 ${sys_addr} " \ + "${filesys}; " \ + "then sf probe; " \ + "ubi part system; " \ + "ubi write ${sys_addr} rootfs${active_workset} ${filesize}; " \ + "ubi detach; fi\0" \ + "update_rootfs_from_tftp=if tftp ${sys_addr} ${tftpdir}${filesys}; " \ + "then sf probe; " \ + "ubi part system; " \ + "ubi write ${sys_addr} rootfs${active_workset} ${filesize}; " \ + "ubi detach; fi\0" \ + "active_workset=1\0" + +/* Miscellaneous configurable options */ + +#define CONFIG_SYS_MEMTEST_START 0x80010000 +#define CONFIG_SYS_MEMTEST_END 0x87C00000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Physical memory map */ +#define PHYS_SDRAM (0x80000000) +#define PHYS_SDRAM_SIZE (SZ_512M) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#ifdef CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE (SZ_128K) +#define CONFIG_ENV_SIZE (SZ_8K) +#define CONFIG_ENV_OFFSET 0x200000 +#define CONFIG_ENV_SIZE_REDUND (SZ_8K) +#define CONFIG_ENV_OFFSET_REDUND 0x220000 +#endif + +#endif /* __CONFIG_H */ From 27e15e533cc498aee90360c5f34c3832f466b8a2 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:53 +0100 Subject: [PATCH 016/140] pcm052: board: Remove in-board setup code (it is now replaced by DM setup) This commit cleans up the pcm052.c file to remove dead code after moving to DTS and DM. Signed-off-by: Lukasz Majewski --- board/phytec/pcm052/pcm052.c | 267 ----------------------------------- 1 file changed, 267 deletions(-) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index 95df0be6c1..4a18b0e0f4 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -13,79 +13,9 @@ #include #include #include -#include -#include -#include -#include -#include DECLARE_GLOBAL_DATA_PTR; -/* - * Default DDR pad settings in arch/arm/include/asm/arch-vf610/iomux-vf610.h - * do not match our settings. Let us (re)define our own settings here. - */ - -#define PCM052_VF610_DDR_PAD_CTRL PAD_CTL_DSE_20ohm -#define PCM052_VF610_DDR_PAD_CTRL_1 (PAD_CTL_DSE_20ohm | \ - PAD_CTL_INPUT_DIFFERENTIAL) -#define PCM052_VF610_DDR_RESET_PAD_CTL (PAD_CTL_DSE_150ohm | \ - PAD_CTL_PUS_100K_UP | \ - PAD_CTL_INPUT_DIFFERENTIAL) - -enum { - PCM052_VF610_PAD_DDR_RESETB = IOMUX_PAD(0x021c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_RESET_PAD_CTL), - PCM052_VF610_PAD_DDR_A15__DDR_A_15 = IOMUX_PAD(0x0220, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A14__DDR_A_14 = IOMUX_PAD(0x0224, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A13__DDR_A_13 = IOMUX_PAD(0x0228, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A12__DDR_A_12 = IOMUX_PAD(0x022c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A11__DDR_A_11 = IOMUX_PAD(0x0230, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A10__DDR_A_10 = IOMUX_PAD(0x0234, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A9__DDR_A_9 = IOMUX_PAD(0x0238, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A8__DDR_A_8 = IOMUX_PAD(0x023c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A7__DDR_A_7 = IOMUX_PAD(0x0240, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A6__DDR_A_6 = IOMUX_PAD(0x0244, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A5__DDR_A_5 = IOMUX_PAD(0x0248, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A4__DDR_A_4 = IOMUX_PAD(0x024c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A3__DDR_A_3 = IOMUX_PAD(0x0250, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A2__DDR_A_2 = IOMUX_PAD(0x0254, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A1__DDR_A_1 = IOMUX_PAD(0x0258, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_A0__DDR_A_0 = IOMUX_PAD(0x025c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_BA2__DDR_BA_2 = IOMUX_PAD(0x0260, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_BA1__DDR_BA_1 = IOMUX_PAD(0x0264, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_BA0__DDR_BA_0 = IOMUX_PAD(0x0268, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_CAS__DDR_CAS_B = IOMUX_PAD(0x026c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_CKE__DDR_CKE_0 = IOMUX_PAD(0x0270, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_CLK__DDR_CLK_0 = IOMUX_PAD(0x0274, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL_1), - PCM052_VF610_PAD_DDR_CS__DDR_CS_B_0 = IOMUX_PAD(0x0278, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D15__DDR_D_15 = IOMUX_PAD(0x027c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D14__DDR_D_14 = IOMUX_PAD(0x0280, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D13__DDR_D_13 = IOMUX_PAD(0x0284, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D12__DDR_D_12 = IOMUX_PAD(0x0288, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D11__DDR_D_11 = IOMUX_PAD(0x028c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D10__DDR_D_10 = IOMUX_PAD(0x0290, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D9__DDR_D_9 = IOMUX_PAD(0x0294, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D8__DDR_D_8 = IOMUX_PAD(0x0298, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D7__DDR_D_7 = IOMUX_PAD(0x029c, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D6__DDR_D_6 = IOMUX_PAD(0x02a0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D5__DDR_D_5 = IOMUX_PAD(0x02a4, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D4__DDR_D_4 = IOMUX_PAD(0x02a8, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D3__DDR_D_3 = IOMUX_PAD(0x02ac, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D2__DDR_D_2 = IOMUX_PAD(0x02b0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D1__DDR_D_1 = IOMUX_PAD(0x02b4, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_D0__DDR_D_0 = IOMUX_PAD(0x02b8, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_DQM1__DDR_DQM_1 = IOMUX_PAD(0x02bc, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_DQM0__DDR_DQM_0 = IOMUX_PAD(0x02c0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_DQS1__DDR_DQS_1 = IOMUX_PAD(0x02c4, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL_1), - PCM052_VF610_PAD_DDR_DQS0__DDR_DQS_0 = IOMUX_PAD(0x02c8, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL_1), - PCM052_VF610_PAD_DDR_RAS__DDR_RAS_B = IOMUX_PAD(0x02cc, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_WE__DDR_WE_B = IOMUX_PAD(0x02d0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_ODT1__DDR_ODT_0 = IOMUX_PAD(0x02d4, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_ODT0__DDR_ODT_1 = IOMUX_PAD(0x02d8, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 = IOMUX_PAD(0x02dc, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), - PCM052_VF610_PAD_DDR_DDRBYTE0__DDR_DDRBYTE0 = IOMUX_PAD(0x02e0, __NA_, 0, __NA_, 0, PCM052_VF610_DDR_PAD_CTRL), -}; - static struct ddrmc_cr_setting pcm052_cr_settings[] = { /* not in the datasheets, but in the original code */ { 0x00002000, 105 }, @@ -154,59 +84,6 @@ static struct ddrmc_phy_setting pcm052_phy_settings[] = { int dram_init(void) { - static const iomux_v3_cfg_t pcm052_pads[] = { - PCM052_VF610_PAD_DDR_A15__DDR_A_15, - PCM052_VF610_PAD_DDR_A14__DDR_A_14, - PCM052_VF610_PAD_DDR_A13__DDR_A_13, - PCM052_VF610_PAD_DDR_A12__DDR_A_12, - PCM052_VF610_PAD_DDR_A11__DDR_A_11, - PCM052_VF610_PAD_DDR_A10__DDR_A_10, - PCM052_VF610_PAD_DDR_A9__DDR_A_9, - PCM052_VF610_PAD_DDR_A8__DDR_A_8, - PCM052_VF610_PAD_DDR_A7__DDR_A_7, - PCM052_VF610_PAD_DDR_A6__DDR_A_6, - PCM052_VF610_PAD_DDR_A5__DDR_A_5, - PCM052_VF610_PAD_DDR_A4__DDR_A_4, - PCM052_VF610_PAD_DDR_A3__DDR_A_3, - PCM052_VF610_PAD_DDR_A2__DDR_A_2, - PCM052_VF610_PAD_DDR_A1__DDR_A_1, - PCM052_VF610_PAD_DDR_A0__DDR_A_0, - PCM052_VF610_PAD_DDR_BA2__DDR_BA_2, - PCM052_VF610_PAD_DDR_BA1__DDR_BA_1, - PCM052_VF610_PAD_DDR_BA0__DDR_BA_0, - PCM052_VF610_PAD_DDR_CAS__DDR_CAS_B, - PCM052_VF610_PAD_DDR_CKE__DDR_CKE_0, - PCM052_VF610_PAD_DDR_CLK__DDR_CLK_0, - PCM052_VF610_PAD_DDR_CS__DDR_CS_B_0, - PCM052_VF610_PAD_DDR_D15__DDR_D_15, - PCM052_VF610_PAD_DDR_D14__DDR_D_14, - PCM052_VF610_PAD_DDR_D13__DDR_D_13, - PCM052_VF610_PAD_DDR_D12__DDR_D_12, - PCM052_VF610_PAD_DDR_D11__DDR_D_11, - PCM052_VF610_PAD_DDR_D10__DDR_D_10, - PCM052_VF610_PAD_DDR_D9__DDR_D_9, - PCM052_VF610_PAD_DDR_D8__DDR_D_8, - PCM052_VF610_PAD_DDR_D7__DDR_D_7, - PCM052_VF610_PAD_DDR_D6__DDR_D_6, - PCM052_VF610_PAD_DDR_D5__DDR_D_5, - PCM052_VF610_PAD_DDR_D4__DDR_D_4, - PCM052_VF610_PAD_DDR_D3__DDR_D_3, - PCM052_VF610_PAD_DDR_D2__DDR_D_2, - PCM052_VF610_PAD_DDR_D1__DDR_D_1, - PCM052_VF610_PAD_DDR_D0__DDR_D_0, - PCM052_VF610_PAD_DDR_DQM1__DDR_DQM_1, - PCM052_VF610_PAD_DDR_DQM0__DDR_DQM_0, - PCM052_VF610_PAD_DDR_DQS1__DDR_DQS_1, - PCM052_VF610_PAD_DDR_DQS0__DDR_DQS_0, - PCM052_VF610_PAD_DDR_RAS__DDR_RAS_B, - PCM052_VF610_PAD_DDR_WE__DDR_WE_B, - PCM052_VF610_PAD_DDR_ODT1__DDR_ODT_0, - PCM052_VF610_PAD_DDR_ODT0__DDR_ODT_1, - PCM052_VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1, - PCM052_VF610_PAD_DDR_DDRBYTE0__DDR_DDRBYTE0, - PCM052_VF610_PAD_DDR_RESETB, - }; - #if defined(CONFIG_TARGET_PCM052) static const struct ddr3_jedec_timings pcm052_ddr_timings = { @@ -323,8 +200,6 @@ int dram_init(void) #endif - imx_iomux_v3_setup_multiple_pads(pcm052_pads, ARRAY_SIZE(pcm052_pads)); - ddrmc_ctrl_init_ddr3(&pcm052_ddr_timings, pcm052_cr_settings, pcm052_phy_settings, 1, row_diff); @@ -333,135 +208,6 @@ int dram_init(void) return 0; } -static void setup_iomux_uart(void) -{ - static const iomux_v3_cfg_t uart1_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTB4__UART1_TX, VF610_UART_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTB5__UART1_RX, VF610_UART_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); -} - -#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE) - -static void setup_iomux_enet(void) -{ - static const iomux_v3_cfg_t enet0_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTA6__RMII0_CLKIN, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC1__RMII0_MDIO, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC0__RMII0_MDC, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC2__RMII0_CRS_DV, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC3__RMII0_RD1, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC4__RMII0_RD0, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC5__RMII0_RXER, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC6__RMII0_TD1, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC7__RMII0_TD0, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC8__RMII0_TXEN, ENET_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(enet0_pads, ARRAY_SIZE(enet0_pads)); -} - -/* - * I2C2 is the only I2C used, on pads PTA22/PTA23. - */ - -static void setup_iomux_i2c(void) -{ - static const iomux_v3_cfg_t i2c_pads[] = { - VF610_PAD_PTA22__I2C2_SCL, - VF610_PAD_PTA23__I2C2_SDA, - }; - - imx_iomux_v3_setup_multiple_pads(i2c_pads, ARRAY_SIZE(i2c_pads)); -} - -#ifdef CONFIG_NAND_VF610_NFC -static void setup_iomux_nfc(void) -{ - static const iomux_v3_cfg_t nfc_pads[] = { - VF610_PAD_PTD31__NF_IO15, - VF610_PAD_PTD30__NF_IO14, - VF610_PAD_PTD29__NF_IO13, - VF610_PAD_PTD28__NF_IO12, - VF610_PAD_PTD27__NF_IO11, - VF610_PAD_PTD26__NF_IO10, - VF610_PAD_PTD25__NF_IO9, - VF610_PAD_PTD24__NF_IO8, - VF610_PAD_PTD23__NF_IO7, - VF610_PAD_PTD22__NF_IO6, - VF610_PAD_PTD21__NF_IO5, - VF610_PAD_PTD20__NF_IO4, - VF610_PAD_PTD19__NF_IO3, - VF610_PAD_PTD18__NF_IO2, - VF610_PAD_PTD17__NF_IO1, - VF610_PAD_PTD16__NF_IO0, - VF610_PAD_PTB24__NF_WE_B, - VF610_PAD_PTB25__NF_CE0_B, - VF610_PAD_PTB27__NF_RE_B, - VF610_PAD_PTC26__NF_RB_B, - VF610_PAD_PTC27__NF_ALE, - VF610_PAD_PTC28__NF_CLE - }; - - imx_iomux_v3_setup_multiple_pads(nfc_pads, ARRAY_SIZE(nfc_pads)); -} -#endif - -static void setup_iomux_qspi(void) -{ - static const iomux_v3_cfg_t qspi0_pads[] = { - VF610_PAD_PTD0__QSPI0_A_QSCK, - VF610_PAD_PTD1__QSPI0_A_CS0, - VF610_PAD_PTD2__QSPI0_A_DATA3, - VF610_PAD_PTD3__QSPI0_A_DATA2, - VF610_PAD_PTD4__QSPI0_A_DATA1, - VF610_PAD_PTD5__QSPI0_A_DATA0, - VF610_PAD_PTD7__QSPI0_B_QSCK, - VF610_PAD_PTD8__QSPI0_B_CS0, - VF610_PAD_PTD9__QSPI0_B_DATA3, - VF610_PAD_PTD10__QSPI0_B_DATA2, - VF610_PAD_PTD11__QSPI0_B_DATA1, - VF610_PAD_PTD12__QSPI0_B_DATA0, - }; - - imx_iomux_v3_setup_multiple_pads(qspi0_pads, ARRAY_SIZE(qspi0_pads)); -} - -#define ESDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE) - -struct fsl_esdhc_cfg esdhc_cfg[1] = { - {ESDHC1_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - /* eSDHC1 is always present */ - return 1; -} - -int board_mmc_init(bd_t *bis) -{ - static const iomux_v3_cfg_t esdhc1_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTA24__ESDHC1_CLK, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA25__ESDHC1_CMD, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA26__ESDHC1_DAT0, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA27__ESDHC1_DAT1, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA28__ESDHC1_DAT2, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA29__ESDHC1_DAT3, ESDHC_PAD_CTRL), - }; - - esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - - imx_iomux_v3_setup_multiple_pads( - esdhc1_pads, ARRAY_SIZE(esdhc1_pads)); - - return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); -} - static void clock_init(void) { struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR; @@ -534,23 +280,10 @@ static void mscm_init(void) writew(MSCM_IRSPRC_CP0_EN, &mscmir->irsprc[i]); } -int board_phy_config(struct phy_device *phydev) -{ - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - int board_early_init_f(void) { clock_init(); mscm_init(); - setup_iomux_uart(); - setup_iomux_enet(); - setup_iomux_i2c(); - setup_iomux_qspi(); - setup_iomux_nfc(); return 0; } From 32c160ef59312aea77a51d08c5969869d219710e Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:54 +0100 Subject: [PATCH 017/140] config: bk4: Update u-boot script to support recovery via SD card Signed-off-by: Lukasz Majewski --- include/configs/bk4r1.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index bbd3e4e636..7bd3411ff2 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -189,6 +189,37 @@ "ubi part system; " \ "ubi write ${sys_addr} rootfs${active_workset} ${filesize}; " \ "ubi detach; fi\0" \ + "setup_dtbkernel=nand erase.part dtbkernel; " \ + "ubi part dtbkernel; " \ + "ubi create dtbkernel1 972000 s; " \ + "ubi create dtbkernel2 972000 s; " \ + "ubi detach\0" \ + "setup_system=nand erase.part system; " \ + "ubi part system; " \ + "ubi create rootfs1 15E15000 d; " \ + "ubi create rootfs2 15E15000 d; " \ + "ubi create userdata; " \ + "ubi detach\0" \ + "prepare_install_bk4r1_envs=" \ + "echo 'Preparing envs for SD card recovery!';" \ + "setenv ipaddr 192.168.0.99;" \ + "setenv serverip 192.168.0.50;" \ + "\0" \ + "install_bk4r1rs="\ + "led 0 on; " \ + "nand erase.chip; mtdparts default; "\ + "led 1 on; "\ + "run setup_dtbkernel; " \ + "run setup_system; " \ + "led 2 on;" \ + "run update_bootloader_from_sd; "\ + "run update_dtbkernel_from_sd; "\ + "run update_rootfs_from_sd; "\ + "setenv bootcmd 'run bootcmd_nand'; "\ + "saveenv; " \ + "led 3 on; " \ + "echo Finished - Please Power off, REMOVE SDCARD and set boot" \ + "source to NAND\0" \ "active_workset=1\0" /* Miscellaneous configurable options */ From b3d28ace14ce2dcd09bfce99fdbabe2fe60ea334 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:55 +0100 Subject: [PATCH 018/140] config: bk4: Update u-boot envs to support NOR memories initial setup Signed-off-by: Lukasz Majewski --- include/configs/bk4r1.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index 7bd3411ff2..05ebb7d9c5 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -200,6 +200,24 @@ "ubi create rootfs2 15E15000 d; " \ "ubi create userdata; " \ "ubi detach\0" \ + "setup_nor1=" BK4_NET_INIT \ + "if tftp ${sys_addr} ${tftpdir}ubinor1.img; " \ + "then sf probe 0:0; " \ + "sf erase 0 01000000; " \ + "mtdparts default; " \ + "ubi part nor; " \ + "ubi create nor1fs; " \ + "ubi write ${sys_addr} nor1fs ${filesize}; " \ + "ubi detach; fi\0" \ + "setup_nor2=" BK4_NET_INIT \ + "if tftp ${sys_addr} ${tftpdir}ubinor2.img; " \ + "then sf probe 0:1; " \ + "sf erase 0 01000000; " \ + "mtdparts default; " \ + "ubi part nor; " \ + "ubi create nor2fs; " \ + "ubi write ${sys_addr} nor2fs ${filesize}; " \ + "ubi detach; fi\0" \ "prepare_install_bk4r1_envs=" \ "echo 'Preparing envs for SD card recovery!';" \ "setenv ipaddr 192.168.0.99;" \ From e5b345f30cc717706cd45cb18291cb607c3b1d4d Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:56 +0100 Subject: [PATCH 019/140] pcm052: bk4: sdcard: Add support for SD card booting/recovery This code allows reusing the default u-boot as in the late board init, the default envs are restored and proper recovery scripts executed. Signed-off-by: Lukasz Majewski --- arch/arm/cpu/armv7/vf610/Kconfig | 1 + arch/arm/include/asm/arch-vf610/imx-regs.h | 2 ++ board/phytec/pcm052/pcm052.c | 32 ++++++++++++++++++++++ 3 files changed, 35 insertions(+) diff --git a/arch/arm/cpu/armv7/vf610/Kconfig b/arch/arm/cpu/armv7/vf610/Kconfig index 13905b5281..5d485a3ce2 100644 --- a/arch/arm/cpu/armv7/vf610/Kconfig +++ b/arch/arm/cpu/armv7/vf610/Kconfig @@ -23,6 +23,7 @@ config TARGET_BK4R1 bool "BK4r1" select SYS_FSL_ERRATUM_ESDHC135 select SYS_FSL_ERRATUM_ESDHC_A001 + select BOARD_LATE_INIT endchoice diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h index 5d1f63c98b..ae0a187c4d 100644 --- a/arch/arm/include/asm/arch-vf610/imx-regs.h +++ b/arch/arm/include/asm/arch-vf610/imx-regs.h @@ -289,6 +289,8 @@ #define SRC_SRSR_WDOG_M4 (0x1 << 4) #define SRC_SRSR_WDOG_A5 (0x1 << 3) #define SRC_SRSR_POR_RST (0x1 << 0) +#define SRC_SBMR1_BOOTCFG1_SDMMC BIT(6) +#define SRC_SBMR1_BOOTCFG1_MMC BIT(4) #define SRC_SBMR2_BMOD_MASK (0x3 << 24) #define SRC_SBMR2_BMOD_SHIFT 24 #define SRC_SBMR2_BMOD_FUSES 0x0 diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index 4a18b0e0f4..d4f170a503 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -13,6 +13,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -307,6 +308,37 @@ int board_init(void) return 0; } +#ifdef CONFIG_TARGET_BK4R1 +int board_late_init(void) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + u32 reg; + + /* + * BK4r1 handle emergency/service SD card boot + * Checking the SBMR1 register BOOTCFG1 byte: + * NAND: + * bit [2] - NAND data width - 16 + * bit [5] - NAND fast boot + * bit [7] = 1 - NAND as a source of booting + * SD card (0x64): + * bit [4] = 0 - SD card source + * bit [6] = 1 - SD/MMC source + */ + + reg = readl(&psrc->sbmr1); + if ((reg & SRC_SBMR1_BOOTCFG1_SDMMC) && + !(reg & SRC_SBMR1_BOOTCFG1_MMC)) { + printf("------ SD card boot -------\n"); + set_default_env("!LVFBootloader", 0); + env_set("bootcmd", + "run prepare_install_bk4r1_envs; run install_bk4r1rs"); + } + + return 0; +} +#endif /* CONFIG_TARGET_BK4R1 */ + int checkboard(void) { #ifdef CONFIG_TARGET_BK4R1 From 379255f1ee12c2ddbeaba745a36e1803a5b01fcd Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:57 +0100 Subject: [PATCH 020/140] pcm052: board: Add code to setup LED default states As one has moved to DM based LEDs, this code is required to setup the default state. Signed-off-by: Lukasz Majewski --- board/phytec/pcm052/pcm052.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index d4f170a503..721e25105a 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -13,6 +13,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -314,6 +315,9 @@ int board_late_init(void) struct src *psrc = (struct src *)SRC_BASE_ADDR; u32 reg; + if (IS_ENABLED(CONFIG_LED)) + led_default_state(); + /* * BK4r1 handle emergency/service SD card boot * Checking the SBMR1 register BOOTCFG1 byte: From 15a445690358462226df8038fe34e295d23b5319 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:58 +0100 Subject: [PATCH 021/140] pcm052: mac: Provide board specific imx_get_mac_from_fuse() function This commit introduces the board specific function to read fused mac address. Signed-off-by: Lukasz Majewski --- board/phytec/pcm052/pcm052.c | 41 ++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index 721e25105a..1e443a5850 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -310,6 +310,47 @@ int board_init(void) } #ifdef CONFIG_TARGET_BK4R1 +void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[4]; + struct fuse_bank4_regs *fuse = + (struct fuse_bank4_regs *)bank->fuse_regs; + u32 value; + + /* + * BK4 has different layout of stored MAC address + * than one used in imx_get_mac_from_fuse() @ generic.c + */ + + switch (dev_id) { + case 0: + value = readl(&fuse->mac_addr1); + + mac[0] = value >> 8; + mac[1] = value; + + value = readl(&fuse->mac_addr0); + mac[2] = value >> 24; + mac[3] = value >> 16; + mac[4] = value >> 8; + mac[5] = value; + break; + case 1: + value = readl(&fuse->mac_addr2); + + mac[0] = value >> 24; + mac[1] = value >> 16; + mac[2] = value >> 8; + mac[3] = value; + + value = readl(&fuse->mac_addr1); + mac[4] = value >> 24; + mac[5] = value >> 16; + break; + } +} + int board_late_init(void) { struct src *psrc = (struct src *)SRC_BASE_ADDR; From bdc9fefcbf9c2b8c9b2db84de696ec894bc66341 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:59 +0100 Subject: [PATCH 022/140] pcm052: bk4: Add board_phy_config() for BK4 to setup ksz8081 phy BK4 requires setup of 50MHz reference clock for its KSZ8081 PHY devices. Signed-off-by: Lukasz Majewski Acked-by: Joe Hershberger --- board/phytec/pcm052/pcm052.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index 1e443a5850..c30df5df9d 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -15,6 +15,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -382,6 +383,21 @@ int board_late_init(void) return 0; } + +/** + * KSZ8081 + */ +#define MII_KSZ8081_REFERENCE_CLOCK_SELECT 0x1f +#define RMII_50MHz_CLOCK 0x8180 + +int board_phy_config(struct phy_device *phydev) +{ + /* Set 50 MHz reference clock */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ8081_REFERENCE_CLOCK_SELECT, + RMII_50MHz_CLOCK); + + return genphy_config(phydev); +} #endif /* CONFIG_TARGET_BK4R1 */ int checkboard(void) From d93e3ba6e370c108f75ac8ebd5353003767b3e79 Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:11 +0200 Subject: [PATCH 023/140] board: ge: bx50v3: Enable CONFIG_DM Add simplified, generalised, bx50v3 device tree and enable CONFIG_DM. Signed-off-by: Ian Ray --- arch/arm/dts/Makefile | 2 ++ arch/arm/dts/imx6q-bx50v3.dts | 15 +++++++++++++++ configs/ge_bx50v3_defconfig | 4 ++++ 3 files changed, 21 insertions(+) create mode 100644 arch/arm/dts/imx6q-bx50v3.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 82f28b25e2..93559a3338 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -699,6 +699,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7623n-bananapi-bpi-r2.dtb \ mt7629-rfb.dtb +dtb-$(CONFIG_TARGET_GE_BX50V3) += imx6q-bx50v3.dtb + targets += $(dtb-y) # Add any required device tree compiler flags here diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts new file mode 100644 index 0000000000..10b12998cd --- /dev/null +++ b/arch/arm/dts/imx6q-bx50v3.dts @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR X11 */ +/* + * Copyright 2015 Timesys Corporation. + * Copyright 2018 General Electric Company + * Based on imx6q-ba16.dtsi and imx6q-bx50v3.dtsi from kernel 4.20.5. + */ + +/dts-v1/; + +#include "imx6q.dtsi" + +/ { + model = "General Electric Bx50v3"; + compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q"; +}; diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 7319919998..a883f658b9 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -50,3 +50,7 @@ CONFIG_MXC_SPI=y CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y # CONFIG_EFI_LOADER is not set +CONFIG_DM=y +CONFIG_CMD_DM=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3" From efc260a9af922c0e8860109b1e9e9634f3a7965d Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:12 +0200 Subject: [PATCH 024/140] board: ge: bx50v3: Enable CONFIG_DM_MMC Use MMC device model, and remove USDHC pin configuration code since the pinctrl driver is used. Signed-off-by: Ian Ray --- arch/arm/dts/imx6q-bx50v3.dts | 47 ++++++++++++++ board/ge/bx50v3/bx50v3.c | 113 ---------------------------------- configs/ge_bx50v3_defconfig | 4 ++ include/configs/ge_bx50v3.h | 6 +- 4 files changed, 52 insertions(+), 118 deletions(-) diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts index 10b12998cd..0fff2195f9 100644 --- a/arch/arm/dts/imx6q-bx50v3.dts +++ b/arch/arm/dts/imx6q-bx50v3.dts @@ -13,3 +13,50 @@ model = "General Electric Bx50v3"; compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q"; }; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; + }; + + pinctrl_usdhc3_reset: usdhc3grp-reset { + fsl,pins = < + MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 + >; + }; +}; + +&usdhc1 { + status = "disabled"; +}; + +&usdhc2 { + status = "disabled"; +}; + +/* eMMC */ +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; + bus-width = <8>; + non-removable; + keep-power-in-suspend; + status = "okay"; +}; + +&usdhc4 { + status = "disabled"; +}; diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 079d302fbe..fe3fa274d4 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -44,10 +44,6 @@ static struct vpd_cache vpd; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST) @@ -116,45 +112,6 @@ static void setup_iomux_enet(void) mdelay(1); } -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - static iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), @@ -229,76 +186,6 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); } -#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg usdhc_cfg[3] = { - {USDHC2_BASE_ADDR}, - {USDHC3_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) -#define USDHC4_CD_GPIO IMX_GPIO_NR(6, 11) - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - case USDHC3_BASE_ADDR: - ret = 1; /* eMMC is always present */ - break; - case USDHC4_BASE_ADDR: - ret = !gpio_get_value(USDHC4_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int ret; - int i; - - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - gpio_direction_input(USDHC2_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - break; - case 2: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - gpio_direction_input(USDHC4_CD_GPIO); - usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - break; - default: - printf("Warning: you configured more USDHC controllers\n" - "(%d) then supported by the board (%d)\n", - i + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) - return ret; - } - - return 0; -} -#endif - static int mx6_rgmii_rework(struct phy_device *phydev) { /* Configure AR8033 to ouput a 125MHz clk from CLK_25M */ diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index a883f658b9..b0f5c1f9a6 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -54,3 +54,7 @@ CONFIG_DM=y CONFIG_CMD_DM=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3" +CONFIG_DM_MMC=y +CONFIG_BLK=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 3336578071..bb3c65efc7 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -45,10 +45,6 @@ #define CONFIG_LBA48 #endif -/* MMC Configs */ -#define CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 - /* USB Configs */ #ifdef CONFIG_USB #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 @@ -82,7 +78,7 @@ "image=/boot/fitImage\0" \ "fdt_high=0xffffffff\0" \ "dev=mmc\0" \ - "devnum=1\0" \ + "devnum=2\0" \ "rootdev=mmcblk0p\0" \ "quiet=quiet loglevel=0\0" \ "console=" CONSOLE_DEV "\0" \ From 06f2e030d00053a13a8a81f4a352fd1ca8fbb66c Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:13 +0200 Subject: [PATCH 025/140] board: ge: bx50v3: Enable CONFIG_DM_GPIO Enable CONFIG_DM_GPIO as a pre-requisite for enabling CONFIG_DM_SPI. Add explicit gpio_requests. Signed-off-by: Ian Ray --- board/ge/bx50v3/bx50v3.c | 11 ++++++++++- configs/ge_bx50v3_defconfig | 1 + 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index fe3fa274d4..dac063dc43 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -106,6 +106,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); /* Reset AR8033 PHY */ + gpio_request(IMX_GPIO_NR(1, 28), "fec_rst"); gpio_direction_output(IMX_GPIO_NR(1, 28), 0); mdelay(10); gpio_set_value(IMX_GPIO_NR(1, 28), 1); @@ -420,8 +421,8 @@ static void setup_display_bx50v3(void) /* backlights off until needed */ imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); + gpio_request(LVDS_POWER_GP, "lvds_power"); gpio_direction_input(LVDS_POWER_GP); - gpio_direction_input(LVDS_BACKLIGHT_GP); } #endif /* CONFIG_VIDEO_IPUV3 */ @@ -574,14 +575,22 @@ int board_init(void) set_confidx(&vpd); } + gpio_request(SUS_S3_OUT, "sus_s3_out"); gpio_direction_output(SUS_S3_OUT, 1); + + gpio_request(WIFI_EN, "wifi_en"); gpio_direction_output(WIFI_EN, 1); + #if defined(CONFIG_VIDEO_IPUV3) if (is_b850v3()) setup_display_b850v3(); else setup_display_bx50v3(); + + gpio_request(LVDS_BACKLIGHT_GP, "lvds_backlight"); + gpio_direction_input(LVDS_BACKLIGHT_GP); #endif + /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index b0f5c1f9a6..1acda9ec74 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -58,3 +58,4 @@ CONFIG_DM_MMC=y CONFIG_BLK=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_DM_GPIO=y From 8d8d3540eb544fa29167d74029f92a99b9a31eea Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:14 +0200 Subject: [PATCH 026/140] board: ge: bx50v3: Enable CONFIG_DM_SPI, CONFIG_DM_SPI_FLASH Use SPI flash device model, and remove SPI pin configuration code since the pinctrl driver is used. Signed-off-by: Ian Ray --- arch/arm/dts/imx6q-bx50v3.dts | 27 +++++++++++++++++++++++++++ board/ge/bx50v3/bx50v3.c | 25 ------------------------- configs/ge_bx50v3_defconfig | 2 ++ 3 files changed, 29 insertions(+), 25 deletions(-) diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts index 0fff2195f9..deaec63509 100644 --- a/arch/arm/dts/imx6q-bx50v3.dts +++ b/arch/arm/dts/imx6q-bx50v3.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "imx6q.dtsi" +#include / { model = "General Electric Bx50v3"; @@ -17,6 +18,16 @@ &iomuxc { pinctrl-names = "default"; + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + /* SPI1 CS */ + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 @@ -60,3 +71,19 @@ &usdhc4 { status = "disabled"; }; + +/* SPI NOR */ +&ecspi1 { + cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + flash: n25q032@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index dac063dc43..b69b9e727b 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -53,9 +53,6 @@ static struct vpd_cache vpd; #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_FAST) -#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_ODE | PAD_CTL_SRE_FAST) @@ -113,13 +110,6 @@ static void setup_iomux_enet(void) mdelay(1); } -static iomux_v3_cfg_t const ecspi1_pads[] = { - MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - static struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | I2C_PAD, @@ -159,18 +149,6 @@ static struct i2c_pads_info i2c_pad_info3 = { } }; -#ifdef CONFIG_MXC_SPI -int board_spi_cs_gpio(unsigned bus, unsigned cs) -{ - return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1; -} - -static void setup_spi(void) -{ - imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); -} -#endif - static iomux_v3_cfg_t const pcie_pads[] = { MX6_PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL), MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -594,9 +572,6 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; -#ifdef CONFIG_MXC_SPI - setup_spi(); -#endif return 0; } diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 1acda9ec74..14114acbce 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -59,3 +59,5 @@ CONFIG_BLK=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_GPIO=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y From bcce411bafb2d368ec8bdce712f926e0e6d821bc Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:15 +0200 Subject: [PATCH 027/140] board: ge: ppd: Enable CONFIG_DM Add simplified, generalised, ppd device tree and enable CONFIG_DM. Signed-off-by: Ian Ray --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx53-ppd.dts | 14 ++++++++++++++ configs/mx53ppd_defconfig | 4 ++++ 3 files changed, 19 insertions(+) create mode 100644 arch/arm/dts/imx53-ppd.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 93559a3338..acab1d3450 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -700,6 +700,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7629-rfb.dtb dtb-$(CONFIG_TARGET_GE_BX50V3) += imx6q-bx50v3.dtb +dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb targets += $(dtb-y) diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts new file mode 100644 index 0000000000..98e7dad0ba --- /dev/null +++ b/arch/arm/dts/imx53-ppd.dts @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR X11 */ +/* + * Copyright 2018 General Electric Company + * Based on imx53-ppd.dts from kernel 4.20.5. + */ + +/dts-v1/; + +#include "imx53.dtsi" + +/ { + model = "General Electric CS ONE"; + compatible = "ge,imx53-cpuvo", "fsl,imx53"; +}; diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 28540719df..04537c591a 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -42,3 +42,7 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y +CONFIG_DM=y +CONFIG_CMD_DM=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd" From 3cc0e327f2489ae7b3ff05d80efc768e1b4fb58f Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:16 +0200 Subject: [PATCH 028/140] arm: imx: Add esdhc3/4 nodes to imx53.dtsi These nodes are required by mx53ppd when built with CONFIG_DM_MMC=y. They are copied from Linux 4.20.5. Signed-off-by: Ian Ray --- arch/arm/dts/imx53.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/dts/imx53.dtsi b/arch/arm/dts/imx53.dtsi index e13009c870..0fd4acc6f5 100644 --- a/arch/arm/dts/imx53.dtsi +++ b/arch/arm/dts/imx53.dtsi @@ -33,6 +33,8 @@ i2c2 = &i2c3; mmc0 = &esdhc1; mmc1 = &esdhc2; + mmc2 = &esdhc3; + mmc3 = &esdhc4; }; tzic: tz-interrupt-controller@fffc000 { @@ -86,6 +88,30 @@ bus-width = <4>; status = "disabled"; }; + + esdhc3: esdhc@50020000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50020000 0x4000>; + interrupts = <3>; + clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>, + <&clks IMX5_CLK_DUMMY>, + <&clks IMX5_CLK_ESDHC3_PER_GATE>; + clock-names = "ipg", "ahb", "per"; + bus-width = <4>; + status = "disabled"; + }; + + esdhc4: esdhc@50024000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50024000 0x4000>; + interrupts = <4>; + clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>, + <&clks IMX5_CLK_DUMMY>, + <&clks IMX5_CLK_ESDHC4_PER_GATE>; + clock-names = "ipg", "ahb", "per"; + bus-width = <4>; + status = "disabled"; + }; }; iomuxc: iomuxc@53fa8000 { From 31c9afdd92380c6a1902325f322d2c4ba52d0ba2 Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:17 +0200 Subject: [PATCH 029/140] board: ge: ppd: Enable CONFIG_DM_MMC Use MMC device model, and remove USDHC pin configuration code since the pinctrl driver is used. Signed-off-by: Ian Ray --- arch/arm/dts/imx53-ppd.dts | 29 +++++++++++++++ board/ge/mx53ppd/mx53ppd.c | 73 -------------------------------------- configs/mx53ppd_defconfig | 4 +++ include/configs/mx53ppd.h | 6 +--- 4 files changed, 34 insertions(+), 78 deletions(-) diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts index 98e7dad0ba..f89d6f4672 100644 --- a/arch/arm/dts/imx53-ppd.dts +++ b/arch/arm/dts/imx53-ppd.dts @@ -12,3 +12,32 @@ model = "General Electric CS ONE"; compatible = "ge,imx53-cpuvo", "fsl,imx53"; }; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_esdhc3: esdhc3grp { + fsl,pins = < + MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 + MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 + MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 + MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 + MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 + MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 + MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 + MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 + MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 + MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 + >; + }; +}; + +/* eMMC */ +&esdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc3>; + compatible = "fsl,esdhc"; + bus-width = <8>; + non-removable; + status = "okay"; +}; diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index 23bfe55541..9e13a24755 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -122,79 +122,6 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); } -#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg esdhc_cfg[2] = { - {MMC_SDHC3_BASE_ADDR}, - {MMC_SDHC1_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - return 1; -} - -#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ - PAD_CTL_PUS_100K_UP) -#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \ - PAD_CTL_DSE_HIGH) - -int board_mmc_init(bd_t *bis) -{ - static const iomux_v3_cfg_t sd1_pads[] = { - NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD, - SD_CMD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL), - MX53_PAD_EIM_DA11__GPIO3_11, - }; - - static const iomux_v3_cfg_t sd2_pads[] = { - NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL), - NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL), - MX53_PAD_EIM_DA13__GPIO3_13, - }; - - u32 index; - int ret; - - esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - - for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { - switch (index) { - case 0: - imx_iomux_v3_setup_multiple_pads(sd1_pads, - ARRAY_SIZE(sd1_pads)); - break; - case 1: - imx_iomux_v3_setup_multiple_pads(sd2_pads, - ARRAY_SIZE(sd2_pads)); - break; - default: - printf("Warning: you configured more ESDHC controller (%d) as supported by the board(2)\n", - CONFIG_SYS_FSL_ESDHC_NUM); - return -EINVAL; - } - ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]); - if (ret) - return ret; - } - - return 0; -} -#endif - #define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 04537c591a..ec3bc10f6d 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -46,3 +46,7 @@ CONFIG_DM=y CONFIG_CMD_DM=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd" +CONFIG_DM_MMC=y +CONFIG_BLK=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX5=y diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index d2a8e6571a..db6cd650f1 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -30,10 +30,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -/* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 2 - /* Eth Configs */ #define CONFIG_FEC_MXC @@ -101,7 +97,7 @@ "image=/boot/fitImage\0" \ "fdt_high=0xffffffff\0" \ "dev=mmc\0" \ - "devnum=0\0" \ + "devnum=2\0" \ "rootdev=mmcblk0p\0" \ "quiet=quiet loglevel=0\0" \ "console=" CONSOLE_DEV "\0" \ From 61c4c2bf1e648bdf49d58a5388f1414f3906b62f Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:18 +0200 Subject: [PATCH 030/140] board: ge: store version information in fdt Add board-specific FDT function to store U-Boot version in device tree. Signed-off-by: Ian Ray --- board/ge/bx50v3/bx50v3.c | 11 +++++++++++ board/ge/mx53ppd/mx53ppd.c | 11 +++++++++++ configs/ge_bx50v3_defconfig | 1 + configs/mx53ppd_defconfig | 1 + 4 files changed, 24 insertions(+) diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index b69b9e727b..f42d2ceb79 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -27,6 +28,7 @@ #include #include #include +#include #include #include "../common/ge_common.h" #include "../common/vpd_reader.h" @@ -689,6 +691,15 @@ int checkboard(void) return 0; } +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, bd_t *bd) +{ + fdt_setprop(blob, 0, "ge,boot-ver", version_string, + strlen(version_string) + 1); + return 0; +} +#endif + static int do_backlight_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { #ifdef CONFIG_VIDEO_IPUV3 diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index 9e13a24755..5411e422ac 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -30,6 +31,7 @@ #include #include #include +#include #include #include "ppd_gpio.h" #include @@ -307,3 +309,12 @@ int checkboard(void) return 0; } + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, bd_t *bd) +{ + fdt_setprop(blob, 0, "ge,boot-ver", version_string, + strlen(version_string) + 1); + return 0; +} +#endif diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 14114acbce..354c61fd6b 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -61,3 +61,4 @@ CONFIG_PINCTRL_IMX6=y CONFIG_DM_GPIO=y CONFIG_DM_SPI=y CONFIG_DM_SPI_FLASH=y +CONFIG_OF_BOARD_SETUP=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index ec3bc10f6d..db31d817aa 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -50,3 +50,4 @@ CONFIG_DM_MMC=y CONFIG_BLK=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX5=y +CONFIG_OF_BOARD_SETUP=y From 403d3888c674a463f09c023efadfb78e2c0fb7c9 Mon Sep 17 00:00:00 2001 From: Joonas Aijala Date: Thu, 31 Jan 2019 16:21:19 +0200 Subject: [PATCH 031/140] board: ge: bx50v3: Specific ARP timeout removed Specific ARP timeout sometimes causes ARP timeout during nfs loading of the fitImage. Signed-off-by: Joonas Aijala Signed-off-by: Ian Ray --- include/configs/ge_bx50v3.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index bb3c65efc7..d7150e2615 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -142,7 +142,6 @@ #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND #endif -#define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ From b026c826ad2ba3f5fd9bb1e9643710d82138ed4d Mon Sep 17 00:00:00 2001 From: Joonas Aijala Date: Thu, 31 Jan 2019 16:21:20 +0200 Subject: [PATCH 032/140] board: ge: bx50v3: Network booting of fitImage with nfs rootfs New boot command introduced to automate network booting. Signed-off-by: Joonas Aijala Signed-off-by: Ian Ray --- include/configs/ge_bx50v3.h | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index d7150e2615..34d9eaaa69 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -73,7 +73,32 @@ #define CONFIG_LOADADDR 0x12000000 +#ifdef CONFIG_NFS_CMD +#define NETWORKBOOT \ + "setnetworkboot=" \ + "setenv ipaddr 172.16.2.10; setenv serverip 172.16.2.20; " \ + "setenv gatewayip 172.16.2.20; setenv nfsserver 172.16.2.20; " \ + "setenv netmask 255.255.255.0; setenv ethaddr ca:fe:de:ca:f0:11; " \ + "setenv bootargs root=/dev/nfs nfsroot=${nfsserver}:/srv/nfs/,v3,tcp rw rootwait" \ + "setenv bootargs $bootargs ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off " \ + "setenv bootargs $bootargs cma=128M bootcause=POR console=${console} ${videoargs} " \ + "setenv bootargs $bootargs systemd.mask=helix-network-defaults.service " \ + "setenv bootargs $bootargs watchdog.handle_boot_enabled=1\0" \ + "networkboot=" \ + "run setnetworkboot; " \ + "nfs ${loadaddr} /srv/nfs/fitImage; " \ + "bootm ${loadaddr}#conf@${confidx}\0" \ + +#define CONFIG_NETWORKBOOTCOMMAND \ + "run networkboot; " \ + +#else +#define NETWORKBOOT \ + +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ + NETWORKBOOT \ "bootcause=POR\0" \ "image=/boot/fitImage\0" \ "fdt_high=0xffffffff\0" \ @@ -136,7 +161,9 @@ #define CONFIG_USBBOOTCOMMAND \ "echo Unsupported; " \ -#ifdef CONFIG_CMD_USB +#ifdef CONFIG_NFS_CMD +#define CONFIG_BOOTCOMMAND CONFIG_NETWORKBOOTCOMMAND +#elif CONFIG_CMD_USB #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND #else #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND From e75a7d099e9e9dac2b3296b422a5ea1a68af8c4e Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:21 +0200 Subject: [PATCH 033/140] mx53ppd: bring dock out of reset at boot Configure GPIO BUFFERED_HOST_CONTROLLED_RESET_TO_DOCKING_CONNECTOR_N to bring the dock out of reset at boot. Signed-off-by: Ian Ray --- board/ge/mx53ppd/ppd_gpio.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/ge/mx53ppd/ppd_gpio.h b/board/ge/mx53ppd/ppd_gpio.h index e3b84c7a71..ba2d1baf37 100644 --- a/board/ge/mx53ppd/ppd_gpio.h +++ b/board/ge/mx53ppd/ppd_gpio.h @@ -36,6 +36,8 @@ static const iomux_v3_cfg_t ppd_pads[] = { MX53_PAD_KEY_COL2__GPIO4_10, MX53_PAD_KEY_ROW2__GPIO4_11, MX53_PAD_KEY_COL3__GPIO4_12, + + MX53_PAD_PATA_DATA7__GPIO2_7, /* BUFFERED_HOST_CONTROLLED_RESET_TO_DOCKING_CONNECTOR_N */ }; struct gpio_cfg { @@ -61,6 +63,7 @@ struct gpio_cfg { #define ECSPI1_CS1 IMX_GPIO_NR(4, 10) #define ECSPI1_CS2 IMX_GPIO_NR(4, 11) #define ECSPI1_CS3 IMX_GPIO_NR(4, 12) +#define BUFFERED_HOST_CONTROLLED_RESET_TO_DOCKING_CONNECTOR_N IMX_GPIO_NR(2, 7) static const struct gpio_cfg ppd_gpios[] = { /* FEC */ @@ -90,6 +93,7 @@ static const struct gpio_cfg ppd_gpios[] = { { ECSPI1_CS1, 1 }, { ECSPI1_CS2, 1 }, { ECSPI1_CS3, 1 }, + { BUFFERED_HOST_CONTROLLED_RESET_TO_DOCKING_CONNECTOR_N, 1 }, }; #endif /* __PPD_GPIO_H_ */ From d46a18a8cca04e9e047c3e6d4635c2ca74415ea4 Mon Sep 17 00:00:00 2001 From: Ian Ray Date: Thu, 31 Jan 2019 16:21:22 +0200 Subject: [PATCH 034/140] mx53ppd: fix unsupported set command Fix the NFS commands which used `set' to instead use `setenv'. Signed-off-by: Ian Ray --- include/configs/mx53ppd.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index db6cd650f1..5b97fe9843 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -85,10 +85,10 @@ "nfsroot=/opt/springdale/rd\0" \ "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \ - "choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \ - "set getcmd dhcp; else set kern_ipconf " \ + "choose_ip=if test $use_dhcp = 1; then setenv kern_ipconf ip=dhcp; " \ + "setenv getcmd dhcp; else setenv kern_ipconf " \ "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \ - "set getcmd tftp; fi\0" \ + "setenv getcmd tftp; fi\0" \ "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \ "${nfsserver}:${image}; bootm ${loadaddr}\0" \ From 67ef14c72ee87a7e26097bb5f0cef34f30529f6b Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:04 +0100 Subject: [PATCH 035/140] apalis_imx6: get rid of obsolete nospl configurations Now with SPL long since being in place even for recovery using SDP finally get rid of those nospl configurations. Signed-off-by: Marcel Ziswiler --- .../toradex/apalis_imx6/1066mhz_4x128mx16.cfg | 47 --------- .../toradex/apalis_imx6/1066mhz_4x256mx16.cfg | 47 --------- board/toradex/apalis_imx6/MAINTAINERS | 2 - board/toradex/apalis_imx6/apalis_imx6q.cfg | 33 ------- board/toradex/apalis_imx6/clocks.cfg | 41 -------- board/toradex/apalis_imx6/ddr-setup.cfg | 96 ------------------- configs/apalis_imx6_nospl_com_defconfig | 65 ------------- configs/apalis_imx6_nospl_it_defconfig | 65 ------------- 8 files changed, 396 deletions(-) delete mode 100644 board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg delete mode 100644 board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg delete mode 100644 board/toradex/apalis_imx6/apalis_imx6q.cfg delete mode 100644 board/toradex/apalis_imx6/clocks.cfg delete mode 100644 board/toradex/apalis_imx6/ddr-setup.cfg delete mode 100644 configs/apalis_imx6_nospl_com_defconfig delete mode 100644 configs/apalis_imx6_nospl_it_defconfig diff --git a/board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg b/board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg deleted file mode 100644 index 29d1c3126c..0000000000 --- a/board/toradex/apalis_imx6/1066mhz_4x128mx16.cfg +++ /dev/null @@ -1,47 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016 Toradex AG - */ - -DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 -DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7954 -DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB328F64 -DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB -DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 -DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023 -DATA 4, MX6_MMDC_P0_MDOTC, 0x09555050 -DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 -DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 -DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 -DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 -DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 -DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 -DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 -DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 -DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 -DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000000 -DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000 - -DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x432A0338 -DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03260324 -DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43340344 -DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x031E027C - -DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x33272D2E -DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x2F312B37 - -DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3A35433C -DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4336453F - -DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0009000E -DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0018000B -DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00060015 -DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0006000E - -DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 -DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 -DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg b/board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg deleted file mode 100644 index 02e90dd5e6..0000000000 --- a/board/toradex/apalis_imx6/1066mhz_4x256mx16.cfg +++ /dev/null @@ -1,47 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016 Toradex AG - */ - -DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 -DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E78f5 -DATA 4, MX6_MMDC_P0_MDCFG1, 0xff328f64 -DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB -DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 -DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 -DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 -DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 -DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 -DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 -DATA 4, MX6_MMDC_P0_MDSCR, 0x02888032 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 -DATA 4, MX6_MMDC_P0_MDSCR, 0x19408030 -DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 -DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 -DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 -DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 -DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 -DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 - -DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x03300338 -DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03240324 -DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x03440350 -DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x032C0308 - -DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x40363C3E -DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x3C3E3C46 - -DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x403E463E -DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4A384C46 - -DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0009000E -DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0018000B -DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00060015 -DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0006000E - -DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 -DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 -DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/toradex/apalis_imx6/MAINTAINERS b/board/toradex/apalis_imx6/MAINTAINERS index 2c70ab4fbd..a5d2c84956 100644 --- a/board/toradex/apalis_imx6/MAINTAINERS +++ b/board/toradex/apalis_imx6/MAINTAINERS @@ -5,5 +5,3 @@ S: Maintained F: board/toradex/apalis_imx6/ F: include/configs/apalis_imx6.h F: configs/apalis_imx6_defconfig -F: configs/apalis_imx6_nospl_com_defconfig -F: configs/apalis_imx6_nospl_it_defconfig diff --git a/board/toradex/apalis_imx6/apalis_imx6q.cfg b/board/toradex/apalis_imx6/apalis_imx6q.cfg deleted file mode 100644 index 739b1b7061..0000000000 --- a/board/toradex/apalis_imx6/apalis_imx6q.cfg +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016, Toradex AG - * - * Refer doc/README.imximage for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -/* image version */ -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM sd - -#define __ASSEMBLY__ -#include -#include "asm/arch/mx6-ddr.h" -#include "asm/arch/iomux.h" -#include "asm/arch/crm_regs.h" - -#include "ddr-setup.cfg" -#if CONFIG_DDR_MB == 2048 -#include "1066mhz_4x256mx16.cfg" -#else -#include "1066mhz_4x128mx16.cfg" -#endif -#include "clocks.cfg" diff --git a/board/toradex/apalis_imx6/clocks.cfg b/board/toradex/apalis_imx6/clocks.cfg deleted file mode 100644 index 1bcbc4fa38..0000000000 --- a/board/toradex/apalis_imx6/clocks.cfg +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016, Toradex AG - * - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ - -/* set the default clock gate to save power */ -DATA 4, CCM_CCGR0, 0x00C03F3F -DATA 4, CCM_CCGR1, 0x0030FC03 -DATA 4, CCM_CCGR2, 0x0FFFC000 -DATA 4, CCM_CCGR3, 0x3FF00000 -DATA 4, CCM_CCGR4, 0x00FFF300 -DATA 4, CCM_CCGR5, 0x0F0000C3 -DATA 4, CCM_CCGR6, 0x000003FF - -/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF -/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4, MX6_IOMUXC_GPR6, 0x007F007F -DATA 4, MX6_IOMUXC_GPR7, 0x007F007F - -/* - * Setup CCM_CCOSR register as follows: - * - * cko1_en = 1 --> CKO1 enabled - * cko1_div = 111 --> divide by 8 - * cko1_sel = 1011 --> ahb_clk_root - * - * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz - */ -DATA 4, CCM_CCOSR, 0x000000fb diff --git a/board/toradex/apalis_imx6/ddr-setup.cfg b/board/toradex/apalis_imx6/ddr-setup.cfg deleted file mode 100644 index e42e3ce438..0000000000 --- a/board/toradex/apalis_imx6/ddr-setup.cfg +++ /dev/null @@ -1,96 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016, Toradex AG - * - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ - -/* - * DDR3 settings - * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), - * memory bus width: 64 bits x16/x32/x64 - * MX6DL ddr is limited to 800 MHz(400 MHz clock) - * memory bus width: 64 bits x16/x32/x64 - * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) - * memory bus width: 32 bits x16/x32 - */ -DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 - -DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 -DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 -/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ -DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 - -DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 - -DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 -DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 -DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 -DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 - -DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 -DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 -DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 - -DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 -DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 - -/* (differential input) */ -DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 -/* (differential input) */ -DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 -/* disable ddr pullups */ -DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 -DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 -/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ -DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 - -/* Read data DQ Byte0-3 delay */ -DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 -DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 -DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 -DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 -DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 -DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 -DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 -DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 - -/* - * MDMISC mirroring interleaved (row/bank/col) - */ -DATA 4, MX6_MMDC_P0_MDMISC, 0x00081740 - -/* - * MDSCR con_req - */ -DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig deleted file mode 100644 index b6ab5285c2..0000000000 --- a/configs/apalis_imx6_nospl_com_defconfig +++ /dev/null @@ -1,65 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_THUMB_BUILD=y -CONFIG_ARCH_MX6=y -CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_APALIS_IMX6=y -CONFIG_CMD_HDMIDETECT=y -CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis_imx6/apalis_imx6q.cfg,MX6Q,DDR_MB=1024" -CONFIG_BOOTDELAY=1 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_MISC_INIT_R=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_BOUNCE_BUFFER=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="Apalis iMX6 # " -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -CONFIG_CMD_ASKENV=y -CONFIG_CRC32_VERIFY=y -CONFIG_CMD_MEMTEST=y -CONFIG_SYS_ALT_MEMTEST=y -CONFIG_CMD_DFU=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_BMP=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DWC_AHSATA=y -CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y -CONFIG_PHYLIB=y -CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_MII=y -CONFIG_USB=y -CONFIG_USB_STORAGE=y -CONFIG_USB_KEYBOARD=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Toradex" -CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 -CONFIG_USB_GADGET_PRODUCT_NUM=0x4020 -CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USB_HOST_ETHER=y -CONFIG_VIDEO=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig deleted file mode 100644 index c972b11eb5..0000000000 --- a/configs/apalis_imx6_nospl_it_defconfig +++ /dev/null @@ -1,65 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_THUMB_BUILD=y -CONFIG_ARCH_MX6=y -CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_APALIS_IMX6=y -CONFIG_CMD_HDMIDETECT=y -CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis_imx6/apalis_imx6q.cfg,MX6Q,DDR_MB=2048" -CONFIG_BOOTDELAY=1 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_MISC_INIT_R=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_BOUNCE_BUFFER=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="Apalis iMX6 # " -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -CONFIG_CMD_ASKENV=y -CONFIG_CRC32_VERIFY=y -CONFIG_CMD_MEMTEST=y -CONFIG_SYS_ALT_MEMTEST=y -CONFIG_CMD_DFU=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_BMP=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DWC_AHSATA=y -CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y -CONFIG_PHYLIB=y -CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_MII=y -CONFIG_USB=y -CONFIG_USB_STORAGE=y -CONFIG_USB_KEYBOARD=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Toradex" -CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 -CONFIG_USB_GADGET_PRODUCT_NUM=0x4020 -CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USB_HOST_ETHER=y -CONFIG_VIDEO=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y -# CONFIG_EFI_LOADER is not set From a02844b7e7518e8aa9efe257fa08087866909fdc Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:05 +0100 Subject: [PATCH 036/140] apalis_imx6: use distro defaults Use distro defaults and minimise default configuration again using savedefconfig. Signed-off-by: Marcel Ziswiler --- configs/apalis_imx6_defconfig | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 86dabd3736..f7fb7a5f8a 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -9,12 +9,11 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y -CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set -CONFIG_SUPPORT_RAW_INITRD=y CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -26,9 +25,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Apalis iMX6 # " -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set @@ -43,14 +40,8 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y @@ -61,7 +52,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_USB=y -CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Toradex" From 3858aac41d7dedafcf67a00bd7b0546379916f82 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:06 +0100 Subject: [PATCH 037/140] apalis_imx6: move console in env from header file to defconfig Move console in env from header file to defconfig. While at it also update copyright year and remove spurious comments and new lines. Signed-off-by: Marcel Ziswiler --- configs/apalis_imx6_defconfig | 1 + include/configs/apalis_imx6.h | 4 +--- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index f7fb7a5f8a..098d791a62 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -14,6 +14,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index ba4e96da50..a1ba16fc79 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2013-2015 Toradex, Inc. + * Copyright 2013-2019 Toradex, Inc. * * Configuration settings for the Toradex Apalis iMX6 */ @@ -86,7 +86,6 @@ /* Framebuffer and LCD */ #define CONFIG_VIDEO_IPUV3 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN @@ -255,7 +254,6 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* environment organization */ - #define CONFIG_ENV_SIZE (8 * 1024) #if defined(CONFIG_ENV_IS_IN_MMC) From f47d1968f794ac11ac9ec63ca15d72d86e99b5cc Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:07 +0100 Subject: [PATCH 038/140] apalis_imx6: enable fit image, gpt, imx thermal, efi loader support Enbale FIT image, GPT command, i.MX thermal and EFI loader support. Signed-off-by: Marcel Ziswiler --- configs/apalis_imx6_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 098d791a62..b262bb88b9 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set @@ -36,6 +37,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y @@ -52,6 +54,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y +CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y @@ -65,4 +68,3 @@ CONFIG_VIDEO=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y -# CONFIG_EFI_LOADER is not set From 7f789592f08b8cdf8fb220f18fd20edd18ee8ee3 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:08 +0100 Subject: [PATCH 039/140] apalis_imx6: remove obsolete USB_GADGET_MASS_STORAGE configuration Remove obsolete USB_GADGET_MASS_STORAGE configuration. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- include/configs/apalis_imx6.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index a1ba16fc79..7222285ab3 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -82,8 +82,6 @@ /* Client */ #define CONFIG_USBD_HS -#define CONFIG_USB_GADGET_MASS_STORAGE - /* Framebuffer and LCD */ #define CONFIG_VIDEO_IPUV3 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE From 4df0292359311c1e1e12f83cd7d70e7235edefe8 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:09 +0100 Subject: [PATCH 040/140] apalis_imx6: migrate to using device tree Migrate to using device tree required for further driver model integration. Signed-off-by: Marcel Ziswiler --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6-apalis.dts | 730 ++++++++++++++++++++++++++ board/toradex/apalis_imx6/MAINTAINERS | 2 + configs/apalis_imx6_defconfig | 3 +- 4 files changed, 735 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6-apalis.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index acab1d3450..1b57e8ff00 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -499,6 +499,7 @@ dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \ imx53-kp.dtb dtb-$(CONFIG_MX6Q) += \ + imx6-apalis.dtb \ imx6q-display5.dtb \ imx6q-logicpd.dtb diff --git a/arch/arm/dts/imx6-apalis.dts b/arch/arm/dts/imx6-apalis.dts new file mode 100644 index 0000000000..b2fdfa1af4 --- /dev/null +++ b/arch/arm/dts/imx6-apalis.dts @@ -0,0 +1,730 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Toradex AG + */ + +/dts-v1/; +#include +#include "imx6q.dtsi" + +/ { + model = "Toradex Apalis iMX6Q/D"; + compatible = "toradex,apalis_imx6q", "fsl,imx6q"; + + /* Will be filled by the bootloader */ + memory@10000000 { + device_type = "memory"; + reg = <0x10000000 0>; + }; + + aliases { + mmc0 = &usdhc3; + mmc1 = &usdhc1; + mmc2 = &usdhc2; + usb0 = &usbotg; /* required for ums */ + }; + + chosen { + stdout-path = &uart1; + }; + + reg_module_3v3: regulator-module-3v3 { + compatible = "regulator-fixed"; + regulator-name = "+V3.3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_regulator_usbotg_pwr>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* USBO1_EN */ + enable-active-high; + }; + + /* on-module USB hub */ + reg_usb_host_vbus_hub: regulator-usb-host-vbus-hub { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_regulator_usbhub_pwr>; + regulator-name = "usb_host_vbus_hub"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>; + startup-delay-us = <2000>; + enable-active-high; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_regulator_usbh_pwr>; + regulator-name = "usb_host_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; /* USBH_EN */ + enable-active-high; + vin-supply = <®_usb_host_vbus_hub>; + }; +}; + +/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +/* + * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and + * touch screen controller + */ +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pmic: pfuze100@8 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + regulator-boot-on; + regulator-always-on; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-boot-on; + regulator-always-on; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-boot-on; + regulator-always-on; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; + +/* + * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier + * board) + */ +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_recovery>; + scl-gpios = <&gpio3 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; +}; + +/* Apalis Serial ATA */ +&sata { + status = "okay"; +}; + +/* Apalis UART1 */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>; + fsl,dte-mode; + uart-has-rtscts; + status = "okay"; +}; + +/* Apalis UART2 */ +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_dte>; + fsl,dte-mode; + uart-has-rtscts; + status = "okay"; +}; + +/* Apalis UART3 */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4_dte>; + fsl,dte-mode; + status = "okay"; +}; + +/* Apalis UART4 */ +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5_dte>; + fsl,dte-mode; + status = "okay"; +}; + +/* Apalis USBH[2|3|4] */ +&usbh1 { + dr_mode = "host"; + vbus-supply = <®_usb_host_vbus>; + status = "okay"; +}; + +/* Apalis USBO1 */ +&usbotg { + dr_mode = "host"; + vbus-supply = <®_usb_otg_vbus>; + status = "okay"; +}; + +/* Apalis MMC1 */ +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit &pinctrl_mmc_cd>; + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; /* MMC1_CD */ + disable-wp; + no-1-8-v; + status = "okay"; +}; + +/* Apalis SD1 */ +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>; + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* SD1_CD */ + disable-wp; + no-1-8-v; + status = "okay"; +}; + +/* eMMC */ +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + vqmmc-supply = <®_module_3v3>; + bus-width = <8>; + no-1-8-v; + non-removable; + status = "okay"; +}; + +&iomuxc { + pinctrl_apalis_gpio1: gpio2io04grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 + >; + }; + + pinctrl_apalis_gpio2: gpio2io05grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x130b0 + >; + }; + + pinctrl_apalis_gpio3: gpio2io06grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x130b0 + >; + }; + + pinctrl_apalis_gpio4: gpio2io07grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x130b0 + >; + }; + + pinctrl_apalis_gpio5: gpio6io10grp { + fsl,pins = < + MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x130b0 + >; + }; + + pinctrl_apalis_gpio6: gpio6io09grp { + fsl,pins = < + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x130b0 + >; + }; + + pinctrl_apalis_gpio7: gpio1io02grp { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b0 + >; + }; + + pinctrl_apalis_gpio8: gpio1io06grp { + fsl,pins = < + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x130b0 + >; + }; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 + /* SGTL5000 sys_mclk */ + MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0 + >; + }; + + pinctrl_cam_mclk: cammclkgrp { + fsl,pins = < + /* CAM sys_mclk */ + MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x00b0 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x100b1 + /* SPI1 cs */ + MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x000b1 + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 + MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 + MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 + /* SPI2 cs */ + MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + /* Ethernet PHY reset */ + MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0 + /* Ethernet PHY interrupt */ + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x000b1 + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 + >; + }; + + pinctrl_gpio_bl_on: gpioblon { + fsl,pins = < + MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0 + >; + }; + + pinctrl_gpio_keys: gpio1io04grp { + fsl,pins = < + /* Power button */ + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 + >; + }; + + pinctrl_hdmi_cec: hdmicecgrp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 + >; + }; + + pinctrl_hdmi_ddc: hdmiddcgrp { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3_recovery: i2c3recoverygrp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1 + MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1 + >; + }; + + pinctrl_ipu1_lcdif: ipu1lcdifgrp { + fsl,pins = < + MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x61 + /* DE */ + MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 0x61 + /* HSync */ + MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 0x61 + /* VSync */ + MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 0x61 + MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x61 + MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x61 + MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x61 + MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x61 + MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x61 + MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x61 + MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x61 + MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x61 + MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x61 + MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x61 + MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x61 + MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x61 + MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 0x61 + MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 0x61 + MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 0x61 + MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 0x61 + MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 0x61 + MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 0x61 + MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 0x61 + MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 0x61 + MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x61 + MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x61 + MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 0x61 + MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 0x61 + >; + }; + + pinctrl_ipu2_vdac: ipu2vdacgrp { + fsl,pins = < + MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0xd1 + MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0xd1 + MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0xd1 + MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0xd1 + MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0xf9 + MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0xf9 + MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0xf9 + MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0xf9 + MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0xf9 + MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0xf9 + MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0xf9 + MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0xf9 + MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0xf9 + MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0xf9 + MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0xf9 + MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0xf9 + MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0xf9 + MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0xf9 + MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0xf9 + MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0xf9 + >; + }; + + pinctrl_mmc_cd: gpiommccdgrp { + fsl,pins = < + /* MMC1 CD */ + MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x000b0 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp { + fsl,pins = < + /* USBH_EN */ + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x0f058 + >; + }; + + pinctrl_regulator_usbhub_pwr: gpioregusbhubpwrgrp { + fsl,pins = < + /* USBH_HUB_EN */ + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0f058 + >; + }; + + pinctrl_regulator_usbotg_pwr: gpioregusbotgpwrgrp { + fsl,pins = < + /* USBO1 power en */ + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0f058 + >; + }; + + pinctrl_reset_moci: gpioresetmocigrp { + fsl,pins = < + /* RESET_MOCI control */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x0f058 + >; + }; + + pinctrl_sd_cd: gpiosdcdgrp { + fsl,pins = < + /* SD1 CD */ + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x000b0 + >; + }; + + pinctrl_spdif: spdifgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 + MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 + >; + }; + + pinctrl_touch_int: gpiotouchintgrp { + fsl,pins = < + /* STMPE811 interrupt */ + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 + >; + }; + + pinctrl_uart1_dce: uart1dcegrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + /* DTE mode */ + pinctrl_uart1_dte: uart1dtegrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1 + >; + }; + + /* Additional DTR, DSR, DCD */ + pinctrl_uart1_ctrl: uart1ctrlgrp { + fsl,pins = < + MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0 + MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0 + MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0 + >; + }; + + pinctrl_uart2_dce: uart2dcegrp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 + >; + }; + + /* DTE mode */ + pinctrl_uart2_dte: uart2dtegrp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart4_dce: uart4dcegrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + /* DTE mode */ + pinctrl_uart4_dte: uart4dtegrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart5_dce: uart5dcegrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + >; + }; + + /* DTE mode */ + pinctrl_uart5_dte: uart5dtegrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + >; + }; + + pinctrl_usdhc1_4bit: usdhc1grp_4bit { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 + >; + }; + + pinctrl_usdhc1_8bit: usdhc1grp_8bit { + fsl,pins = < + MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071 + MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071 + MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071 + MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17071 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + /* eMMC reset */ + MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 + >; + }; +}; diff --git a/board/toradex/apalis_imx6/MAINTAINERS b/board/toradex/apalis_imx6/MAINTAINERS index a5d2c84956..7efe816a78 100644 --- a/board/toradex/apalis_imx6/MAINTAINERS +++ b/board/toradex/apalis_imx6/MAINTAINERS @@ -1,7 +1,9 @@ Apalis iMX6 M: Max Krummenacher W: http://developer.toradex.com/software/linux/linux-software +W: https://www.toradex.com/community S: Maintained F: board/toradex/apalis_imx6/ F: include/configs/apalis_imx6.h F: configs/apalis_imx6_defconfig +F: arch/arm/dts/imx6-apalis.dts diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index b262bb88b9..985d8554b8 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -45,6 +45,8 @@ CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis" CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y @@ -66,5 +68,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_VIDEO=y CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y From 5177087f64871b1de7342475b8fa51ed19d1da65 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:10 +0100 Subject: [PATCH 041/140] apalis_imx6: clean-up and migrate gpios to using driver model Migrate GPIOs to using driver model, properly request backlight, Ethernet PHY reset, MMC/SD card detect and USB power GPIOs and also enable SION bit in pin muxing for Apalis, backlight, eMMC reset, Ethernet PHY reset and USB power enable GPIOs. While at it also update copyright year, clean-up/re-order includes, add some comments clarifying ifdef scope and do some White-space clean-up. Signed-off-by: Marcel Ziswiler --- board/toradex/apalis_imx6/apalis_imx6.c | 90 ++++++++++++++----------- configs/apalis_imx6_defconfig | 1 + 2 files changed, 53 insertions(+), 38 deletions(-) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index d11207c7f4..f685c3ec02 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -2,38 +2,32 @@ /* * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. * Copyright (C) 2013, Boundary Devices - * Copyright (C) 2014-2016, Toradex AG + * Copyright (C) 2014-2019, Toradex AG * copied from nitrogen6x */ #include #include -#include + #include #include -#include #include -#include -#include -#include #include +#include +#include +#include #include #include -#include +#include #include #include #include -#include #include #include -#include +#include #include #include -#include #include -#include -#include -#include #include #include #include @@ -200,7 +194,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION, }; int mx6_rgmii_rework(struct phy_device *phydev) @@ -241,7 +235,8 @@ iomux_v3_cfg_t const enet_pads[] = { MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), /* KSZ9031 PHY Reset */ - MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL) | + MUX_MODE_SION, # define GPIO_ENET_PHY_RESET IMX_GPIO_NR(1, 25) }; @@ -253,6 +248,7 @@ static void setup_iomux_enet(void) static int reset_enet_phy(struct mii_dev *bus) { /* Reset KSZ9031 PHY */ + gpio_request(GPIO_ENET_PHY_RESET, "ETH_RESET#"); gpio_direction_output(GPIO_ENET_PHY_RESET, 0); mdelay(10); gpio_set_value(GPIO_ENET_PHY_RESET, 1); @@ -263,15 +259,24 @@ static int reset_enet_phy(struct mii_dev *bus) /* mux the Apalis GPIO pins, so they can be used from the U-Boot cmdline */ iomux_v3_cfg_t const gpio_pads[] = { /* Apalis GPIO1 - GPIO8 */ - MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(WEAK_PULLDOWN), - MX6_PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(WEAK_PULLDOWN) | + MUX_MODE_SION, + MX6_PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, }; static void setup_iomux_gpio(void) @@ -281,7 +286,7 @@ static void setup_iomux_gpio(void) iomux_v3_cfg_t const usb_pads[] = { /* USBH_EN */ - MX6_PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL) | MUX_MODE_SION, # define GPIO_USBH_EN IMX_GPIO_NR(1, 0) /* USB_VBUS_DET */ MX6_PAD_EIM_D28__GPIO3_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -289,7 +294,7 @@ iomux_v3_cfg_t const usb_pads[] = { /* USBO1_ID */ MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP), /* USBO1_EN */ - MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL) | MUX_MODE_SION, # define GPIO_USBO_EN IMX_GPIO_NR(3, 22) }; @@ -321,7 +326,6 @@ static void setup_iomux_dte_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads_dte, ARRAY_SIZE(uart1_pads_dte)); } - static void setup_iomux_dce_uart(void) { setup_dcemode_uart(); @@ -360,7 +364,7 @@ int board_ehci_power(int port, int on) #endif #ifdef CONFIG_FSL_ESDHC -/* use the following sequence: eMMC, MMC, SD */ +/* use the following sequence: eMMC, MMC1, SD1 */ struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { {USDHC3_BASE_ADDR}, {USDHC1_BASE_ADDR}, @@ -374,10 +378,12 @@ int board_mmc_getcd(struct mmc *mmc) switch (cfg->esdhc_base) { case USDHC1_BASE_ADDR: + gpio_request(GPIO_MMC_CD, "MMC_CD"); gpio_direction_input(GPIO_MMC_CD); ret = !gpio_get_value(GPIO_MMC_CD); break; case USDHC2_BASE_ADDR: + gpio_request(GPIO_MMC_CD, "SD_CD"); gpio_direction_input(GPIO_SD_CD); ret = !gpio_get_value(GPIO_SD_CD); break; @@ -424,7 +430,7 @@ int board_mmc_init(bd_t *bis) } return status; -#else +#else /* CONFIG_SPL_BUILD */ struct src *psrc = (struct src *)SRC_BASE_ADDR; unsigned reg = readl(&psrc->sbmr1) >> 11; /* @@ -463,9 +469,9 @@ int board_mmc_init(bd_t *bis) } return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -#endif +#endif /* CONFIG_SPL_BUILD */ } -#endif +#endif /* CONFIG_FSL_ESDHC */ int board_phy_config(struct phy_device *phydev) { @@ -489,6 +495,7 @@ int board_eth_init(bd_t *bis) bus = fec_get_miibus(base, -1); if (!bus) return 0; + bus->reset = reset_enet_phy; /* scan PHY 4,5,6,7 */ phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); @@ -497,6 +504,7 @@ int board_eth_init(bd_t *bis) puts("no PHY found\n"); return 0; } + printf("using PHY at %d\n", phydev->addr); ret = fec_probe(bis, -1, base, bus, phydev); if (ret) { @@ -504,7 +512,8 @@ int board_eth_init(bd_t *bis) free(phydev); free(bus); } -#endif +#endif /* CONFIG_FEC_MXC */ + return 0; } @@ -520,18 +529,21 @@ static iomux_v3_cfg_t const pwr_intb_pads[] = { static iomux_v3_cfg_t const backlight_pads[] = { /* Backlight on RGB connector: J15 */ - MX6_PAD_EIM_DA13__GPIO3_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_DA13__GPIO3_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL) | + MUX_MODE_SION, #define RGB_BACKLIGHT_GP IMX_GPIO_NR(3, 13) /* additional CPU pin on BKL_PWM, keep in tristate */ MX6_PAD_EIM_DA14__GPIO3_IO14 | MUX_PAD_CTRL(TRISTATE), /* Backlight PWM, used as GPIO in U-Boot */ - MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL) | + MUX_MODE_SION, #define RGB_BACKLIGHTPWM_GP IMX_GPIO_NR(2, 10) /* buffer output enable 0: buffer enabled */ - MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION, #define RGB_BACKLIGHTPWM_OE IMX_GPIO_NR(5, 2) /* PSAVE# integrated VDAC */ - MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL) | + MUX_MODE_SION, #define VGA_PSAVE_NOT_GP IMX_GPIO_NR(6, 31) }; @@ -741,6 +753,9 @@ static void setup_display(void) imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); /* use 0 for EDT 7", use 1 for LG fullHD panel */ + gpio_request(RGB_BACKLIGHTPWM_GP, "BKL1_PWM"); + gpio_request(RGB_BACKLIGHTPWM_OE, "BKL1_PWM_EN"); + gpio_request(RGB_BACKLIGHT_GP, "BKL1_ON"); gpio_direction_output(RGB_BACKLIGHTPWM_GP, 0); gpio_direction_output(RGB_BACKLIGHTPWM_OE, 0); gpio_direction_output(RGB_BACKLIGHT_GP, 1); @@ -1143,7 +1158,6 @@ MX6_MMDC_P0_MDSCR, 0x00000000, MX6_MMDC_P0_MAPSR, 0x00011006, }; - static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; @@ -1232,7 +1246,7 @@ void reset_cpu(ulong addr) { } -#endif +#endif /* CONFIG_SPL_BUILD */ static struct mxc_serial_platdata mxc_serial_plat = { .reg = (struct mxc_uart *)UART1_BASE, diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 985d8554b8..0f6119bef5 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -51,6 +51,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y CONFIG_DFU_MMC=y +CONFIG_DM_GPIO=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y From 29a0a3debf645c58b1fb8815ed7b999573493228 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:11 +0100 Subject: [PATCH 042/140] apalis_imx6: enable pin control driver Enable pin control driver as required for further driver model migration. Signed-off-by: Marcel Ziswiler --- configs/apalis_imx6_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 0f6119bef5..0763b1d986 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -57,6 +57,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y From ab92352d22d99aa5296efd6d8c7cfb80da638ac6 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:12 +0100 Subject: [PATCH 043/140] apalis_imx6: migrate i2c to using driver model Migrate I2C to using driver model. Signed-off-by: Marcel Ziswiler --- board/toradex/apalis_imx6/apalis_imx6.c | 88 +------------------------ board/toradex/apalis_imx6/pf0100.c | 59 ++++++++--------- board/toradex/apalis_imx6/pf0100.h | 2 +- configs/apalis_imx6_defconfig | 1 + include/configs/apalis_imx6.h | 8 +-- 5 files changed, 36 insertions(+), 122 deletions(-) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index f685c3ec02..ec844b966a 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -20,13 +20,11 @@ #include #include #include -#include #include #include #include #include #include -#include #include #include #include @@ -50,32 +48,16 @@ DECLARE_GLOBAL_DATA_PTR; #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) -#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - -#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) - #define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_SRE_SLOW) -#define NO_PULLUP ( \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_SRE_SLOW) - #define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_HYS | PAD_CTL_SRE_SLOW) #define TRISTATE (PAD_CTL_HYS | PAD_CTL_SPEED_MED) -#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) - #define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST) int dram_init(void) @@ -97,63 +79,6 @@ iomux_v3_cfg_t const uart1_pads_dte[] = { MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -/* Apalis I2C1 */ -struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC, - .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC, - .gp = IMX_GPIO_NR(5, 27) - }, - .sda = { - .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC, - .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC, - .gp = IMX_GPIO_NR(5, 26) - } -}; - -/* Apalis local, PMIC, SGTL5000, STMPE811 */ -struct i2c_pads_info i2c_pad_info_loc = { - .scl = { - .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, - .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, - .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, - .gp = IMX_GPIO_NR(4, 13) - } -}; - -/* Apalis I2C3 / CAM */ -struct i2c_pads_info i2c_pad_info3 = { - .scl = { - .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC, - .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC, - .gp = IMX_GPIO_NR(3, 17) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC, - .gp = IMX_GPIO_NR(3, 18) - } -}; - -/* Apalis I2C2 / DDC */ -struct i2c_pads_info i2c_pad_info_ddc = { - .scl = { - .i2c_mode = MX6_PAD_EIM_EB2__HDMI_TX_DDC_SCL | PC, - .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC, - .gp = IMX_GPIO_NR(2, 30) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D16__HDMI_TX_DDC_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC, - .gp = IMX_GPIO_NR(3, 16) - } -}; - /* Apalis MMC1 */ iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -583,12 +508,6 @@ static void do_enable_hdmi(struct display_info_t const *dev) imx_enable_hdmi_phy(); } -static int detect_i2c(struct display_info_t const *dev) -{ - return (0 == i2c_set_bus_num(dev->bus)) && - (0 == i2c_probe(dev->addr)); -} - static void enable_lvds(struct display_info_t const *dev) { struct iomuxc *iomux = (struct iomuxc *) @@ -682,7 +601,6 @@ struct display_info_t const displays[] = {{ .bus = -1, .addr = 0, .pixfmt = IPU_PIX_FMT_LVDS666, - .detect = detect_i2c, .enable = enable_lvds, .mode = { .name = "wsvga-lvds", @@ -797,10 +715,6 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info_loc); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3); - #if defined(CONFIG_VIDEO_IPUV3) setup_display(); #endif @@ -1218,7 +1132,7 @@ void board_init_f(ulong dummy) ccgr_init(); gpr_init(); - /* iomux and setup of i2c */ + /* iomux */ board_early_init_f(); /* setup GP timer */ diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c index 7334e92f2e..3a944b3699 100644 --- a/board/toradex/apalis_imx6/pf0100.c +++ b/board/toradex/apalis_imx6/pf0100.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2014-2016, Toradex AG + * Copyright (C) 2014-2019, Toradex AG */ /* @@ -9,7 +9,6 @@ #include #include -#include #include #include #include @@ -30,22 +29,25 @@ static __maybe_unused iomux_v3_cfg_t const pmic_prog_pads[] = { unsigned pmic_init(void) { + int rc; + struct udevice *dev = NULL; unsigned programmed = 0; uchar bus = 1; uchar devid, revid, val; puts("PMIC: "); - if (!((0 == i2c_set_bus_num(bus)) && - (0 == i2c_probe(PFUZE100_I2C_ADDR)))) { - puts("i2c bus failed\n"); + rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev); + if (rc) { + printf("failed to get device for PMIC at address 0x%x\n", + PFUZE100_I2C_ADDR); return 0; } /* get device ident */ - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_DEVICEID, &devid, 1) < 0) { puts("i2c pmic devid read failed\n"); return 0; } - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_REVID, 1, &revid, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_REVID, &revid, 1) < 0) { puts("i2c pmic revid read failed\n"); return 0; } @@ -60,7 +62,7 @@ unsigned pmic_init(void) for (j = 0; j < 0x80; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { - i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); + dm_i2c_read(dev, j + i, &val, 1); printf("\t%2x", val); } j += 0x10; @@ -68,8 +70,7 @@ unsigned pmic_init(void) printf("\nEXT Page 1"); val = PFUZE100_PAGE_REGISTER_PAGE1; - if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, - &val, 1)) { + if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { puts("i2c write failed\n"); return 0; } @@ -77,7 +78,7 @@ unsigned pmic_init(void) for (j = 0x80; j < 0x100; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { - i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); + dm_i2c_read(dev, j + i, &val, 1); printf("\t%2x", val); } j += 0x10; @@ -85,8 +86,7 @@ unsigned pmic_init(void) printf("\nEXT Page 2"); val = PFUZE100_PAGE_REGISTER_PAGE2; - if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, - &val, 1)) { + if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { puts("i2c write failed\n"); return 0; } @@ -94,35 +94,35 @@ unsigned pmic_init(void) for (j = 0x80; j < 0x100; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { - i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); + dm_i2c_read(dev, j + i, &val, 1); printf("\t%2x", val); } j += 0x10; } printf("\n"); } -#endif +#endif /* DEBUG */ /* get device programmed state */ val = PFUZE100_PAGE_REGISTER_PAGE1; - if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) { + if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { puts("i2c write failed\n"); return 0; } - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR1, 1, &val, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return 0; } if (val & PFUZE100_FUSE_POR_M) programmed++; - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR2, 1, &val, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return programmed; } if (val & PFUZE100_FUSE_POR_M) programmed++; - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR3, 1, &val, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return programmed; } @@ -145,18 +145,15 @@ unsigned pmic_init(void) if (programmed != 3) { /* set VGEN1 to 1.2V */ val = PFUZE100_VGEN1_VAL; - if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_VGEN1CTL, 1, - &val, 1)) { + if (dm_i2c_write(dev, PFUZE100_VGEN1CTL, &val, 1)) { puts("i2c write failed\n"); return programmed; } /* set SWBST to 5.0V */ val = PFUZE100_SWBST_VAL; - if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_SWBSTCTL, 1, - &val, 1)) { + if (dm_i2c_write(dev, PFUZE100_SWBSTCTL, &val, 1)) puts("i2c write failed\n"); - } } return programmed; } @@ -164,6 +161,8 @@ unsigned pmic_init(void) #ifndef CONFIG_SPL_BUILD static int pf0100_prog(void) { + int rc; + struct udevice *dev = NULL; unsigned char bus = 1; unsigned char val; unsigned int i; @@ -177,9 +176,10 @@ static int pf0100_prog(void) ARRAY_SIZE(pmic_prog_pads)); gpio_direction_output(PMIC_PROG_VOLTAGE, 0); - if (!((0 == i2c_set_bus_num(bus)) && - (0 == i2c_probe(PFUZE100_I2C_ADDR)))) { - puts("i2c bus failed\n"); + rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev); + if (rc) { + printf("failed to get device for PMIC at address 0x%x\n", + PFUZE100_I2C_ADDR); return CMD_RET_FAILURE; } @@ -187,8 +187,7 @@ static int pf0100_prog(void) switch (pmic_otp_prog[i].cmd) { case pmic_i2c: val = (unsigned char) (pmic_otp_prog[i].value & 0xff); - if (i2c_write(PFUZE100_I2C_ADDR, pmic_otp_prog[i].reg, - 1, &val, 1)) { + if (dm_i2c_write(dev, pmic_otp_prog[i].reg, &val, 1)) { printf("i2c write failed, reg 0x%2x, value 0x%2x\n", pmic_otp_prog[i].reg, val); return CMD_RET_FAILURE; @@ -227,4 +226,4 @@ U_BOOT_CMD( "Program the OTP fuses on the PMIC PF0100", "" ); -#endif +#endif /* CONFIG_SPL_BUILD */ diff --git a/board/toradex/apalis_imx6/pf0100.h b/board/toradex/apalis_imx6/pf0100.h index c0efb79bbc..b854fe8c54 100644 --- a/board/toradex/apalis_imx6/pf0100.h +++ b/board/toradex/apalis_imx6/pf0100.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2014-2016, Toradex AG + * Copyright (C) 2014-2019, Toradex AG */ /* diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 0763b1d986..60c4d9720d 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -52,6 +52,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y CONFIG_DFU_MMC=y CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 7222285ab3..5ab009c8f3 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -34,12 +34,12 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* I2C Configs */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_MXC_I2C3_SPEED 400000 /* OCOTP Configs */ #ifdef CONFIG_CMD_FUSE From e17f37194def852343783fa97aa43a3cfba3f7e2 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:13 +0100 Subject: [PATCH 044/140] apalis_imx6: migrate pmic and regulator to using driver model Migrate PMIC and regulator to using driver model. Signed-off-by: Marcel Ziswiler --- configs/apalis_imx6_defconfig | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 60c4d9720d..7e973ded74 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -45,6 +45,8 @@ CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis" CONFIG_ENV_IS_IN_MMC=y @@ -60,6 +62,11 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y From 72b49e2c1e52e25591a674304824396d75de992e Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:14 +0100 Subject: [PATCH 045/140] apalis_imx6: migrate mmc and sata to using driver model Migrate MMC and SATA to using driver model. While at it also enable SCSI driver model. Signed-off-by: Marcel Ziswiler --- board/toradex/apalis_imx6/apalis_imx6.c | 98 +++++++++++++++---------- configs/apalis_imx6_defconfig | 3 + include/configs/apalis_imx6.h | 3 - 3 files changed, 61 insertions(+), 43 deletions(-) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index ec844b966a..34e78ddb44 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -9,6 +9,7 @@ #include #include +#include #include #include #include @@ -22,7 +23,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -60,6 +63,8 @@ DECLARE_GLOBAL_DATA_PTR; #define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST) +#define APALIS_IMX6_SATA_INIT_RETRIES 10 + int dram_init(void) { /* use the DDR controllers configured size */ @@ -79,6 +84,7 @@ iomux_v3_cfg_t const uart1_pads_dte[] = { MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; +#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) /* Apalis MMC1 */ iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -121,6 +127,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION, }; +#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ int mx6_rgmii_rework(struct phy_device *phydev) { @@ -288,7 +295,7 @@ int board_ehci_power(int port, int on) } #endif -#ifdef CONFIG_FSL_ESDHC +#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) /* use the following sequence: eMMC, MMC1, SD1 */ struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { {USDHC3_BASE_ADDR}, @@ -319,43 +326,6 @@ int board_mmc_getcd(struct mmc *mmc) int board_mmc_init(bd_t *bis) { -#ifndef CONFIG_SPL_BUILD - s32 status = 0; - u32 index = 0; - - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - - usdhc_cfg[0].max_bus_width = 8; - usdhc_cfg[1].max_bus_width = 8; - usdhc_cfg[2].max_bus_width = 4; - - for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { - switch (index) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); - break; - case 2: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - break; - default: - printf("Warning: you configured more USDHC controllers (%d) then supported by the board (%d)\n", - index + 1, CONFIG_SYS_FSL_USDHC_NUM); - return status; - } - - status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); - } - - return status; -#else /* CONFIG_SPL_BUILD */ struct src *psrc = (struct src *)SRC_BASE_ADDR; unsigned reg = readl(&psrc->sbmr1) >> 11; /* @@ -394,9 +364,8 @@ int board_mmc_init(bd_t *bis) } return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -#endif /* CONFIG_SPL_BUILD */ } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ int board_phy_config(struct phy_device *phydev) { @@ -1171,3 +1140,52 @@ U_BOOT_DEVICE(mxc_serial) = { .name = "serial_mxc", .platdata = &mxc_serial_plat, }; + +#if CONFIG_IS_ENABLED(AHCI) +static int sata_imx_probe(struct udevice *dev) +{ + int i, err; + + for (i = 0; i < APALIS_IMX6_SATA_INIT_RETRIES; i++) { + err = setup_sata(); + if (err) { + printf("SATA setup failed: %d\n", err); + return err; + } + + udelay(100); + + err = dwc_ahsata_probe(dev); + if (!err) + break; + + /* There is no device on the SATA port */ + if (sata_dm_port_status(0, 0) == 0) + break; + + /* There's a device, but link not established. Retry */ + device_remove(dev, DM_REMOVE_NORMAL); + } + + return 0; +} + +struct ahci_ops sata_imx_ops = { + .port_status = dwc_ahsata_port_status, + .reset = dwc_ahsata_bus_reset, + .scan = dwc_ahsata_scan, +}; + +static const struct udevice_id sata_imx_ids[] = { + { .compatible = "fsl,imx6q-ahci" }, + { } +}; + +U_BOOT_DRIVER(sata_imx) = { + .name = "dwc_ahci", + .id = UCLASS_AHCI, + .of_match = sata_imx_ids, + .ops = &sata_imx_ops, + .probe = sata_imx_probe, +}; +#endif /* AHCI */ diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 7e973ded74..510161ad32 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y @@ -55,6 +56,7 @@ CONFIG_DWC_AHSATA=y CONFIG_DFU_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y @@ -67,6 +69,7 @@ CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_SCSI=y CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 5ab009c8f3..6b20d1e104 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -57,9 +57,6 @@ * SATA Configs */ #ifdef CONFIG_CMD_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 1 -#define CONFIG_DWC_AHSATA_PORT_ID 0 -#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 #endif From 9fb4b8929a5d5de813f43bc8cf6a321795ebea94 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:15 +0100 Subject: [PATCH 046/140] apalis_imx6: migrate usb to using driver model Migrate USB to using driver model. Signed-off-by: Marcel Ziswiler --- board/toradex/apalis_imx6/apalis_imx6.c | 22 ---------------------- configs/apalis_imx6_defconfig | 1 + 2 files changed, 1 insertion(+), 22 deletions(-) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 34e78ddb44..220cbff0b4 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -271,28 +271,6 @@ int board_ehci_hcd_init(int port) imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); return 0; } - -int board_ehci_power(int port, int on) -{ - switch (port) { - case 0: - /* control OTG power */ - gpio_direction_output(GPIO_USBO_EN, on); - mdelay(100); - break; - case 1: - /* Control MXM USBH */ - gpio_direction_output(GPIO_USBH_EN, on); - mdelay(2); - /* Control onboard USB Hub VBUS */ - gpio_direction_output(GPIO_USB_VBUS_DET, on); - mdelay(100); - break; - default: - break; - } - return 0; -} #endif #if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 510161ad32..1ab5edc966 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -72,6 +72,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_SCSI=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Toradex" From 16959d75dda0c6ce4cf6d59bcdda270528aefc52 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:16 +0100 Subject: [PATCH 047/140] apalis_imx6: drop CONFIG_OF_SYSTEM_SETUP This doesn't do anything anymore, probably never did. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/apalis_imx6/apalis_imx6.c | 7 ------- include/configs/apalis_imx6.h | 2 -- 2 files changed, 9 deletions(-) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 220cbff0b4..a716f09ec7 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -715,13 +715,6 @@ int board_late_init(void) } #endif /* CONFIG_BOARD_LATE_INIT */ -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_SYSTEM_SETUP) -int ft_system_setup(void *blob, bd_t *bd) -{ - return 0; -} -#endif - int checkboard(void) { char it[] = " IT"; diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 6b20d1e104..382048d2ef 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -259,8 +259,6 @@ #define CONFIG_SYS_MMC_ENV_PART 1 #endif -#define CONFIG_OF_SYSTEM_SETUP - #define CONFIG_CMD_TIME #endif /* __CONFIG_H */ From 26ee49a777d2acad013888979143aee9ad99d4c9 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:17 +0100 Subject: [PATCH 048/140] apalis_imx6: add distroboot support Add support for distro boot. This is especially helpful for external devices. There is a global boot command which scans a predefined list of boot targets: run distro_bootcmd As well as direct boot commands such as: run bootcmd_mmc1 run bootcmd_mmc2 run bootcmd_usb run bootcmd_dhcp ... Refer to doc/README.distro for details. While at it, remove the CONFIG_DRIVE_TYPES define which has not been used and was meant to be used for multi device boot support which is now provided by distroboot. Signed-off-by: Stefan Agner Acked-by: Max Krummenacher Acked-by: Marcel Ziswiler --- include/configs/apalis_imx6.h | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 382048d2ef..5f865e1f08 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -109,20 +109,19 @@ #define CONFIG_LOADADDR 0x12000000 -#ifdef CONFIG_CMD_SATA -#define CONFIG_DRIVE_SATA "sata " +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) +#include +#undef BOOTENV_RUN_NET_USB_START +#define BOOTENV_RUN_NET_USB_START "" #else -#define CONFIG_DRIVE_SATA +#define BOOTENV #endif -#ifdef CONFIG_CMD_MMC -#define CONFIG_DRIVE_MMC "mmc " -#else -#define CONFIG_DRIVE_MMC -#endif - -#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC - #define DFU_ALT_EMMC_INFO \ "u-boot.imx raw 0x2 0x3ff mmcpart 0;" \ "boot part 0 1;" \ @@ -149,7 +148,9 @@ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "kernel_addr_r=0x11000000\0" \ - "ramdisk_addr_r=0x12100000\0" + "pxefile_addr_r=0x17100000\0" \ + "ramdisk_addr_r=0x12100000\0" \ + "scriptaddr=0x17000000\0" #define NFS_BOOTCMD \ "nfsargs=ip=:::::eth0:on root=/dev/nfs rw\0" \ @@ -191,9 +192,10 @@ #define FDT_FILE "imx6q-apalis_v1_0-eval.dtb" #endif #define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ "bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \ - "run nfsboot ; echo ; echo nfsboot failed ; " \ - "usb start ;" \ + "run distro_bootcmd ; " \ + "usb start ; " \ "setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \ "boot_file=uImage\0" \ "console=ttymxc0\0" \ From 321be226438681cf52cf31e0c442bdb7027487cf Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:12:18 +0100 Subject: [PATCH 049/140] apalis_imx6: use both sd/mmc interfaces for setsdupdate During porting to 2016.11 the check of a SD (mmc2) interface was dropped, this was unintended. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- include/configs/apalis_imx6.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 5f865e1f08..7df32feb0d 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -210,8 +210,10 @@ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ "flash_eth.img && source ${loadaddr}\0" \ - "setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; load " \ - "${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \ + "setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; " \ + "load ${interface} ${drive}:1 ${loadaddr} flash_blk.img " \ + "|| setenv drive 2; mmc rescan; load ${interface} ${drive}:1" \ + " ${loadaddr} flash_blk.img && " \ "source ${loadaddr}\0" \ "setup=setenv setupargs fec_mac=${ethaddr} " \ "consoleblank=0 no_console_suspend=1 console=tty1 " \ From 3ef55a74739a09b2f56495a3fe5852b15f09b9d9 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:12:19 +0100 Subject: [PATCH 050/140] apalis_imx6: unify sd/mmc drive strength with linux kernel settings In the Linux device tree we use 40Ohm drive strength. So use the same value in U-Boot. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/apalis_imx6/apalis_imx6.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index a716f09ec7..407ed1e22e 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -45,6 +45,10 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SRE_FAST | PAD_CTL_HYS) #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_EMMC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) @@ -115,16 +119,16 @@ iomux_v3_cfg_t const usdhc2_pads[] = { /* eMMC */ iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION, }; #endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ From b4707a25d0e2e66b25a027597217fec68ccade22 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:20 +0100 Subject: [PATCH 051/140] apalis_imx6: pf0100: reorder and cleanup message printing Keep debug code at the end of the function. Use a one line informational message for the PMIC only. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/apalis_imx6/pf0100.c | 112 +++++++++++++++-------------- 1 file changed, 57 insertions(+), 55 deletions(-) diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c index 3a944b3699..8106abf89a 100644 --- a/board/toradex/apalis_imx6/pf0100.c +++ b/board/toradex/apalis_imx6/pf0100.c @@ -35,7 +35,7 @@ unsigned pmic_init(void) uchar bus = 1; uchar devid, revid, val; - puts("PMIC: "); + puts("PMIC: "); rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev); if (rc) { printf("failed to get device for PMIC at address 0x%x\n", @@ -51,11 +51,65 @@ unsigned pmic_init(void) puts("i2c pmic revid read failed\n"); return 0; } - printf("device id: 0x%.2x, revision id: 0x%.2x\n", devid, revid); + printf("device id: 0x%.2x, revision id: 0x%.2x, ", devid, revid); + + /* get device programmed state */ + val = PFUZE100_PAGE_REGISTER_PAGE1; + if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { + puts("i2c write failed\n"); + return 0; + } + if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) { + puts("i2c fuse_por read failed\n"); + return 0; + } + if (val & PFUZE100_FUSE_POR_M) + programmed++; + + if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) { + puts("i2c fuse_por read failed\n"); + return programmed; + } + if (val & PFUZE100_FUSE_POR_M) + programmed++; + + if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) { + puts("i2c fuse_por read failed\n"); + return programmed; + } + if (val & PFUZE100_FUSE_POR_M) + programmed++; + + switch (programmed) { + case 0: + puts("not programmed\n"); + break; + case 3: + puts("programmed\n"); + break; + default: + puts("undefined programming state\n"); + break; + } + + /* The following is needed during production */ + if (programmed != 3) { + /* set VGEN1 to 1.2V */ + val = PFUZE100_VGEN1_VAL; + if (dm_i2c_write(dev, PFUZE100_VGEN1CTL, &val, 1)) { + puts("i2c write failed\n"); + return programmed; + } + + /* set SWBST to 5.0V */ + val = PFUZE100_SWBST_VAL; + if (dm_i2c_write(dev, PFUZE100_SWBSTCTL, &val, 1)) + puts("i2c write failed\n"); + } #ifdef DEBUG { - unsigned i, j; + unsigned int i, j; for (i = 0; i < 16; i++) printf("\t%x", i); @@ -102,59 +156,7 @@ unsigned pmic_init(void) printf("\n"); } #endif /* DEBUG */ - /* get device programmed state */ - val = PFUZE100_PAGE_REGISTER_PAGE1; - if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { - puts("i2c write failed\n"); - return 0; - } - if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) { - puts("i2c fuse_por read failed\n"); - return 0; - } - if (val & PFUZE100_FUSE_POR_M) - programmed++; - if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) { - puts("i2c fuse_por read failed\n"); - return programmed; - } - if (val & PFUZE100_FUSE_POR_M) - programmed++; - - if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) { - puts("i2c fuse_por read failed\n"); - return programmed; - } - if (val & PFUZE100_FUSE_POR_M) - programmed++; - - switch (programmed) { - case 0: - printf("PMIC: not programmed\n"); - break; - case 3: - printf("PMIC: programmed\n"); - break; - default: - printf("PMIC: undefined programming state\n"); - break; - } - - /* The following is needed during production */ - if (programmed != 3) { - /* set VGEN1 to 1.2V */ - val = PFUZE100_VGEN1_VAL; - if (dm_i2c_write(dev, PFUZE100_VGEN1CTL, &val, 1)) { - puts("i2c write failed\n"); - return programmed; - } - - /* set SWBST to 5.0V */ - val = PFUZE100_SWBST_VAL; - if (dm_i2c_write(dev, PFUZE100_SWBSTCTL, &val, 1)) - puts("i2c write failed\n"); - } return programmed; } From 389f61ef44fd032ae5efd3995623842d9281b4c1 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:12:21 +0100 Subject: [PATCH 052/140] apalis_imx6: disable ri and dcd irq in uarts If the UART is used in DTE mode the RI and DCD bits in UCR3 become irq enable bits. Both are set to enabled after reset and both likely are pending. Disable the bits also on UARTs not used in the boot loader to prevent an interrupt storm when Linux enables the UART interrupts. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/apalis_imx6/apalis_imx6.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 407ed1e22e..934ba1fb5b 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -238,8 +238,11 @@ iomux_v3_cfg_t const usb_pads[] = { * UARTs are used in DTE mode, switch the mode on all UARTs before * any pinmuxing connects a (DCE) output to a transceiver output. */ +#define UCR3 0x88 /* FIFO Control Register */ +#define UCR3_RI BIT(8) /* RIDELT DTE mode */ +#define UCR3_DCD BIT(9) /* DCDDELT DTE mode */ #define UFCR 0x90 /* FIFO Control Register */ -#define UFCR_DCEDTE (1<<6) /* DCE=0 */ +#define UFCR_DCEDTE BIT(6) /* DCE=0 */ static void setup_dtemode_uart(void) { @@ -247,6 +250,11 @@ static void setup_dtemode_uart(void) setbits_le32((u32 *)(UART2_BASE + UFCR), UFCR_DCEDTE); setbits_le32((u32 *)(UART4_BASE + UFCR), UFCR_DCEDTE); setbits_le32((u32 *)(UART5_BASE + UFCR), UFCR_DCEDTE); + + clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); + clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); + clrbits_le32((u32 *)(UART4_BASE + UCR3), UCR3_DCD | UCR3_RI); + clrbits_le32((u32 *)(UART5_BASE + UCR3), UCR3_DCD | UCR3_RI); } static void setup_dcemode_uart(void) { From 5135db4d8b6def5eda4e47ca3f97b38fd7bc7702 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:12:22 +0100 Subject: [PATCH 053/140] apalis_imx6: revert fuse value set in mfgr_fuse We have two commands to change the bootmode fuses: mfgr_fuse which set fuse 0/5 and 0/6 and updt_fuse which burns bit 4 of 0/5. Before BSP 2.6 we fused in mfgr_fuse 0x5062, which boots from the user partition of the eMMC. To workaround certain hangs we moved to fastboot mode and using the first bootpartition of the eMMC requiring a fuse value of 0x5072 which could be achieved by the then added updt_fuse command. At the same time the mfgr_fuse command was changed to also fuse 0x5072, revert that second change so that one can fuse both values, one with just mfgr_fuse and the later with mfgr_fuse;updt_fuse. Note that the mfgr_fuse command is only needed at module production time, a customer might need to use updt_fuse when upgrading an older module to be compatible with a newer image. The command is integrated into the image update scripts. Signed-off-by: Max Krummenacher Acked-by: Stefan Agner Acked-by: Marcel Ziswiler --- board/toradex/apalis_imx6/do_fuse.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/toradex/apalis_imx6/do_fuse.c b/board/toradex/apalis_imx6/do_fuse.c index e6793e366a..22d191f52a 100644 --- a/board/toradex/apalis_imx6/do_fuse.c +++ b/board/toradex/apalis_imx6/do_fuse.c @@ -29,7 +29,7 @@ static int mfgr_fuse(void) return CMD_RET_FAILURE; } /* boot cfg */ - fuse_prog(0, 5, 0x00005072); + fuse_prog(0, 5, 0x00005062); /* BT_FUSE_SEL */ fuse_prog(0, 6, 0x00000010); return CMD_RET_SUCCESS; From ede25100e1930cca9d4c7188dc65842ccb340cd1 Mon Sep 17 00:00:00 2001 From: Sanchayan Maity Date: Fri, 8 Feb 2019 18:12:23 +0100 Subject: [PATCH 054/140] configs: apalis_imx6: Use ext4 file system by default Use ext4 file system by default. Signed-off-by: Sanchayan Maity Acked-by: Max Krummenacher Acked-by: Marcel Ziswiler --- include/configs/apalis_imx6.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 7df32feb0d..a49b08ba45 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -131,7 +131,7 @@ "imx6q-colibri-cam-eval-v3.dtb fat 0 1" #define EMMC_BOOTCMD \ - "emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext3 " \ + "emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext4 " \ "rootwait\0" \ "emmcboot=run setup; " \ "setenv bootargs ${defargs} ${emmcargs} ${setupargs} " \ @@ -163,7 +163,7 @@ "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" #define SD_BOOTCMD \ - "sdargs=ip=off root=/dev/mmcblk1p2 rw,noatime rootfstype=ext3 " \ + "sdargs=ip=off root=/dev/mmcblk1p2 rw,noatime rootfstype=ext4 " \ "rootwait\0" \ "sdboot=run setup; " \ "setenv bootargs ${defargs} ${sdargs} ${setupargs} " \ @@ -175,7 +175,7 @@ "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" #define USB_BOOTCMD \ - "usbargs=ip=off root=/dev/sda2 rw,noatime rootfstype=ext3 " \ + "usbargs=ip=off root=/dev/sda2 rw,noatime rootfstype=ext4 " \ "rootwait\0" \ "usbboot=run setup; setenv bootargs ${defargs} ${setupargs} " \ "${usbargs} ${vidargs}; echo Booting from USB stick...; " \ From 15834c638317d480e943fae688b148edcfc52892 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 8 Feb 2019 18:12:24 +0100 Subject: [PATCH 055/140] apalis_imx6: use SDP if USB serial downloader has been used In case USB serial downloader has been used to load U-Boot start the serial download protocol (SDP) emulation. This allows to download complete images such as Toradex Easy Installer over USB SDP as well. This code uses the boot ROM provided boot information to reliably detect USB serial downloader. Signed-off-by: Stefan Agner Acked-by: Marcel Ziswiler --- board/toradex/apalis_imx6/apalis_imx6.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 934ba1fb5b..3e59185438 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -723,6 +723,14 @@ int board_late_init(void) #endif /* CONFIG_TDX_APALIS_IMX6_V1_0 */ #endif /* CONFIG_REVISION_TAG */ +#ifdef CONFIG_CMD_USB_SDP + if (is_boot_from_usb()) { + printf("Serial Downloader recovery mode, using sdp command\n"); + env_set("bootdelay", "0"); + env_set("bootcmd", "sdp 0"); + } +#endif /* CONFIG_CMD_USB_SDP */ + return 0; } #endif /* CONFIG_BOARD_LATE_INIT */ From 63fe9a082711080590228defe12023ba75038066 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:12:25 +0100 Subject: [PATCH 056/140] apalis_imx6: switch to zimage Switch to the generic compressed Kernel image type (zImage) instead of the U-Boot specific uImage format. While at it also fix device tree naming for MMC DFU. Signed-off-by: Bhuvanchandra DV Acked-by: Marcel Ziswiler --- include/configs/apalis_imx6.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index a49b08ba45..c8aa1bdddf 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -118,17 +118,17 @@ #include #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START "" -#else +#else /* CONFIG_SPL_BUILD */ #define BOOTENV -#endif +#endif /* CONFIG_SPL_BUILD */ #define DFU_ALT_EMMC_INFO \ "u-boot.imx raw 0x2 0x3ff mmcpart 0;" \ "boot part 0 1;" \ "rootfs part 0 2;" \ - "uImage fat 0 1;" \ - "imx6q-colibri-eval-v3.dtb fat 0 1;" \ - "imx6q-colibri-cam-eval-v3.dtb fat 0 1" + "zImage fat 0 1;" \ + "imx6q-apalis-eval.dtb fat 0 1;" \ + "imx6q-apalis-cam-eval.dtb fat 0 1" #define EMMC_BOOTCMD \ "emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext4 " \ @@ -138,7 +138,7 @@ "${vidargs}; echo Booting from internal eMMC chip...; " \ "run emmcdtbload; load mmc 0:1 ${kernel_addr_r} " \ "${boot_file} && run fdt_fixup && " \ - "bootm ${kernel_addr_r} ${dtbparam}\0" \ + "bootz ${kernel_addr_r} ${dtbparam}\0" \ "emmcdtbload=setenv dtbparam; load mmc 0:1 ${fdt_addr_r} " \ "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" @@ -158,11 +158,11 @@ "setenv bootargs ${defargs} ${nfsargs} ${setupargs} " \ "${vidargs}; echo Booting via DHCP/TFTP/NFS...; " \ "run nfsdtbload; dhcp ${kernel_addr_r} " \ - "&& run fdt_fixup && bootm ${kernel_addr_r} ${dtbparam}\0" \ + "&& run fdt_fixup && bootz ${kernel_addr_r} ${dtbparam}\0" \ "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} ${fdt_file} " \ "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" -#define SD_BOOTCMD \ +#define SD_BOOTCMD \ "sdargs=ip=off root=/dev/mmcblk1p2 rw,noatime rootfstype=ext4 " \ "rootwait\0" \ "sdboot=run setup; " \ @@ -170,7 +170,7 @@ "${vidargs}; echo Booting from SD card; " \ "run sddtbload; load mmc 1:1 ${kernel_addr_r} " \ "${boot_file} && run fdt_fixup && " \ - "bootm ${kernel_addr_r} ${dtbparam}\0" \ + "bootz ${kernel_addr_r} ${dtbparam}\0" \ "sddtbload=setenv dtbparam; load mmc 1:1 ${fdt_addr_r} " \ "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" @@ -181,7 +181,7 @@ "${usbargs} ${vidargs}; echo Booting from USB stick...; " \ "usb start && run usbdtbload; load usb 0:1 ${kernel_addr_r} " \ "${boot_file} && run fdt_fixup && " \ - "bootm ${kernel_addr_r} ${dtbparam}\0" \ + "bootz ${kernel_addr_r} ${dtbparam}\0" \ "usbdtbload=setenv dtbparam; load usb 0:1 ${fdt_addr_r} " \ "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" @@ -197,7 +197,7 @@ "run distro_bootcmd ; " \ "usb start ; " \ "setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \ - "boot_file=uImage\0" \ + "boot_file=zImage\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off vmalloc=400M\0" \ "dfu_alt_info=" DFU_ALT_EMMC_INFO "\0" \ From 15c41a8d9e3d7162f28af7dde94246bf2bb53111 Mon Sep 17 00:00:00 2001 From: Gerard Salvatella Date: Fri, 8 Feb 2019 18:12:26 +0100 Subject: [PATCH 057/140] board: apalis_imx6: check for and report ecc errors in fuses The PMIC on Apalis iMX6 may have ECC errors in fuses that will prevent correct settings. Up to one bit error per fuse bank may be reported and corrected by the ECC logic. Two bit errors can only be reported. Signed-off-by: Gerard Salvatella Acked-by: Marcel Ziswiler --- board/toradex/apalis_imx6/pf0100.c | 51 ++++++++++++++++++++++++++ board/toradex/apalis_imx6/pf0100.h | 57 +++++++++++++++++++++++++++++- 2 files changed, 107 insertions(+), 1 deletion(-) diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c index 8106abf89a..ebd6418fd4 100644 --- a/board/toradex/apalis_imx6/pf0100.c +++ b/board/toradex/apalis_imx6/pf0100.c @@ -21,6 +21,8 @@ /* define for PMIC register dump */ /*#define DEBUG */ +#define WARNBAR "@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\n" + /* use Apalis GPIO1 to switch on VPGM, ON: 1 */ static __maybe_unused iomux_v3_cfg_t const pmic_prog_pads[] = { MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -42,6 +44,55 @@ unsigned pmic_init(void) PFUZE100_I2C_ADDR); return 0; } + + /* check for errors in PMIC fuses */ + if (dm_i2c_read(dev, PFUZE100_INTSTAT3, &val, 1) < 0) { + puts("i2c pmic INTSTAT3 register read failed\n"); + return 0; + } + if (val & PFUZE100_BIT_OTP_ECCI) { + puts("\n" WARNBAR); + puts("WARNING: ecc errors found in pmic fuse banks\n"); + puts(WARNBAR); + } + if (dm_i2c_read(dev, PFUZE100_OTP_ECC_SE1, &val, 1) < 0) { + puts("i2c pmic ECC_SE1 register read failed\n"); + return 0; + } + if (val & PFUZE100_BITS_ECC_SE1) { + puts(WARNBAR); + puts("WARNING: ecc has made bit corrections in banks 1 to 5\n"); + puts(WARNBAR); + } + if (dm_i2c_read(dev, PFUZE100_OTP_ECC_SE2, &val, 1) < 0) { + puts("i2c pmic ECC_SE2 register read failed\n"); + return 0; + } + if (val & PFUZE100_BITS_ECC_SE2) { + puts(WARNBAR); + puts("WARNING: ecc has made bit corrections in banks 6 to 10\n" + ); + puts(WARNBAR); + } + if (dm_i2c_read(dev, PFUZE100_OTP_ECC_DE1, &val, 1) < 0) { + puts("i2c pmic ECC_DE register read failed\n"); + return 0; + } + if (val & PFUZE100_BITS_ECC_DE1) { + puts(WARNBAR); + puts("ERROR: banks 1 to 5 have uncorrectable bits\n"); + puts(WARNBAR); + } + if (dm_i2c_read(dev, PFUZE100_OTP_ECC_DE2, &val, 1) < 0) { + puts("i2c pmic ECC_DE register read failed\n"); + return 0; + } + if (val & PFUZE100_BITS_ECC_DE2) { + puts(WARNBAR); + puts("ERROR: banks 6 to 10 have uncorrectable bits\n"); + puts(WARNBAR); + } + /* get device ident */ if (dm_i2c_read(dev, PFUZE100_DEVICEID, &devid, 1) < 0) { puts("i2c pmic devid read failed\n"); diff --git a/board/toradex/apalis_imx6/pf0100.h b/board/toradex/apalis_imx6/pf0100.h index b854fe8c54..9257620511 100644 --- a/board/toradex/apalis_imx6/pf0100.h +++ b/board/toradex/apalis_imx6/pf0100.h @@ -10,11 +10,23 @@ #ifndef PF0100_H_ #define PF0100_H_ +/* bit definitions */ +#define PFUZE100_BIT_0 (0x01 << 0) +#define PFUZE100_BIT_1 (0x01 << 1) +#define PFUZE100_BIT_2 (0x01 << 2) +#define PFUZE100_BIT_3 (0x01 << 3) +#define PFUZE100_BIT_4 (0x01 << 4) +#define PFUZE100_BIT_5 (0x01 << 5) +#define PFUZE100_BIT_6 (0x01 << 6) +#define PFUZE100_BIT_7 (0x01 << 7) + /* 7-bit I2C bus slave address */ #define PFUZE100_I2C_ADDR (0x08) /* Register Addresses */ #define PFUZE100_DEVICEID (0x0) #define PFUZE100_REVID (0x3) +#define PFUZE100_INTSTAT3 (0xe) +#define PFUZE100_BIT_OTP_ECCI PFUZE100_BIT_7 #define PFUZE100_SW1AMODE (0x23) #define PFUZE100_SW1ACON 36 #define PFUZE100_SW1ACON_SPEED_VAL (0x1<<6) /*default */ @@ -39,12 +51,55 @@ #define PFUZE100_PAGE_REGISTER_PAGE2 (0x02 & PFUZE100_PAGE_REGISTER_PAGE_M) /* extended page 1 */ +#define PFUZE100_OTP_ECC_SE1 0x8a +#define PFUZE100_BIT_ECC1_SE PFUZE100_BIT_0 +#define PFUZE100_BIT_ECC2_SE PFUZE100_BIT_1 +#define PFUZE100_BIT_ECC3_SE PFUZE100_BIT_2 +#define PFUZE100_BIT_ECC4_SE PFUZE100_BIT_3 +#define PFUZE100_BIT_ECC5_SE PFUZE100_BIT_4 +#define PFUZE100_BITS_ECC_SE1 ((PFUZE100_BIT_ECC1_SE) | \ + (PFUZE100_BIT_ECC2_SE) | \ + (PFUZE100_BIT_ECC3_SE) | \ + (PFUZE100_BIT_ECC4_SE) | \ + (PFUZE100_BIT_ECC5_SE)) +#define PFUZE100_OTP_ECC_SE2 0x8b +#define PFUZE100_BIT_ECC6_SE PFUZE100_BIT_0 +#define PFUZE100_BIT_ECC7_SE PFUZE100_BIT_1 +#define PFUZE100_BIT_ECC8_SE PFUZE100_BIT_2 +#define PFUZE100_BIT_ECC9_SE PFUZE100_BIT_3 +#define PFUZE100_BIT_ECC10_SE PFUZE100_BIT_4 +#define PFUZE100_BITS_ECC_SE2 ((PFUZE100_BIT_ECC6_SE) | \ + (PFUZE100_BIT_ECC7_SE) | \ + (PFUZE100_BIT_ECC8_SE) | \ + (PFUZE100_BIT_ECC9_SE) | \ + (PFUZE100_BIT_ECC10_SE)) +#define PFUZE100_OTP_ECC_DE1 0x8c +#define PFUZE100_BIT_ECC1_DE PFUZE100_BIT_0 +#define PFUZE100_BIT_ECC2_DE PFUZE100_BIT_1 +#define PFUZE100_BIT_ECC3_DE PFUZE100_BIT_2 +#define PFUZE100_BIT_ECC4_DE PFUZE100_BIT_3 +#define PFUZE100_BIT_ECC5_DE PFUZE100_BIT_4 +#define PFUZE100_BITS_ECC_DE1 ((PFUZE100_BIT_ECC1_DE) | \ + (PFUZE100_BIT_ECC2_DE) | \ + (PFUZE100_BIT_ECC3_DE) | \ + (PFUZE100_BIT_ECC4_DE) | \ + (PFUZE100_BIT_ECC5_DE)) +#define PFUZE100_OTP_ECC_DE2 0x8d +#define PFUZE100_BIT_ECC6_DE PFUZE100_BIT_0 +#define PFUZE100_BIT_ECC7_DE PFUZE100_BIT_1 +#define PFUZE100_BIT_ECC8_DE PFUZE100_BIT_2 +#define PFUZE100_BIT_ECC9_DE PFUZE100_BIT_3 +#define PFUZE100_BIT_ECC10_DE PFUZE100_BIT_4 +#define PFUZE100_BITS_ECC_DE2 ((PFUZE100_BIT_ECC6_DE) | \ + (PFUZE100_BIT_ECC7_DE) | \ + (PFUZE100_BIT_ECC8_DE) | \ + (PFUZE100_BIT_ECC9_DE) | \ + (PFUZE100_BIT_ECC10_DE)) #define PFUZE100_FUSE_POR1 0xe4 #define PFUZE100_FUSE_POR2 0xe5 #define PFUZE100_FUSE_POR3 0xe6 #define PFUZE100_FUSE_POR_M (0x1 << 1) - /* output some informational messages, return the number FUSE_POR=1 */ /* i.e. 0: unprogrammed, 3: programmed, other: undefined prog. state */ unsigned pmic_init(void); From 0b2bd9fedaaa04d370bfeb08d8acbfc65ac39d35 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:04 +0100 Subject: [PATCH 058/140] colibri_imx6: get rid of obsolete nospl configurations Now with SPL long since being in place even for recovery using SDP finally get rid of those nospl configurations. Signed-off-by: Marcel Ziswiler --- .../toradex/colibri_imx6/800mhz_2x64mx16.cfg | 58 ----------- .../toradex/colibri_imx6/800mhz_4x64mx16.cfg | 58 ----------- board/toradex/colibri_imx6/MAINTAINERS | 1 - board/toradex/colibri_imx6/clocks.cfg | 41 -------- board/toradex/colibri_imx6/colibri_imx6.cfg | 37 ------- board/toradex/colibri_imx6/ddr-setup.cfg | 97 ------------------- configs/colibri_imx6_nospl_defconfig | 63 ------------ 7 files changed, 355 deletions(-) delete mode 100644 board/toradex/colibri_imx6/800mhz_2x64mx16.cfg delete mode 100644 board/toradex/colibri_imx6/800mhz_4x64mx16.cfg delete mode 100644 board/toradex/colibri_imx6/clocks.cfg delete mode 100644 board/toradex/colibri_imx6/colibri_imx6.cfg delete mode 100644 board/toradex/colibri_imx6/ddr-setup.cfg delete mode 100644 configs/colibri_imx6_nospl_defconfig diff --git a/board/toradex/colibri_imx6/800mhz_2x64mx16.cfg b/board/toradex/colibri_imx6/800mhz_2x64mx16.cfg deleted file mode 100644 index c9407143d2..0000000000 --- a/board/toradex/colibri_imx6/800mhz_2x64mx16.cfg +++ /dev/null @@ -1,58 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016, Toradex AG - */ - -DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D -DATA 4, MX6_MMDC_P0_MDCFG0, 0x2C305503 -DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66D8D63 -DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB -DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 -DATA 4, MX6_MMDC_P0_MDOR, 0x00301023 -DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 -DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D -/* CS0 End: 7MSB of ((0x10000000 + 512M) -1) >> 25 */ -DATA 4, MX6_MMDC_P0_MDASP, 0x00000017 -/* DDR3 DATA BUS SIZE: 64BIT */ -/* DATA 4, MX6_MMDC_P0_MDCTL, 0x821A0000 */ -/* DDR3 DATA BUS SIZE: 32BIT */ -DATA 4, MX6_MMDC_P0_MDCTL, 0x82190000 - -/* Write commands to DDR */ -/* Load Mode Registers */ -/* TODO Use Auto Self-Refresh mode (Extended Temperature)*/ -/* DATA 4, MX6_MMDC_P0_MDSCR, 0x04408032 */ -DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 -DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 -/* ZQ calibration */ -DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 - -DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 -DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 -DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 - -DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000000 -DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000 - -DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42360232 -DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021F022A -DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x421E0224 -DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02110218 - -DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x41434344 -DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4345423E -DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x39383339 -DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3E363930 - -DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00340039 -DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x002C002D -DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00120019 -DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D - -DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 -DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 -DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/toradex/colibri_imx6/800mhz_4x64mx16.cfg b/board/toradex/colibri_imx6/800mhz_4x64mx16.cfg deleted file mode 100644 index c319d2a729..0000000000 --- a/board/toradex/colibri_imx6/800mhz_4x64mx16.cfg +++ /dev/null @@ -1,58 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016, Toradex AG - */ - -DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D -DATA 4, MX6_MMDC_P0_MDCFG0, 0x2C305503 -DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66D8D63 -DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB -DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 -DATA 4, MX6_MMDC_P0_MDOR, 0x00301023 -DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 -DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D -/* CS0 End: 7MSB of ((0x10000000 + 512M) -1) >> 25 */ -DATA 4, MX6_MMDC_P0_MDASP, 0x00000017 -/* DDR3 DATA BUS SIZE: 64BIT */ -DATA 4, MX6_MMDC_P0_MDCTL, 0x821A0000 -/* DDR3 DATA BUS SIZE: 32BIT */ -/* DATA 4, MX6_MMDC_P0_MDCTL, 0x82190000 */ - -/* Write commands to DDR */ -/* Load Mode Registers */ -/* TODO Use Auto Self-Refresh mode (Extended Temperature)*/ -/* DATA 4, MX6_MMDC_P0_MDSCR, 0x04408032 */ -DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 -DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 -/* ZQ calibration */ -DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 - -DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 -DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 -DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 - -DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000000 -DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000 - -DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42360232 -DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021F022A -DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x421E0224 -DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02110218 - -DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x41434344 -DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4345423E -DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x39383339 -DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3E363930 - -DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00340039 -DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x002C002D -DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00120019 -DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D - -DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 -DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 -DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 -DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/toradex/colibri_imx6/MAINTAINERS b/board/toradex/colibri_imx6/MAINTAINERS index 1cc7ef2e71..49999d8cf5 100644 --- a/board/toradex/colibri_imx6/MAINTAINERS +++ b/board/toradex/colibri_imx6/MAINTAINERS @@ -5,4 +5,3 @@ S: Maintained F: board/toradex/colibri_imx6/ F: include/configs/colibri_imx6.h F: configs/colibri_imx6_defconfig -F: configs/colibri_imx6_nospl_defconfig diff --git a/board/toradex/colibri_imx6/clocks.cfg b/board/toradex/colibri_imx6/clocks.cfg deleted file mode 100644 index 1bcbc4fa38..0000000000 --- a/board/toradex/colibri_imx6/clocks.cfg +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016, Toradex AG - * - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ - -/* set the default clock gate to save power */ -DATA 4, CCM_CCGR0, 0x00C03F3F -DATA 4, CCM_CCGR1, 0x0030FC03 -DATA 4, CCM_CCGR2, 0x0FFFC000 -DATA 4, CCM_CCGR3, 0x3FF00000 -DATA 4, CCM_CCGR4, 0x00FFF300 -DATA 4, CCM_CCGR5, 0x0F0000C3 -DATA 4, CCM_CCGR6, 0x000003FF - -/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF -/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4, MX6_IOMUXC_GPR6, 0x007F007F -DATA 4, MX6_IOMUXC_GPR7, 0x007F007F - -/* - * Setup CCM_CCOSR register as follows: - * - * cko1_en = 1 --> CKO1 enabled - * cko1_div = 111 --> divide by 8 - * cko1_sel = 1011 --> ahb_clk_root - * - * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz - */ -DATA 4, CCM_CCOSR, 0x000000fb diff --git a/board/toradex/colibri_imx6/colibri_imx6.cfg b/board/toradex/colibri_imx6/colibri_imx6.cfg deleted file mode 100644 index 517c5eb107..0000000000 --- a/board/toradex/colibri_imx6/colibri_imx6.cfg +++ /dev/null @@ -1,37 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014 Toradex AG - * - * Refer doc/README.imximage for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -/* image version */ -IMAGE_VERSION 2 - -/* - * Boot Device : one of - * spi, sd (the board has no nand neither onenand) - */ -BOOT_FROM sd - -#define __ASSEMBLY__ -#include -#include "asm/arch/mx6-ddr.h" -#include "asm/arch/iomux.h" -#include "asm/arch/crm_regs.h" - -#include "ddr-setup.cfg" - -#if CONFIG_DDR_MB == 256 -#include "800mhz_2x64mx16.cfg" -#elif CONFIG_DDR_MB == 512 -#include "800mhz_4x64mx16.cfg" -#else -#error "unknown DDR size" -#endif - -#include "clocks.cfg" diff --git a/board/toradex/colibri_imx6/ddr-setup.cfg b/board/toradex/colibri_imx6/ddr-setup.cfg deleted file mode 100644 index a943fd228c..0000000000 --- a/board/toradex/colibri_imx6/ddr-setup.cfg +++ /dev/null @@ -1,97 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2013 Boundary Devices - * Copyright (C) 2014-2016, Toradex AG - * - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ - -/* - * DDR3 settings - * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), - * memory bus width: 64 bits x16/x32/x64 - * MX6DL ddr is limited to 800 MHz(400 MHz clock) - * memory bus width: 64 bits x16/x32/x64 - * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) - * memory bus width: 32 bits x16/x32 - */ -DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 -DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 - -DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 -DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 -DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 -/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ -DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 - -DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 -DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 - -DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 -DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 -DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 -DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 - -DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 -DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 -DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 - -DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 -DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 - -/* (differential input) */ -DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 -/* (differential input) */ -DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 -/* disable ddr pullups */ -DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 -DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 -/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ -DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 - -/* Read data DQ Byte0-3 delay */ -DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 -DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 -DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 -DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 -DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 -DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 -DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 -DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 - -/* - * MDMISC mirroring interleaved (row/bank/col) - */ -/* TODO: check what the RALAT field does */ -DATA 4, MX6_MMDC_P0_MDMISC, 0x00081740 - -/* - * MDSCR con_req - */ -DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig deleted file mode 100644 index 5e9490bc42..0000000000 --- a/configs/colibri_imx6_nospl_defconfig +++ /dev/null @@ -1,63 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_THUMB_BUILD=y -CONFIG_ARCH_MX6=y -CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_COLIBRI_IMX6=y -CONFIG_CMD_HDMIDETECT=y -CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx6/colibri_imx6.cfg,MX6DL,DDR_MB=256" -CONFIG_BOOTDELAY=1 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_MISC_INIT_R=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_BOUNCE_BUFFER=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="Colibri iMX6 # " -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_XIMG is not set -CONFIG_CMD_ASKENV=y -CONFIG_CRC32_VERIFY=y -CONFIG_CMD_MEMTEST=y -CONFIG_SYS_ALT_MEMTEST=y -CONFIG_CMD_DFU=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_BMP=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y -CONFIG_PHYLIB=y -CONFIG_PHY_MICREL=y -CONFIG_MII=y -CONFIG_USB=y -CONFIG_USB_STORAGE=y -CONFIG_USB_KEYBOARD=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Toradex" -CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 -CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 -CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USB_HOST_ETHER=y -CONFIG_VIDEO=y -CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y -# CONFIG_EFI_LOADER is not set From 2c36a8b95e5fc785835a1e954883e0749efc01fd Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:05 +0100 Subject: [PATCH 059/140] colibri_imx6: use distro defaults Use distro defaults and minimise default configuration again using savedefconfig. Signed-off-by: Marcel Ziswiler --- configs/colibri_imx6_defconfig | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 2072281354..699eb70088 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -9,12 +9,11 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y -CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set -CONFIG_SUPPORT_RAW_INITRD=y CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -26,9 +25,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Colibri iMX6 # " -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set @@ -43,14 +40,8 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DFU_MMC=y @@ -59,7 +50,6 @@ CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y CONFIG_USB=y -CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Toradex" From 1874cddeb99a78fb8d1c484f82260bac14c182a7 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:06 +0100 Subject: [PATCH 060/140] colibri_imx6: move console in env from header file to defconfig Move console in env from header file to defconfig. While at it also update copyright year. Signed-off-by: Marcel Ziswiler --- configs/colibri_imx6_defconfig | 1 + include/configs/colibri_imx6.h | 3 +-- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 699eb70088..0b31a46cc9 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -14,6 +14,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 2d40ceb24e..9e45d63245 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2013-2015 Toradex, Inc. + * Copyright 2013-2019 Toradex, Inc. * * Configuration settings for the Toradex Colibri iMX6 */ @@ -74,7 +74,6 @@ /* Framebuffer and LCD */ #define CONFIG_VIDEO_IPUV3 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN From 1c986720d5ddf1c94ddb26e7625a076dddcfa3b4 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:07 +0100 Subject: [PATCH 061/140] colibri_imx6: enable fit image, gpt, imx thermal, efi loader support Enbale FIT image, GPT command, i.MX thermal and EFI loader support. Signed-off-by: Marcel Ziswiler --- configs/colibri_imx6_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 0b31a46cc9..84fa427c8c 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set @@ -36,6 +37,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y @@ -50,6 +52,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y +CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y @@ -63,4 +66,3 @@ CONFIG_VIDEO=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y -# CONFIG_EFI_LOADER is not set From 70af111f89ce06502b54deb06ae517f095c3543b Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:08 +0100 Subject: [PATCH 062/140] colibri_imx6: remove obsolete USB_GADGET_MASS_STORAGE configuration Remove obsolete USB_GADGET_MASS_STORAGE configuration. Signed-off-by: Marcel Ziswiler --- include/configs/colibri_imx6.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 9e45d63245..f029a885d2 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -70,8 +70,6 @@ /* Client */ #define CONFIG_USBD_HS -#define CONFIG_USB_GADGET_MASS_STORAGE - /* Framebuffer and LCD */ #define CONFIG_VIDEO_IPUV3 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE From 50f39bb6f2d043b406b97486186e09b48ee1dba0 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:09 +0100 Subject: [PATCH 063/140] colibri_imx6: migrate to using device tree Migrate to using device tree required for further driver model integration. Signed-off-by: Marcel Ziswiler --- arch/arm/dts/imx6-colibri.dts | 411 +++++++++++++++++++++++++ board/toradex/colibri_imx6/MAINTAINERS | 2 + configs/colibri_imx6_defconfig | 3 +- 3 files changed, 415 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6-colibri.dts diff --git a/arch/arm/dts/imx6-colibri.dts b/arch/arm/dts/imx6-colibri.dts new file mode 100644 index 0000000000..5c9f1f0d2b --- /dev/null +++ b/arch/arm/dts/imx6-colibri.dts @@ -0,0 +1,411 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Toradex AG + */ + +/dts-v1/; +#include +#include "imx6dl.dtsi" + +/ { + model = "Toradex Colibri iMX6DL/S"; + compatible = "toradex,colibri_imx6dl", "fsl,imx6dl"; + + /* Will be filled by the bootloader */ + memory@10000000 { + device_type = "memory"; + reg = <0x10000000 0>; + }; + + aliases { + mmc0 = &usdhc3; + mmc1 = &usdhc1; + usb0 = &usbotg; /* required for ums */ + }; + + chosen { + stdout-path = &uart1; + }; + + reg_module_3v3: regulator-module-3v3 { + compatible = "regulator-fixed"; + regulator-name = "+V3.3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_regulator_usbh_pwr>; + regulator-name = "usb_host_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 31 GPIO_ACTIVE_LOW>; /* USBH_PEN */ + }; +}; + +/* + * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and + * touch screen controller + */ +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pmic: pfuze100@8 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + regulator-boot-on; + regulator-always-on; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + /* vgen1: unused */ + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-boot-on; + regulator-always-on; + }; + + /* vgen3: unused */ + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; + +/* + * I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) + */ +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_recovery>; + scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; +}; + +/* Colibri UART_A */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>; + fsl,dte-mode; + uart-has-rtscts; + status = "okay"; +}; + +/* Colibri UART_B */ +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_dte>; + fsl,dte-mode; + uart-has-rtscts; + status = "okay"; +}; + +/* Colibri UART_C */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3_dte>; + fsl,dte-mode; + status = "okay"; +}; + +/* Colibri USBH */ +&usbh1 { + dr_mode = "host"; + vbus-supply = <®_usb_host_vbus>; + status = "okay"; +}; + +/* Colibri USBC */ +&usbotg { + dr_mode = "host"; + status = "okay"; +}; + +/* Colibri MMC */ +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>; + cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */ + disable-wp; + vqmmc-supply = <®_module_3v3>; + bus-width = <4>; + no-1-8-v; + status = "okay"; +}; + +/* eMMC */ +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + vqmmc-supply = <®_module_3v3>; + bus-width = <8>; + no-1-8-v; + non-removable; + status = "okay"; +}; + +&iomuxc { + pinctrl_ecspi4: ecspi4grp { + fsl,pins = < + MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 + MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 + MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 + /* SPI CS */ + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0) + >; + }; + + pinctrl_gpio_bl_on: gpioblon { + fsl,pins = < + MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 + >; + }; + + pinctrl_hdmi_ddc: hdmiddcgrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3_recovery: i2c3recoverygrp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1 + >; + }; + + pinctrl_ipu1_lcdif: ipu1lcdifgrp { + fsl,pins = < + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xa1 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xa1 + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0xa1 + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0xa1 + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xa1 + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xa1 + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xa1 + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xa1 + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xa1 + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xa1 + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xa1 + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xa1 + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xa1 + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xa1 + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xa1 + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xa1 + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xa1 + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xa1 + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xa1 + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xa1 + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xa1 + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xa1 + >; + }; + + pinctrl_mmc_cd: gpiommccd { + fsl,pins = < + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 + MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 + MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp { + fsl,pins = < + /* SODIMM 129 USBH_PEN */ + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x0f058 + >; + }; + + pinctrl_uart1_dce: uart1dcegrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + /* DTE mode */ + pinctrl_uart1_dte: uart1dtegrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1 + >; + }; + + /* Additional DTR, DSR, DCD */ + pinctrl_uart1_ctrl: uart1ctrlgrp { + fsl,pins = < + MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0 + MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0 + MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0 + >; + }; + + pinctrl_uart2_dte: uart2dtegrp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart3_dte: uart3dtegrp { + fsl,pins = < + MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + /* eMMC reset */ + MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 + >; + }; +}; diff --git a/board/toradex/colibri_imx6/MAINTAINERS b/board/toradex/colibri_imx6/MAINTAINERS index 49999d8cf5..e25c07306c 100644 --- a/board/toradex/colibri_imx6/MAINTAINERS +++ b/board/toradex/colibri_imx6/MAINTAINERS @@ -1,7 +1,9 @@ Colibri iMX6 M: Max Krummenacher W: http://developer.toradex.com/software/linux/linux-software +W: https://www.toradex.com/community S: Maintained F: board/toradex/colibri_imx6/ F: include/configs/colibri_imx6.h F: configs/colibri_imx6_defconfig +F: arch/arm/dts/imx6-colibri.dts diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 84fa427c8c..47e05b0b26 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -45,6 +45,8 @@ CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri" CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DFU_MMC=y @@ -64,5 +66,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_VIDEO=y CONFIG_FAT_WRITE=y -CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y From e7cf53497a5d54bebc04c241728ec6faae810d20 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:10 +0100 Subject: [PATCH 064/140] colibri_imx6: clean-up and migrate gpios to using driver model Migrate GPIOs to using driver model, properly request backlight, MMC/SD card detect and USB power enable GPIOs and also enable SION bit in pin muxing for auxiliary, backlight and USB power enable GPIOs. While at it also update copyright year, clean-up/re-order includes, add some comments clarifying ifdef scope and do some white-space clean-up. Signed-off-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 209 ++++++++++++++-------- configs/colibri_imx6_defconfig | 1 + 2 files changed, 135 insertions(+), 75 deletions(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 17876f27e9..0c2fa65cfe 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -2,39 +2,34 @@ /* * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. * Copyright (C) 2013, Boundary Devices - * Copyright (C) 2014-2016, Toradex AG + * Copyright (C) 2014-2019, Toradex AG * copied from nitrogen6x */ #include #include + #include #include #include -#include -#include #include +#include #include #include #include #include +#include #include #include #include -#include #include -#include #include -#include +#include #include #include -#include #include -#include -#include #include #include -#include #include #include "../common/tdx-cfg-block.h" @@ -173,68 +168,123 @@ static void setup_iomux_enet(void) /* mux auxiliary pins to GPIO, so they can be used from the U-Boot cmdline */ iomux_v3_cfg_t const gpio_pads[] = { /* ADDRESS[17:18] [25] used as GPIO */ - MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, /* ADDRESS[19:24] used as GPIO */ - MX6_PAD_DISP0_DAT23__GPIO5_IO17 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_DISP0_DAT22__GPIO5_IO16 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_DISP0_DAT21__GPIO5_IO15 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_DISP0_DAT20__GPIO5_IO14 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_DISP0_DAT19__GPIO5_IO13 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_DISP0_DAT18__GPIO5_IO12 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_DISP0_DAT23__GPIO5_IO17 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_DISP0_DAT22__GPIO5_IO16 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_DISP0_DAT21__GPIO5_IO15 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_DISP0_DAT20__GPIO5_IO14 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_DISP0_DAT19__GPIO5_IO13 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_DISP0_DAT18__GPIO5_IO12 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, /* DATA[16:29] [31] used as GPIO */ - MX6_PAD_EIM_LBA__GPIO2_IO27 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_CSI0_MCLK__GPIO5_IO19 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_CSI0_PIXCLK__GPIO5_IO18 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_LBA__GPIO2_IO27 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_CSI0_MCLK__GPIO5_IO19 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_CSI0_PIXCLK__GPIO5_IO18 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, /* DQM[0:3] used as GPIO */ - MX6_PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_EB1__GPIO2_IO29 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_SD2_DAT2__GPIO1_IO13 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_EB1__GPIO2_IO29 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_SD2_DAT2__GPIO1_IO13 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, /* RDY used as GPIO */ - MX6_PAD_EIM_WAIT__GPIO5_IO00 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_WAIT__GPIO5_IO00 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, /* ADDRESS[16] DATA[30] used as GPIO */ - MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(WEAK_PULLDOWN), - MX6_PAD_KEY_COL4__GPIO4_IO14 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(WEAK_PULLDOWN) | + MUX_MODE_SION, + MX6_PAD_KEY_COL4__GPIO4_IO14 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, /* CSI pins used as GPIO */ - MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_SD2_CMD__GPIO1_IO11 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_D18__GPIO3_IO18 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(WEAK_PULLDOWN), - MX6_PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_A17__GPIO2_IO21 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_A18__GPIO2_IO20 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_EB3__GPIO2_IO31 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_D17__GPIO3_IO17 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_SD2_DAT0__GPIO1_IO15 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_SD2_CMD__GPIO1_IO11 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_D18__GPIO3_IO18 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(WEAK_PULLDOWN) | + MUX_MODE_SION, + MX6_PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_A17__GPIO2_IO21 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_A18__GPIO2_IO20 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_EB3__GPIO2_IO31 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_D17__GPIO3_IO17 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_SD2_DAT0__GPIO1_IO15 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, /* GPIO */ - MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_ENET_REF_CLK__GPIO1_IO23 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_GPIO_7__GPIO1_IO07 | MUX_PAD_CTRL(WEAK_PULLUP), - MX6_PAD_GPIO_8__GPIO1_IO08 | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_ENET_REF_CLK__GPIO1_IO23 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_GPIO_7__GPIO1_IO07 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, + MX6_PAD_GPIO_8__GPIO1_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | + MUX_MODE_SION, /* USBH_OC */ MX6_PAD_EIM_D30__GPIO3_IO30 | MUX_PAD_CTRL(WEAK_PULLUP), /* USBC_ID */ @@ -249,8 +299,8 @@ static void setup_iomux_gpio(void) } iomux_v3_cfg_t const usb_pads[] = { - /* USB_PE */ - MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* USBH_PEN */ + MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL) | MUX_MODE_SION, # define GPIO_USBH_EN IMX_GPIO_NR(3, 31) }; @@ -292,6 +342,7 @@ int board_ehci_power(int port, int on) case 1: /* Control MXM USBH */ /* Set MXM USBH power enable, '0' means on */ + gpio_request(GPIO_USBH_EN, "USBH_EN"); gpio_direction_output(GPIO_USBH_EN, !on); mdelay(100); break; @@ -300,7 +351,7 @@ int board_ehci_power(int port, int on) } return 0; } -#endif +#endif /* CONFIG_USB_EHCI_MX6 */ #ifdef CONFIG_FSL_ESDHC /* use the following sequence: eMMC, MMC */ @@ -316,6 +367,7 @@ int board_mmc_getcd(struct mmc *mmc) switch (cfg->esdhc_base) { case USDHC1_BASE_ADDR: + gpio_request(GPIO_MMC_CD, "MMC_CD"); gpio_direction_input(GPIO_MMC_CD); ret = !gpio_get_value(GPIO_MMC_CD); break; @@ -356,7 +408,7 @@ int board_mmc_init(bd_t *bis) } return status; -#else +#else /* !CONFIG_SPL_BUILD */ struct src *psrc = (struct src *)SRC_BASE_ADDR; unsigned reg = readl(&psrc->sbmr1) >> 11; /* @@ -388,9 +440,9 @@ int board_mmc_init(bd_t *bis) } return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -#endif +#endif /* !CONFIG_SPL_BUILD */ } -#endif +#endif /* CONFIG_FSL_ESDHC */ int board_phy_config(struct phy_device *phydev) { @@ -412,6 +464,7 @@ int board_eth_init(bd_t *bis) ret = enable_fec_anatop_clock(0, ENET_50MHZ); if (ret) return ret; + /* set gpr1[ENET_CLK_SEL] */ setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK); @@ -421,6 +474,7 @@ int board_eth_init(bd_t *bis) bus = fec_get_miibus(base, -1); if (!bus) return 0; + /* scan PHY 1..7 */ phydev = phy_find_by_mask(bus, 0xff, PHY_INTERFACE_MODE_RMII); if (!phydev) { @@ -428,6 +482,7 @@ int board_eth_init(bd_t *bis) puts("no PHY found\n"); return 0; } + phy_reset(phydev); printf("using PHY at %d\n", phydev->addr); ret = fec_probe(bis, -1, base, bus, phydev); @@ -436,7 +491,8 @@ int board_eth_init(bd_t *bis) free(phydev); free(bus); } -#endif +#endif /* CONFIG_FEC_MXC */ + return 0; } @@ -452,11 +508,12 @@ static iomux_v3_cfg_t const pwr_intb_pads[] = { static iomux_v3_cfg_t const backlight_pads[] = { /* Backlight On */ - MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(NO_PAD_CTRL) | MUX_MODE_SION, #define RGB_BACKLIGHT_GP IMX_GPIO_NR(3, 26) /* Backlight PWM, used as GPIO in U-Boot */ MX6_PAD_EIM_A22__GPIO2_IO16 | MUX_PAD_CTRL(NO_PULLUP), - MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL) | + MUX_MODE_SION, #define RGB_BACKLIGHTPWM_GP IMX_GPIO_NR(2, 9) }; @@ -619,6 +676,8 @@ static void setup_display(void) imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); /* use 0 for EDT 7", use 1 for LG fullHD panel */ + gpio_request(RGB_BACKLIGHTPWM_GP, "PWM"); + gpio_request(RGB_BACKLIGHT_GP, "BL_ON"); gpio_direction_output(RGB_BACKLIGHTPWM_GP, 0); gpio_direction_output(RGB_BACKLIGHT_GP, 1); } @@ -1117,7 +1176,7 @@ void reset_cpu(ulong addr) { } -#endif +#endif /* CONFIG_SPL_BUILD */ static struct mxc_serial_platdata mxc_serial_plat = { .reg = (struct mxc_uart *)UART1_BASE, diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 47e05b0b26..27b85c61dc 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -50,6 +50,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri" CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DFU_MMC=y +CONFIG_DM_GPIO=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y From f7d5c8e7e00fb7bc977b65be44057cc0d1c15d0c Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:11 +0100 Subject: [PATCH 065/140] colibri_imx6: enable pin control driver Enable pin control driver as required for further driver model migration. Signed-off-by: Marcel Ziswiler --- configs/colibri_imx6_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 27b85c61dc..481d65329f 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -55,6 +55,8 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y From 6eea69bd90a0a967021ea78a667f990b5aa856b5 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:12 +0100 Subject: [PATCH 066/140] colibri_imx6: migrate i2c to using driver model Migrate I2C to using driver model. Signed-off-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 50 +-------------------- board/toradex/colibri_imx6/pf0100.c | 54 ++++++++++++----------- configs/colibri_imx6_defconfig | 1 + include/configs/colibri_imx6.h | 8 ++-- 4 files changed, 36 insertions(+), 77 deletions(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 0c2fa65cfe..0131d9a635 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -20,13 +20,11 @@ #include #include #include -#include #include #include #include #include #include -#include #include #include #include @@ -50,16 +48,6 @@ DECLARE_GLOBAL_DATA_PTR; #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) -#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - -#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) - #define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_SRE_SLOW) @@ -72,8 +60,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_HYS | PAD_CTL_SRE_SLOW) -#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) - #define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST) int dram_init(void) @@ -91,36 +77,7 @@ iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -/* Colibri I2C */ -struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | PC, - .gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | PC, - .gp = IMX_GPIO_NR(1, 3) - }, - .sda = { - .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | PC, - .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | PC, - .gp = IMX_GPIO_NR(1, 6) - } -}; - -/* Colibri local, PMIC, SGTL5000, STMPE811 */ -struct i2c_pads_info i2c_pad_info_loc = { - .scl = { - .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC, - .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC, - .gp = IMX_GPIO_NR(2, 30) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC, - .gp = IMX_GPIO_NR(3, 16) - } -}; - -/* Apalis MMC */ +/* Colibri MMC */ iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -715,9 +672,6 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info_loc); - #if defined(CONFIG_VIDEO_IPUV3) setup_display(); #endif @@ -1150,7 +1104,7 @@ void board_init_f(ulong dummy) ccgr_init(); gpr_init(); - /* iomux and setup of i2c */ + /* iomux */ board_early_init_f(); /* setup GP timer */ diff --git a/board/toradex/colibri_imx6/pf0100.c b/board/toradex/colibri_imx6/pf0100.c index fa63865670..5e411f1743 100644 --- a/board/toradex/colibri_imx6/pf0100.c +++ b/board/toradex/colibri_imx6/pf0100.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2014-2016, Toradex AG + * Copyright (C) 2014-2019, Toradex AG */ /* @@ -29,22 +29,25 @@ static __maybe_unused iomux_v3_cfg_t const pmic_prog_pads[] = { unsigned pmic_init(void) { + int rc; + struct udevice *dev = NULL; unsigned programmed = 0; uchar bus = 1; uchar devid, revid, val; puts("PMIC: "); - if (!((0 == i2c_set_bus_num(bus)) && - (0 == i2c_probe(PFUZE100_I2C_ADDR)))) { - puts("i2c bus failed\n"); + rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev); + if (rc) { + printf("failed to get device for PMIC at address 0x%x\n", + PFUZE100_I2C_ADDR); return 0; } /* get device ident */ - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_DEVICEID, &devid, 1) < 0) { puts("i2c pmic devid read failed\n"); return 0; } - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_REVID, 1, &revid, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_REVID, &revid, 1) < 0) { puts("i2c pmic revid read failed\n"); return 0; } @@ -52,14 +55,14 @@ unsigned pmic_init(void) #ifdef DEBUG { - unsigned i, j; + unsigned int i, j; for (i = 0; i < 16; i++) printf("\t%x", i); for (j = 0; j < 0x80; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { - i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); + dm_i2c_read(dev, j + i, &val, 1); printf("\t%2x", val); } j += 0x10; @@ -67,8 +70,7 @@ unsigned pmic_init(void) printf("\nEXT Page 1"); val = PFUZE100_PAGE_REGISTER_PAGE1; - if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, - &val, 1)) { + if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { puts("i2c write failed\n"); return 0; } @@ -76,7 +78,7 @@ unsigned pmic_init(void) for (j = 0x80; j < 0x100; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { - i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); + dm_i2c_read(dev, j + i, &val, 1); printf("\t%2x", val); } j += 0x10; @@ -84,8 +86,7 @@ unsigned pmic_init(void) printf("\nEXT Page 2"); val = PFUZE100_PAGE_REGISTER_PAGE2; - if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, - &val, 1)) { + if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { puts("i2c write failed\n"); return 0; } @@ -93,35 +94,36 @@ unsigned pmic_init(void) for (j = 0x80; j < 0x100; ) { printf("\n%2x", j); for (i = 0; i < 16; i++) { - i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1); + dm_i2c_read(dev, j + i, &val, 1); printf("\t%2x", val); } j += 0x10; } printf("\n"); } -#endif +#endif /* DEBUG */ + /* get device programmed state */ val = PFUZE100_PAGE_REGISTER_PAGE1; - if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) { + if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { puts("i2c write failed\n"); return 0; } - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR1, 1, &val, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return 0; } if (val & PFUZE100_FUSE_POR_M) programmed++; - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR2, 1, &val, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return programmed; } if (val & PFUZE100_FUSE_POR_M) programmed++; - if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR3, 1, &val, 1) < 0) { + if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) { puts("i2c fuse_por read failed\n"); return programmed; } @@ -146,6 +148,8 @@ unsigned pmic_init(void) #ifndef CONFIG_SPL_BUILD static int pf0100_prog(void) { + int rc; + struct udevice *dev = NULL; unsigned char bus = 1; unsigned char val; unsigned int i; @@ -159,9 +163,10 @@ static int pf0100_prog(void) ARRAY_SIZE(pmic_prog_pads)); gpio_direction_output(PMIC_PROG_VOLTAGE, 0); - if (!((0 == i2c_set_bus_num(bus)) && - (0 == i2c_probe(PFUZE100_I2C_ADDR)))) { - puts("i2c bus failed\n"); + rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev); + if (rc) { + printf("failed to get device for PMIC at address 0x%x\n", + PFUZE100_I2C_ADDR); return CMD_RET_FAILURE; } @@ -169,8 +174,7 @@ static int pf0100_prog(void) switch (pmic_otp_prog[i].cmd) { case pmic_i2c: val = (unsigned char) (pmic_otp_prog[i].value & 0xff); - if (i2c_write(PFUZE100_I2C_ADDR, pmic_otp_prog[i].reg, - 1, &val, 1)) { + if (dm_i2c_write(dev, pmic_otp_prog[i].reg, &val, 1)) { printf("i2c write failed, reg 0x%2x, value 0x%2x\n", pmic_otp_prog[i].reg, val); return CMD_RET_FAILURE; @@ -209,4 +213,4 @@ U_BOOT_CMD( "Program the OTP fuses on the PMIC PF0100", "" ); -#endif +#endif /* CONFIG_SPL_BUILD */ diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 481d65329f..dea6ca6270 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -51,6 +51,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DFU_MMC=y CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index f029a885d2..e51ec8516f 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -32,12 +32,12 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* I2C Configs */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_MXC_I2C3_SPEED 400000 /* OCOTP Configs */ #ifdef CONFIG_CMD_FUSE From 5e9d73967388a66e7418f4abcd21459984bdae7e Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:13 +0100 Subject: [PATCH 067/140] colibri_imx6: migrate pmic and regulator to using driver model Migrate PMIC and regulator to using driver model. Signed-off-by: Marcel Ziswiler --- configs/colibri_imx6_defconfig | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index dea6ca6270..6fd050a99f 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -45,6 +45,8 @@ CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri" CONFIG_ENV_IS_IN_MMC=y @@ -58,6 +60,11 @@ CONFIG_PHY_MICREL=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y From d141b75cbf628a1e16eeeda43b44bee1845b65bd Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:14 +0100 Subject: [PATCH 068/140] colibri_imx6: migrate mmc to using driver model Migrate MMC to using driver model. Signed-off-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 38 +++-------------------- configs/colibri_imx6_defconfig | 1 + 2 files changed, 5 insertions(+), 34 deletions(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 0131d9a635..1238474d7e 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -77,6 +77,7 @@ iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; +#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) /* Colibri MMC */ iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -103,6 +104,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; +#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ iomux_v3_cfg_t const enet_pads[] = { MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -310,7 +312,7 @@ int board_ehci_power(int port, int on) } #endif /* CONFIG_USB_EHCI_MX6 */ -#ifdef CONFIG_FSL_ESDHC +#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) /* use the following sequence: eMMC, MMC */ struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { {USDHC3_BASE_ADDR}, @@ -335,37 +337,6 @@ int board_mmc_getcd(struct mmc *mmc) int board_mmc_init(bd_t *bis) { -#ifndef CONFIG_SPL_BUILD - s32 status = 0; - u32 index = 0; - - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - - usdhc_cfg[0].max_bus_width = 8; - usdhc_cfg[1].max_bus_width = 4; - - for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { - switch (index) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); - break; - default: - printf("Warning: you configured more USDHC controllers (%d) then supported by the board (%d)\n", - index + 1, CONFIG_SYS_FSL_USDHC_NUM); - return status; - } - - status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); - } - - return status; -#else /* !CONFIG_SPL_BUILD */ struct src *psrc = (struct src *)SRC_BASE_ADDR; unsigned reg = readl(&psrc->sbmr1) >> 11; /* @@ -397,9 +368,8 @@ int board_mmc_init(bd_t *bis) } return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -#endif /* !CONFIG_SPL_BUILD */ } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ int board_phy_config(struct phy_device *phydev) { diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 6fd050a99f..2ab7db44a8 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -54,6 +54,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DFU_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y From 7b726c0942a5dee81e617b170a030a4e0f95f860 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 8 Feb 2019 18:42:15 +0100 Subject: [PATCH 069/140] colibri_imx6: migrate usb to using driver model Migrate USB to using driver model. Signed-off-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 23 +---------------------- configs/colibri_imx6_defconfig | 1 + 2 files changed, 2 insertions(+), 22 deletions(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 1238474d7e..aaffcf565f 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -289,28 +289,7 @@ int board_ehci_hcd_init(int port) imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); return 0; } - -int board_ehci_power(int port, int on) -{ - switch (port) { - case 0: - /* control OTG power */ - /* No special PE for USBC, always on when ID pin signals - host mode */ - break; - case 1: - /* Control MXM USBH */ - /* Set MXM USBH power enable, '0' means on */ - gpio_request(GPIO_USBH_EN, "USBH_EN"); - gpio_direction_output(GPIO_USBH_EN, !on); - mdelay(100); - break; - default: - break; - } - return 0; -} -#endif /* CONFIG_USB_EHCI_MX6 */ +#endif #if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) /* use the following sequence: eMMC, MMC */ diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 2ab7db44a8..df5a7be39f 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -68,6 +68,7 @@ CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Toradex" From 1ebb754b20402bef2b234e2fd45dd439974ad440 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:42:16 +0100 Subject: [PATCH 070/140] colibri_imx6: drop CONFIG_OF_SYSTEM_SETUP This doesn't do anything anymore, probably never did. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 7 ------- include/configs/colibri_imx6.h | 2 -- 2 files changed, 9 deletions(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index aaffcf565f..0802b0fade 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -655,13 +655,6 @@ int board_late_init(void) } #endif /* CONFIG_BOARD_LATE_INIT */ -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_SYSTEM_SETUP) -int ft_system_setup(void *blob, bd_t *bd) -{ - return 0; -} -#endif - int checkboard(void) { char it[] = " IT"; diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index e51ec8516f..c782b2924c 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -237,8 +237,6 @@ #define CONFIG_SYS_MMC_ENV_PART 1 #endif -#define CONFIG_OF_SYSTEM_SETUP - #define CONFIG_CMD_TIME #endif /* __CONFIG_H */ From 2910c0a135ecc0dcaae02503cda949376e767f8e Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:42:17 +0100 Subject: [PATCH 071/140] colibri_imx6: print also 64-bit IT Print also for Colibri iMX6 512MB IT with 64-bit RAM bus. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 0802b0fade..f775e788b0 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -1028,6 +1028,7 @@ static void spl_dram_init(void) case TEMP_AUTOMOTIVE: default: if (is_cpu_type(MXC_CPU_MX6DL)) { + puts("Industrial temperature grade DDR3 timings, 64bit bus width.\n"); ddr_init(mx6dl_dcd_table, ARRAY_SIZE(mx6dl_dcd_table)); } else { puts("Industrial temperature grade DDR3 timings, 32bit bus width.\n"); From e85a536ca41f77b9d06e8a2eb703e63fb01b3f4c Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 8 Feb 2019 18:42:18 +0100 Subject: [PATCH 072/140] colibri_imx6: add distroboot support Add support for distro boot. This is especially helpful for external devices. There is a global boot command which scans a predefined list of boot targets: run distro_bootcmd As well as direct boot commands such as: run bootcmd_mmc1 run bootcmd_usb run bootcmd_dhcp ... Refer to doc/README.distro fo details. While at it, remove the CONFIG_DRIVE_TYPES define which has not been used and was meant to be used for multi device boot support which is now provided by distroboot. Signed-off-by: Stefan Agner Acked-by: Max Krummenacher Acked-by: Marcel Ziswiler --- include/configs/colibri_imx6.h | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index c782b2924c..77f884f341 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -100,14 +100,18 @@ #define CONFIG_LOADADDR 0x12000000 -#ifdef CONFIG_CMD_MMC -#define CONFIG_DRIVE_MMC "mmc " +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) +#include +#undef BOOTENV_RUN_NET_USB_START +#define BOOTENV_RUN_NET_USB_START "" #else -#define CONFIG_DRIVE_MMC +#define BOOTENV #endif -#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC - #define DFU_ALT_EMMC_INFO \ "u-boot.imx raw 0x2 0x3ff mmcpart 0;" \ "boot part 0 1;" \ @@ -134,7 +138,9 @@ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "kernel_addr_r=0x11000000\0" \ - "ramdisk_addr_r=0x12100000\0" + "pxefile_addr_r=0x17100000\0" \ + "ramdisk_addr_r=0x12100000\0" \ + "scriptaddr=0x17000000\0" #define NFS_BOOTCMD \ "nfsargs=ip=:::::eth0:on root=/dev/nfs rw\0" \ @@ -171,9 +177,10 @@ #define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ + BOOTENV \ "bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \ - "run nfsboot ; echo ; echo nfsboot failed ; " \ - "usb start ;" \ + "run distro_bootcmd ; " \ + "usb start ; " \ "setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \ "boot_file=uImage\0" \ "console=ttymxc0\0" \ From eaa50e08be6a35c03af9d22223177b99f2b4bb28 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:42:19 +0100 Subject: [PATCH 073/140] colibri_imx6: unify sd/mmc drive strenght with linux kernel settings In the linux device tree we use 40Ohm drive strenght. So use the same value in U-Boot. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 24 +++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index f775e788b0..8425189142 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -42,6 +42,10 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SRE_FAST | PAD_CTL_HYS) #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_EMMC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) @@ -92,16 +96,16 @@ iomux_v3_cfg_t const usdhc1_pads[] = { /* eMMC */ iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; #endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ From c508d22abbf0bcf2ee0fe649810ed62dcb58acaa Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:42:20 +0100 Subject: [PATCH 074/140] colibri imx6: pf0100: reorder and cleanup message printing Keep debug code at the end of the function. Use a one line informational message for the PMIC only. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/pf0100.c | 82 ++++++++++++++--------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/board/toradex/colibri_imx6/pf0100.c b/board/toradex/colibri_imx6/pf0100.c index 5e411f1743..09c3cc950a 100644 --- a/board/toradex/colibri_imx6/pf0100.c +++ b/board/toradex/colibri_imx6/pf0100.c @@ -35,7 +35,7 @@ unsigned pmic_init(void) uchar bus = 1; uchar devid, revid, val; - puts("PMIC: "); + puts("PMIC: "); rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev); if (rc) { printf("failed to get device for PMIC at address 0x%x\n", @@ -51,7 +51,46 @@ unsigned pmic_init(void) puts("i2c pmic revid read failed\n"); return 0; } - printf("device id: 0x%.2x, revision id: 0x%.2x\n", devid, revid); + printf("device id: 0x%.2x, revision id: 0x%.2x, ", devid, revid); + + /* get device programmed state */ + val = PFUZE100_PAGE_REGISTER_PAGE1; + if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { + puts("i2c write failed\n"); + return 0; + } + if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) { + puts("i2c fuse_por read failed\n"); + return 0; + } + if (val & PFUZE100_FUSE_POR_M) + programmed++; + + if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) { + puts("i2c fuse_por read failed\n"); + return programmed; + } + if (val & PFUZE100_FUSE_POR_M) + programmed++; + + if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) { + puts("i2c fuse_por read failed\n"); + return programmed; + } + if (val & PFUZE100_FUSE_POR_M) + programmed++; + + switch (programmed) { + case 0: + puts("not programmed\n"); + break; + case 3: + puts("programmed\n"); + break; + default: + puts("undefined programming state\n"); + break; + } #ifdef DEBUG { @@ -103,45 +142,6 @@ unsigned pmic_init(void) } #endif /* DEBUG */ - /* get device programmed state */ - val = PFUZE100_PAGE_REGISTER_PAGE1; - if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) { - puts("i2c write failed\n"); - return 0; - } - if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) { - puts("i2c fuse_por read failed\n"); - return 0; - } - if (val & PFUZE100_FUSE_POR_M) - programmed++; - - if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) { - puts("i2c fuse_por read failed\n"); - return programmed; - } - if (val & PFUZE100_FUSE_POR_M) - programmed++; - - if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) { - puts("i2c fuse_por read failed\n"); - return programmed; - } - if (val & PFUZE100_FUSE_POR_M) - programmed++; - - switch (programmed) { - case 0: - printf("PMIC: not programmed\n"); - break; - case 3: - printf("PMIC: programmed\n"); - break; - default: - printf("PMIC: undefined programming state\n"); - break; - } - return programmed; } From 08621424ce3b8ce99c22df4b2b4a13ce89fa40a1 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:42:21 +0100 Subject: [PATCH 075/140] colibri imx6: disable ri and dcd irq in uarts If the UART is used in DTE mode the RI and DCD bits in UCR3 become irq enable bits. Both are set to enabled after reset and both likely are pending. Disable the bits also on UARTs not used in the boot loader to prevent an interrupt storm when Linux enables the UART interrupts. Signed-off-by: Max Krummenacher Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 8425189142..efb6b925af 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -271,14 +271,21 @@ iomux_v3_cfg_t const usb_pads[] = { * UARTs are used in DTE mode, switch the mode on all UARTs before * any pinmuxing connects a (DCE) output to a transceiver output. */ +#define UCR3 0x88 /* FIFO Control Register */ +#define UCR3_RI BIT(8) /* RIDELT DTE mode */ +#define UCR3_DCD BIT(9) /* DCDDELT DTE mode */ #define UFCR 0x90 /* FIFO Control Register */ -#define UFCR_DCEDTE (1<<6) /* DCE=0 */ +#define UFCR_DCEDTE BIT(6) /* DCE=0 */ static void setup_dtemode_uart(void) { setbits_le32((u32 *)(UART1_BASE + UFCR), UFCR_DCEDTE); setbits_le32((u32 *)(UART2_BASE + UFCR), UFCR_DCEDTE); setbits_le32((u32 *)(UART3_BASE + UFCR), UFCR_DCEDTE); + + clrbits_le32((u32 *)(UART1_BASE + UCR3), UCR3_DCD | UCR3_RI); + clrbits_le32((u32 *)(UART2_BASE + UCR3), UCR3_DCD | UCR3_RI); + clrbits_le32((u32 *)(UART3_BASE + UCR3), UCR3_DCD | UCR3_RI); } static void setup_iomux_uart(void) From cbcdf4da820cc091a1e568e4dcefa95c345f9db1 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:42:22 +0100 Subject: [PATCH 076/140] colibri_imx6: change pmic fusing according to hw 1.1 requirements Colibri iMX6 V1.1 HW can use the PMIC GEN3 to power the NVCC_SD1. Change the settings fused into the PMIC's OTP to powerup with GEN3 set to output 3.3V. Signed-off-by: Max Krummenacher Acked-by: Stefan Agner Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/pf0100_otp.inc | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/board/toradex/colibri_imx6/pf0100_otp.inc b/board/toradex/colibri_imx6/pf0100_otp.inc index ce29b95ae2..c3b1f67f81 100644 --- a/board/toradex/colibri_imx6/pf0100_otp.inc +++ b/board/toradex/colibri_imx6/pf0100_otp.inc @@ -5,16 +5,17 @@ // Register Output for PF0100 programmer // Customer: Toradex AG -// Program: Colibri iMX6 +// Program: Colibri iMX6 V1.1 // Sample marking: -// Date: 24.07.2015 -// Time: 10:52:58 +// Date: 01.05.2017 +// Time: 16:22:32 // Generated from Spreadsheet Revision: P1.8 -/* sed commands to get from programmer script to struct */ +/* sed commands to get from programmer script to struct content */ /* sed -e 's/^WRITE_I2C:\(..\):\(..\)/\{pmic_i2c, 0x\1, 0x\2\},/g' -e 's/^DELAY:\([0-9]*\)/\{pmic_delay, 0, \1\},/g' pf0100_otp_Colibri_iMX6.txt > pf0100_otp.inc sed -i -e 's/^VPGM:ON/\{pmic_vpgm, 0, 1},/g' -e 's/^VPGM:OFF/\{pmic_vpgm, 0, 0},/g' pf0100_otp.inc - sed -i -e 's/^PWRON: HIGH/\{pmic_pwr, 0, 1},/g' -e 's/^PWRON:LOW/\{pmic_pwr, 0, 0},/g' pf0100_otp.inc */ + sed -i -e 's/^PWRON: HIGH/\{pmic_pwr, 0, 1},/g' -e 's/^PWRON:LOW/\{pmic_pwr, 0, 0},/g' pf0100_otp.inc +*/ enum { pmic_i2c, pmic_delay, pmic_vpgm, pmic_pwr }; struct pmic_otp_prog_t{ @@ -47,7 +48,8 @@ struct pmic_otp_prog_t pmic_otp_prog[] = { {pmic_i2c, 0xC8, 0x0E}, // Auto gen from Row134 {pmic_i2c, 0xCC, 0x0E}, // Auto gen from Row138 {pmic_i2c, 0xCD, 0x05}, // Auto gen from Row139 -{pmic_i2c, 0xD0, 0x0C}, // Auto gen from Row142 +{pmic_i2c, 0xD0, 0x0F}, // Auto gen from Row142 +{pmic_i2c, 0xD1, 0x05}, // Auto gen from Row143 {pmic_i2c, 0xD5, 0x07}, // Auto gen from Row147 {pmic_i2c, 0xD8, 0x07}, // Auto gen from Row150 {pmic_i2c, 0xD9, 0x06}, // Auto gen from Row151 @@ -185,4 +187,4 @@ struct pmic_otp_prog_t pmic_otp_prog[] = { {pmic_delay, 0, 500}, {pmic_pwr, 0, 1}, #endif -}; \ No newline at end of file +}; From 6218d4bdce1f928bbe58c32b4d560a962228a9d0 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Fri, 8 Feb 2019 18:42:23 +0100 Subject: [PATCH 077/140] colibri_imx6: revert fuse value set in mfgr_fuse We have two commands to change the bootmode fuses: mfgr_fuse which set fuse 0/5 and 0/6 and updt_fuse which burns bit 4 of 0/5. Before Image 2.6 we fused in mfgr_fuse 0x5062, which boots from the user partition of the eMMC. To workaround certain hangs we moved to fastboot mode and using the first bootpartition of the eMMC requiring a fuse value of 0x5072 which could be achived by the then added updt_fuse command. At the same time the mfgr_fuse command was changed to also fuse 0x5072, revert that second change so that one can fuse both values, one with just mfgr_fuse and the later with mfgr_fuse;updt_fuse. Note that the mfgr_fuse command is only needed at module production time, a customer might need to use updt_fuse when upgrading an older module to be compatible with a newer image. The command is integrated into the image update scripts. Signed-off-by: Max Krummenacher Acked-by: Stefan Agner Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/do_fuse.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/toradex/colibri_imx6/do_fuse.c b/board/toradex/colibri_imx6/do_fuse.c index e6793e366a..22d191f52a 100644 --- a/board/toradex/colibri_imx6/do_fuse.c +++ b/board/toradex/colibri_imx6/do_fuse.c @@ -29,7 +29,7 @@ static int mfgr_fuse(void) return CMD_RET_FAILURE; } /* boot cfg */ - fuse_prog(0, 5, 0x00005072); + fuse_prog(0, 5, 0x00005062); /* BT_FUSE_SEL */ fuse_prog(0, 6, 0x00000010); return CMD_RET_SUCCESS; From bee73083a4f131ac585eb57ac9ae496f32c10de2 Mon Sep 17 00:00:00 2001 From: Bhuvanchandra DV Date: Fri, 8 Feb 2019 18:42:24 +0100 Subject: [PATCH 078/140] toradex: colibri_imx6: overwrite CMA memory set in device tree Make sure CMA memory is not greater than 50% of available physical memory. Allow user to change the CMA memory via 'cma-size' U-Boot environment variable. Signed-off-by: Bhuvanchandra DV Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index efb6b925af..35adff1d00 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -688,7 +689,18 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, bd_t *bd) { - return ft_common_board_setup(blob, bd); + u32 cma_size; + + ft_common_board_setup(blob, bd); + + cma_size = getenv_ulong("cma-size", 10, 320 * 1024 * 1024); + cma_size = min((u32)(gd->ram_size >> 1), cma_size); + + fdt_setprop_u32(blob, + fdt_path_offset(blob, "/reserved-memory/linux,cma"), + "size", + cma_size); + return 0; } #endif From 2921582c89d3978ce8e7a9a55f74550d15949c68 Mon Sep 17 00:00:00 2001 From: Sanchayan Maity Date: Fri, 8 Feb 2019 18:42:25 +0100 Subject: [PATCH 079/140] configs: colibri_imx6: Use ext4 file system by default Use ext4 file system by default. Signed-off-by: Sanchayan Maity Acked-by: Max Krummenacher Acked-by: Marcel Ziswiler --- include/configs/colibri_imx6.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 77f884f341..6e056aab31 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -121,7 +121,7 @@ "imx6q-colibri-cam-eval-v3.dtb fat 0 1" #define EMMC_BOOTCMD \ - "emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext3 " \ + "emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext4 " \ "rootwait\0" \ "emmcboot=run setup; " \ "setenv bootargs ${defargs} ${emmcargs} ${setupargs} " \ @@ -153,7 +153,7 @@ "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" #define SD_BOOTCMD \ - "sdargs=ip=off root=/dev/mmcblk1p2 rw,noatime rootfstype=ext3 " \ + "sdargs=ip=off root=/dev/mmcblk1p2 rw,noatime rootfstype=ext4 " \ "rootwait\0" \ "sdboot=run setup; " \ "setenv bootargs ${defargs} ${sdargs} ${setupargs} " \ @@ -165,7 +165,7 @@ "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" #define USB_BOOTCMD \ - "usbargs=ip=off root=/dev/sda2 rw,noatime rootfstype=ext3 " \ + "usbargs=ip=off root=/dev/sda2 rw,noatime rootfstype=ext4 " \ "rootwait\0" \ "usbboot=run setup; setenv bootargs ${defargs} ${setupargs} " \ "${usbargs} ${vidargs}; echo Booting from USB stick...; " \ From 52084bfc8027902e540433be8dea2ce64c8c9f7d Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 8 Feb 2019 18:42:26 +0100 Subject: [PATCH 080/140] colibri_imx6: use SDP if USB serial downloader has been used In case USB serial downloader has been used to load U-Boot start the serial download protocol (SDP) emulation. This allows to download complete images such as Toradex Easy Installer over USB SDP as well. This code uses the boot ROM provided boot information to reliably detect USB serial downloader. Signed-off-by: Stefan Agner Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 35adff1d00..bdc7769d9e 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -663,6 +663,14 @@ int board_late_init(void) env_set("board_rev", env_str); #endif +#ifdef CONFIG_CMD_USB_SDP + if (is_boot_from_usb()) { + printf("Serial Downloader recovery mode, using sdp command\n"); + env_set("bootdelay", "0"); + env_set("bootcmd", "sdp 0"); + } +#endif /* CONFIG_CMD_USB_SDP */ + return 0; } #endif /* CONFIG_BOARD_LATE_INIT */ @@ -693,7 +701,7 @@ int ft_board_setup(void *blob, bd_t *bd) ft_common_board_setup(blob, bd); - cma_size = getenv_ulong("cma-size", 10, 320 * 1024 * 1024); + cma_size = env_get_ulong("cma-size", 10, 320 * 1024 * 1024); cma_size = min((u32)(gd->ram_size >> 1), cma_size); fdt_setprop_u32(blob, From 84b2ee3abd247988228e3b32b2ac6a9d857ef0d0 Mon Sep 17 00:00:00 2001 From: Bhuvanchandra DV Date: Fri, 8 Feb 2019 18:42:27 +0100 Subject: [PATCH 081/140] colibri_imx6: switch to zimage Switch to the generic compressed Kernel image type (zImage) instead of the U-Boot specific uImage format. While at it also fix device tree naming for MMC DFU. Signed-off-by: Bhuvanchandra DV Acked-by: Marcel Ziswiler --- include/configs/colibri_imx6.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 6e056aab31..a6a823ee1f 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -108,17 +108,17 @@ #include #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START "" -#else +#else /* CONFIG_SPL_BUILD */ #define BOOTENV -#endif +#endif /* CONFIG_SPL_BUILD */ #define DFU_ALT_EMMC_INFO \ "u-boot.imx raw 0x2 0x3ff mmcpart 0;" \ "boot part 0 1;" \ "rootfs part 0 2;" \ - "uImage fat 0 1;" \ - "imx6q-colibri-eval-v3.dtb fat 0 1;" \ - "imx6q-colibri-cam-eval-v3.dtb fat 0 1" + "zImage fat 0 1;" \ + "imx6dl-colibri-eval-v3.dtb fat 0 1;" \ + "imx6dl-colibri-cam-eval-v3.dtb fat 0 1" #define EMMC_BOOTCMD \ "emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext4 " \ @@ -128,7 +128,7 @@ "${vidargs}; echo Booting from internal eMMC chip...; " \ "run emmcdtbload; load mmc 0:1 ${kernel_addr_r} " \ "${boot_file} && run fdt_fixup && " \ - "bootm ${kernel_addr_r} ${dtbparam}\0" \ + "bootz ${kernel_addr_r} ${dtbparam}\0" \ "emmcdtbload=setenv dtbparam; load mmc 0:1 ${fdt_addr_r} " \ "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" @@ -148,11 +148,11 @@ "setenv bootargs ${defargs} ${nfsargs} ${setupargs} " \ "${vidargs}; echo Booting via DHCP/TFTP/NFS...; " \ "run nfsdtbload; dhcp ${kernel_addr_r} " \ - "&& run fdt_fixup && bootm ${kernel_addr_r} ${dtbparam}\0" \ + "&& run fdt_fixup && bootz ${kernel_addr_r} ${dtbparam}\0" \ "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} ${fdt_file} " \ "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" -#define SD_BOOTCMD \ +#define SD_BOOTCMD \ "sdargs=ip=off root=/dev/mmcblk1p2 rw,noatime rootfstype=ext4 " \ "rootwait\0" \ "sdboot=run setup; " \ @@ -160,7 +160,7 @@ "${vidargs}; echo Booting from SD card; " \ "run sddtbload; load mmc 1:1 ${kernel_addr_r} " \ "${boot_file} && run fdt_fixup && " \ - "bootm ${kernel_addr_r} ${dtbparam}\0" \ + "bootz ${kernel_addr_r} ${dtbparam}\0" \ "sddtbload=setenv dtbparam; load mmc 1:1 ${fdt_addr_r} " \ "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" @@ -171,7 +171,7 @@ "${usbargs} ${vidargs}; echo Booting from USB stick...; " \ "usb start && run usbdtbload; load usb 0:1 ${kernel_addr_r} " \ "${boot_file} && run fdt_fixup && " \ - "bootm ${kernel_addr_r} ${dtbparam}\0" \ + "bootz ${kernel_addr_r} ${dtbparam}\0" \ "usbdtbload=setenv dtbparam; load usb 0:1 ${fdt_addr_r} " \ "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" @@ -182,7 +182,7 @@ "run distro_bootcmd ; " \ "usb start ; " \ "setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \ - "boot_file=uImage\0" \ + "boot_file=zImage\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \ "dfu_alt_info=" DFU_ALT_EMMC_INFO "\0" \ From 82029bf5b321278783408aef597863dcf54195c3 Mon Sep 17 00:00:00 2001 From: Gerard Salvatella Date: Fri, 8 Feb 2019 18:42:28 +0100 Subject: [PATCH 082/140] colibri_imx6: added nreset gpio on reboot RGMII_RD1 pin (active high, GPIO6_IO27) is triggered on reboot during the SPL phase. This asserts (active low) nReset_Out from the PMIC. Only V1.1 and later Colibri iMX6 modules implement this in hw. Previous versions do not use this pin, so it is safe to leave it enabled at all times. Signed-off-by: Gerard Salvatella Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/colibri_imx6.c | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index bdc7769d9e..c634e3243d 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -30,6 +30,7 @@ #include #include #include +#include #include "../common/tdx-cfg-block.h" #ifdef CONFIG_TDX_CMD_IMX_MFGR @@ -1070,6 +1071,26 @@ static void spl_dram_init(void) udelay(100); } +static iomux_v3_cfg_t const gpio_reset_pad[] = { + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL) | + MUX_MODE_SION +#define GPIO_NRESET IMX_GPIO_NR(6, 27) +}; + +#define IMX_RESET_CAUSE_POR 0x00011 +static void nreset_out(void) +{ + int reset_cause = get_imx_reset_cause(); + + if (reset_cause != IMX_RESET_CAUSE_POR) { + imx_iomux_v3_setup_multiple_pads(gpio_reset_pad, + ARRAY_SIZE(gpio_reset_pad)); + gpio_direction_output(GPIO_NRESET, 1); + udelay(100); + gpio_direction_output(GPIO_NRESET, 0); + } +} + void board_init_f(ulong dummy) { /* setup AIPS and disable watchdog */ @@ -1096,6 +1117,9 @@ void board_init_f(ulong dummy) /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); + /* Assert nReset_Out */ + nreset_out(); + /* load/boot image from boot device */ board_init_r(NULL, 0); } From b87ca9907ca28d4472fff4bd8562f6f6ae000330 Mon Sep 17 00:00:00 2001 From: Gerard Salvatella Date: Fri, 8 Feb 2019 18:42:29 +0100 Subject: [PATCH 083/140] board: colibri_imx6: check for and report ecc errors in fuses The PMIC on the Colibri iMX6 may have ECC errors in fuses that will prevent correct settings. Up to one bit error per fuse bank can be reported and corrected by the ECC logic. Two bit errors can only be reported. Signed-off-by: Gerard Salvatella Acked-by: Marcel Ziswiler --- board/toradex/colibri_imx6/pf0100.c | 51 +++++++++++++++++++++++++ board/toradex/colibri_imx6/pf0100.h | 59 ++++++++++++++++++++++++++++- 2 files changed, 108 insertions(+), 2 deletions(-) diff --git a/board/toradex/colibri_imx6/pf0100.c b/board/toradex/colibri_imx6/pf0100.c index 09c3cc950a..e744243297 100644 --- a/board/toradex/colibri_imx6/pf0100.c +++ b/board/toradex/colibri_imx6/pf0100.c @@ -21,6 +21,8 @@ /* define for PMIC register dump */ /*#define DEBUG */ +#define WARNBAR "@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\n" + /* use GPIO: EXT_IO1 to switch on VPGM, ON: 1 */ static __maybe_unused iomux_v3_cfg_t const pmic_prog_pads[] = { MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -42,6 +44,55 @@ unsigned pmic_init(void) PFUZE100_I2C_ADDR); return 0; } + + /* check for errors in PMIC fuses */ + if (dm_i2c_read(dev, PFUZE100_INTSTAT3, &val, 1) < 0) { + puts("i2c pmic INTSTAT3 register read failed\n"); + return 0; + } + if (val & PFUZE100_BIT_OTP_ECCI) { + puts("\n" WARNBAR); + puts("WARNING: ecc errors found in pmic fuse banks\n"); + puts(WARNBAR); + } + if (dm_i2c_read(dev, PFUZE100_OTP_ECC_SE1, &val, 1) < 0) { + puts("i2c pmic ECC_SE1 register read failed\n"); + return 0; + } + if (val & PFUZE100_BITS_ECC_SE1) { + puts(WARNBAR); + puts("WARNING: ecc has made bit corrections in banks 1 to 5\n"); + puts(WARNBAR); + } + if (dm_i2c_read(dev, PFUZE100_OTP_ECC_SE2, &val, 1) < 0) { + puts("i2c pmic ECC_SE2 register read failed\n"); + return 0; + } + if (val & PFUZE100_BITS_ECC_SE2) { + puts(WARNBAR); + puts("WARNING: ecc has made bit corrections in banks 6 to 10\n" + ); + puts(WARNBAR); + } + if (dm_i2c_read(dev, PFUZE100_OTP_ECC_DE1, &val, 1) < 0) { + puts("i2c pmic ECC_DE register read failed\n"); + return 0; + } + if (val & PFUZE100_BITS_ECC_DE1) { + puts(WARNBAR); + puts("ERROR: banks 1 to 5 have uncorrectable bits\n"); + puts(WARNBAR); + } + if (dm_i2c_read(dev, PFUZE100_OTP_ECC_DE2, &val, 1) < 0) { + puts("i2c pmic ECC_DE register read failed\n"); + return 0; + } + if (val & PFUZE100_BITS_ECC_DE2) { + puts(WARNBAR); + puts("ERROR: banks 6 to 10 have uncorrectable bits\n"); + puts(WARNBAR); + } + /* get device ident */ if (dm_i2c_read(dev, PFUZE100_DEVICEID, &devid, 1) < 0) { puts("i2c pmic devid read failed\n"); diff --git a/board/toradex/colibri_imx6/pf0100.h b/board/toradex/colibri_imx6/pf0100.h index c0efb79bbc..9257620511 100644 --- a/board/toradex/colibri_imx6/pf0100.h +++ b/board/toradex/colibri_imx6/pf0100.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2014-2016, Toradex AG + * Copyright (C) 2014-2019, Toradex AG */ /* @@ -10,11 +10,23 @@ #ifndef PF0100_H_ #define PF0100_H_ +/* bit definitions */ +#define PFUZE100_BIT_0 (0x01 << 0) +#define PFUZE100_BIT_1 (0x01 << 1) +#define PFUZE100_BIT_2 (0x01 << 2) +#define PFUZE100_BIT_3 (0x01 << 3) +#define PFUZE100_BIT_4 (0x01 << 4) +#define PFUZE100_BIT_5 (0x01 << 5) +#define PFUZE100_BIT_6 (0x01 << 6) +#define PFUZE100_BIT_7 (0x01 << 7) + /* 7-bit I2C bus slave address */ #define PFUZE100_I2C_ADDR (0x08) /* Register Addresses */ #define PFUZE100_DEVICEID (0x0) #define PFUZE100_REVID (0x3) +#define PFUZE100_INTSTAT3 (0xe) +#define PFUZE100_BIT_OTP_ECCI PFUZE100_BIT_7 #define PFUZE100_SW1AMODE (0x23) #define PFUZE100_SW1ACON 36 #define PFUZE100_SW1ACON_SPEED_VAL (0x1<<6) /*default */ @@ -39,12 +51,55 @@ #define PFUZE100_PAGE_REGISTER_PAGE2 (0x02 & PFUZE100_PAGE_REGISTER_PAGE_M) /* extended page 1 */ +#define PFUZE100_OTP_ECC_SE1 0x8a +#define PFUZE100_BIT_ECC1_SE PFUZE100_BIT_0 +#define PFUZE100_BIT_ECC2_SE PFUZE100_BIT_1 +#define PFUZE100_BIT_ECC3_SE PFUZE100_BIT_2 +#define PFUZE100_BIT_ECC4_SE PFUZE100_BIT_3 +#define PFUZE100_BIT_ECC5_SE PFUZE100_BIT_4 +#define PFUZE100_BITS_ECC_SE1 ((PFUZE100_BIT_ECC1_SE) | \ + (PFUZE100_BIT_ECC2_SE) | \ + (PFUZE100_BIT_ECC3_SE) | \ + (PFUZE100_BIT_ECC4_SE) | \ + (PFUZE100_BIT_ECC5_SE)) +#define PFUZE100_OTP_ECC_SE2 0x8b +#define PFUZE100_BIT_ECC6_SE PFUZE100_BIT_0 +#define PFUZE100_BIT_ECC7_SE PFUZE100_BIT_1 +#define PFUZE100_BIT_ECC8_SE PFUZE100_BIT_2 +#define PFUZE100_BIT_ECC9_SE PFUZE100_BIT_3 +#define PFUZE100_BIT_ECC10_SE PFUZE100_BIT_4 +#define PFUZE100_BITS_ECC_SE2 ((PFUZE100_BIT_ECC6_SE) | \ + (PFUZE100_BIT_ECC7_SE) | \ + (PFUZE100_BIT_ECC8_SE) | \ + (PFUZE100_BIT_ECC9_SE) | \ + (PFUZE100_BIT_ECC10_SE)) +#define PFUZE100_OTP_ECC_DE1 0x8c +#define PFUZE100_BIT_ECC1_DE PFUZE100_BIT_0 +#define PFUZE100_BIT_ECC2_DE PFUZE100_BIT_1 +#define PFUZE100_BIT_ECC3_DE PFUZE100_BIT_2 +#define PFUZE100_BIT_ECC4_DE PFUZE100_BIT_3 +#define PFUZE100_BIT_ECC5_DE PFUZE100_BIT_4 +#define PFUZE100_BITS_ECC_DE1 ((PFUZE100_BIT_ECC1_DE) | \ + (PFUZE100_BIT_ECC2_DE) | \ + (PFUZE100_BIT_ECC3_DE) | \ + (PFUZE100_BIT_ECC4_DE) | \ + (PFUZE100_BIT_ECC5_DE)) +#define PFUZE100_OTP_ECC_DE2 0x8d +#define PFUZE100_BIT_ECC6_DE PFUZE100_BIT_0 +#define PFUZE100_BIT_ECC7_DE PFUZE100_BIT_1 +#define PFUZE100_BIT_ECC8_DE PFUZE100_BIT_2 +#define PFUZE100_BIT_ECC9_DE PFUZE100_BIT_3 +#define PFUZE100_BIT_ECC10_DE PFUZE100_BIT_4 +#define PFUZE100_BITS_ECC_DE2 ((PFUZE100_BIT_ECC6_DE) | \ + (PFUZE100_BIT_ECC7_DE) | \ + (PFUZE100_BIT_ECC8_DE) | \ + (PFUZE100_BIT_ECC9_DE) | \ + (PFUZE100_BIT_ECC10_DE)) #define PFUZE100_FUSE_POR1 0xe4 #define PFUZE100_FUSE_POR2 0xe5 #define PFUZE100_FUSE_POR3 0xe6 #define PFUZE100_FUSE_POR_M (0x1 << 1) - /* output some informational messages, return the number FUSE_POR=1 */ /* i.e. 0: unprogrammed, 3: programmed, other: undefined prog. state */ unsigned pmic_init(void); From 1edd85069965d2b9ab1877b798f2d186584e9ba3 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:10:53 +0100 Subject: [PATCH 084/140] board: tbs2910: Remove efi loader support in defconfig to reduce u-boot size Signed-off-by: Soeren Moch --- configs/tbs2910_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 78beb9a522..70a3e18e23 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -56,3 +56,4 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_VIDEO=y CONFIG_OF_LIBFDT=y +# CONFIG_EFI_LOADER is not set From b184dc077a4f2540a1342cdfd62613b5a2169a14 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:10:54 +0100 Subject: [PATCH 085/140] board: tbs2910: Add device tree ... as preparation for additional driver model coonversions. We use CONFIG_OF_EMBED here to keep u-boot.imx as final binary name. So we maintain compatibility with the original TBS u-boot and available HOWTOs for u-boot updates. Signed-off-by: Soeren Moch --- arch/arm/dts/imx6q-tbs2910.dts | 394 +++++++++++++++++++++++++++++++++ board/tbs/tbs2910/MAINTAINERS | 1 + board/tbs/tbs2910/tbs2910.c | 6 - configs/tbs2910_defconfig | 4 +- 4 files changed, 398 insertions(+), 7 deletions(-) create mode 100644 arch/arm/dts/imx6q-tbs2910.dts diff --git a/arch/arm/dts/imx6q-tbs2910.dts b/arch/arm/dts/imx6q-tbs2910.dts new file mode 100644 index 0000000000..21e62c0cab --- /dev/null +++ b/arch/arm/dts/imx6q-tbs2910.dts @@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// +// Copyright 2014-2019 Soeren Moch + +/dts-v1/; + +#include "imx6q.dtsi" +#include +#include + +/ { + model = "TBS2910 Matrix ARM mini PC"; + compatible = "tbs,imx6q-tbs2910", "fsl,imx6q"; + + chosen { + stdout-path = &uart1; + }; + + aliases { + mmc0 = &usdhc2; + mmc1 = &usdhc3; + mmc2 = &usdhc4; + usb0 = &usbotg; + }; + + memory@10000000 { + reg = <0x10000000 0x80000000>; + }; + + fan { + compatible = "gpio-fan"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_fan>; + gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = <0 0 + 3000 1>; + }; + + ir_recv { + compatible = "gpio-ir-receiver"; + gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ir>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + blue { + label = "blue_status_led"; + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + }; + + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_5p0v: regulator-5p0v { + compatible = "regulator-fixed"; + regulator-name = "5P0V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + sound-sgtl5000 { + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + compatible = "fsl,imx-audio-sgtl5000"; + model = "On-board Codec"; + mux-ext-port = <3>; + mux-int-port = <1>; + ssi-controller = <&ssi1>; + }; + + sound-spdif { + compatible = "fsl,imx-audio-spdif"; + model = "On-board SPDIF"; + spdif-controller = <&spdif>; + spdif-out; + }; +}; + +&audmux { + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&hdmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + sgtl5000: sgtl5000@a { + clocks = <&clks IMX6QDL_CLK_CKO>; + compatible = "fsl,sgtl5000"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sgtl5000>; + reg = <0x0a>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_3p3v>; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + rtc: ds1307@68 { + compatible = "dallas,ds1307"; + reg = <0x68>; + }; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&sata { + fsl,transmit-level-mV = <1104>; + fsl,transmit-boost-mdB = <3330>; + fsl,transmit-atten-16ths = <16>; + fsl,receive-eq-mdB = <3000>; + status = "okay"; +}; + +&snvs_poweroff { + status = "okay"; +}; + +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdif>; + status = "okay"; +}; + +&ssi1 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usbh1 { + vbus-supply = <®_5p0v>; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_5p0v>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; + voltage-ranges = <3300 3300>; + no-1-8-v; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <4>; + cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; + voltage-ranges = <3300 3300>; + no-1-8-v; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; + voltage-ranges = <3300 3300>; + non-removable; + no-1-8-v; + status = "okay"; +}; + +&iomuxc { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059 + >; + }; + + pinctrl_gpio_fan: gpiofangrp { + fsl,pins = < + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1 + >; + }; + + pinctrl_gpio_leds: gpioledsgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1 + >; + }; + + pinctrl_hdmi: hdmigrp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_ir: irgrp { + fsl,pins = < + MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059 + >; + }; + + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059 + >; + }; + + pinctrl_sgtl5000: sgtl5000grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 + >; + }; + + pinctrl_spdif: spdifgrp { + fsl,pins = ; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059 + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059 + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + >; + }; +}; diff --git a/board/tbs/tbs2910/MAINTAINERS b/board/tbs/tbs2910/MAINTAINERS index bf176553d2..a3ad2f712a 100644 --- a/board/tbs/tbs2910/MAINTAINERS +++ b/board/tbs/tbs2910/MAINTAINERS @@ -1,6 +1,7 @@ TBS2910 BOARD M: Soeren Moch S: Maintained +F: arch/arm/dts/imx6q-tbs2910.dts F: board/tbs/tbs2910/ F: configs/tbs2910_defconfig F: include/configs/tbs2910.h diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index ecb45f208d..99b282ca6b 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -446,9 +446,3 @@ int board_init(void) #endif return 0; } - -int checkboard(void) -{ - puts("Board: TBS2910 Matrix ARM mini PC\n"); - return 0; -} diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 70a3e18e23..3cc68eb922 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -36,6 +36,9 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y @@ -55,5 +58,4 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_VIDEO=y -CONFIG_OF_LIBFDT=y # CONFIG_EFI_LOADER is not set From f0b427aca6ac502b92f0dc32ac2b99bd6bfea5ae Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:10:55 +0100 Subject: [PATCH 086/140] board: tbs2910: Add pinctrl driver and convert gpio to driver model We need this for additional driver model conversions. Signed-off-by: Soeren Moch --- board/tbs/tbs2910/tbs2910.c | 3 +++ configs/tbs2910_defconfig | 3 +++ 2 files changed, 6 insertions(+) diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index 99b282ca6b..175dd88a69 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -138,6 +138,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); /* Reset AR8035 PHY */ + gpio_request(IMX_GPIO_NR(1, 25), "ETH_PHY_RESET"); gpio_direction_output(IMX_GPIO_NR(1, 25) , 0); udelay(500); gpio_set_value(IMX_GPIO_NR(1, 25), 1); @@ -230,12 +231,14 @@ int board_mmc_init(bd_t *bis) case 0: imx_iomux_v3_setup_multiple_pads( usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + gpio_request(USDHC2_CD_GPIO, "MMC0_CD"); gpio_direction_input(USDHC2_CD_GPIO); usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); break; case 1: imx_iomux_v3_setup_multiple_pads( usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + gpio_request(USDHC3_CD_GPIO, "MMC1_CD"); gpio_direction_input(USDHC3_CD_GPIO); usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); break; diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 3cc68eb922..717cabfa3b 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -42,10 +42,13 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y +CONFIG_DM_GPIO=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y From ab3f5efe02cddc74ffd768fdfe8c2d6b31303cc5 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:10:56 +0100 Subject: [PATCH 087/140] board: tbs2910: Convert usb to driver model So we don't need to duplicate settings from the device tree in the board file. Signed-off-by: Soeren Moch --- board/tbs/tbs2910/tbs2910.c | 10 ---------- configs/tbs2910_defconfig | 2 ++ include/configs/tbs2910.h | 1 - 3 files changed, 2 insertions(+), 11 deletions(-) diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index 175dd88a69..20c93778e1 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -418,12 +418,6 @@ static const struct boot_mode board_boot_modes[] = { }; #endif -#ifdef CONFIG_USB_EHCI_MX6 -static iomux_v3_cfg_t const usb_otg_pads[] = { - MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL), -}; -#endif - int board_init(void) { /* address of boot parameters */ @@ -442,10 +436,6 @@ int board_init(void) #endif #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); -#endif -#ifdef CONFIG_USB_EHCI_MX6 - imx_iomux_v3_setup_multiple_pads( - usb_otg_pads, ARRAY_SIZE(usb_otg_pads)); #endif return 0; } diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 717cabfa3b..395275c6dd 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -43,6 +43,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_DM_GPIO=y +CONFIG_DM_KEYBOARD=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_MII=y @@ -51,6 +52,7 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_THERMAL=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index b06c90939c..93f75d72f3 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -81,7 +81,6 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #ifdef CONFIG_CMD_USB_MASS_STORAGE From f9b0b8d4ee6d5515305470eeb909506c90b5d331 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:10:57 +0100 Subject: [PATCH 088/140] board: tbs2910: Convert i2c and rtc to driver model So we don't need to duplicate settings from the device tree in the board file. Signed-off-by: Soeren Moch --- board/tbs/tbs2910/tbs2910.c | 57 ------------------------------------- configs/tbs2910_defconfig | 6 +++- include/configs/tbs2910.h | 17 ----------- 3 files changed, 5 insertions(+), 75 deletions(-) diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index 20c93778e1..2445efbde2 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -22,7 +21,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; #define WEAK_PULLUP (PAD_CTL_PUS_47K_UP | \ @@ -40,56 +38,6 @@ DECLARE_GLOBAL_DATA_PTR; #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) -#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) - -#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) - -#ifdef CONFIG_SYS_I2C -/* I2C1, SGTL5000 */ -static struct i2c_pads_info i2c_pad_info0 = { - .scl = { - .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | I2C_PAD, - .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | I2C_PAD, - .gp = IMX_GPIO_NR(5, 27) - }, - .sda = { - .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | I2C_PAD, - .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | I2C_PAD, - .gp = IMX_GPIO_NR(5, 26) - } -}; - -/* I2C2 HDMI */ -static struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, - .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD, - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD, - .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD, - .gp = IMX_GPIO_NR(4, 13) - } -}; - -/* I2C3, CON11, DS1307, PCIe_SMB */ -static struct i2c_pads_info i2c_pad_info2 = { - .scl = { - .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | I2C_PAD, - .gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | I2C_PAD, - .gp = IMX_GPIO_NR(1, 3) - }, - .sda = { - .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | I2C_PAD, - .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | I2C_PAD, - .gp = IMX_GPIO_NR(1, 6) - } -}; -#endif /* CONFIG_SYS_I2C */ - static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), @@ -426,11 +374,6 @@ int board_init(void) #ifdef CONFIG_VIDEO_IPUV3 setup_display(); #endif -#ifdef CONFIG_SYS_I2C - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); -#endif #ifdef CONFIG_DWC_AHSATA setup_sata(); #endif diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 395275c6dd..153f61d09d 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -28,7 +28,6 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y @@ -43,6 +42,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y CONFIG_DM_KEYBOARD=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y @@ -50,6 +51,8 @@ CONFIG_MII=y CONFIG_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_DM_USB=y @@ -62,5 +65,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_I2C_EDID=y CONFIG_VIDEO=y # CONFIG_EFI_LOADER is not set diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 93f75d72f3..eff93eff4f 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -97,23 +97,6 @@ #endif /* CONFIG_USB_KEYBOARD */ #endif /* CONFIG_CMD_USB */ -/* RTC */ -#ifdef CONFIG_CMD_DATE -#define CONFIG_RTC_DS1307 -#define CONFIG_SYS_RTC_BUS_NUM 2 -#endif - -/* I2C */ -#ifdef CONFIG_CMD_I2C -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_I2C_EDID -#endif - /* Environment organization */ #define CONFIG_SYS_MMC_ENV_DEV 2 /* overwritten on SD boot */ #define CONFIG_SYS_MMC_ENV_PART 1 /* overwritten on SD boot */ From d5326dfa7a757794c5a4865fba6b899e280a022b Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:10:58 +0100 Subject: [PATCH 089/140] ata: dwc_ahsata: Fix sector reports for large disks Do not report negative sector numbers for disks > 1TB, do not limit sector numbers to 32 bit if CONFIG_SYS_64BIT_LBA is enabled. Signed-off-by: Soeren Moch --- drivers/ata/dwc_ahsata.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c index 4c5b98482f..6fe5641dd9 100644 --- a/drivers/ata/dwc_ahsata.c +++ b/drivers/ata/dwc_ahsata.c @@ -511,15 +511,9 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port) static void dwc_ahsata_print_info(struct blk_desc *pdev) { printf("SATA Device Info:\n\r"); -#ifdef CONFIG_SYS_64BIT_LBA printf("S/N: %s\n\rProduct model number: %s\n\r" - "Firmware version: %s\n\rCapacity: %lld sectors\n\r", + "Firmware version: %s\n\rCapacity: " LBAFU " sectors\n\r", pdev->product, pdev->vendor, pdev->revision, pdev->lba); -#else - printf("S/N: %s\n\rProduct model number: %s\n\r" - "Firmware version: %s\n\rCapacity: %ld sectors\n\r", - pdev->product, pdev->vendor, pdev->revision, pdev->lba); -#endif } static void dwc_ahsata_identify(struct ahci_uc_priv *uc_priv, u16 *id) @@ -754,7 +748,6 @@ static int dwc_ahsata_scan_common(struct ahci_uc_priv *uc_priv, u8 serial[ATA_ID_SERNO_LEN + 1] = { 0 }; u8 firmware[ATA_ID_FW_REV_LEN + 1] = { 0 }; u8 product[ATA_ID_PROD_LEN + 1] = { 0 }; - u64 n_sectors; u8 port = uc_priv->hard_port_no; ALLOC_CACHE_ALIGN_BUFFER(u16, id, ATA_ID_WORDS); @@ -773,9 +766,8 @@ static int dwc_ahsata_scan_common(struct ahci_uc_priv *uc_priv, ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product)); memcpy(pdev->vendor, product, sizeof(product)); - /* Totoal sectors */ - n_sectors = ata_id_n_sectors(id); - pdev->lba = (u32)n_sectors; + /* Total sectors */ + pdev->lba = ata_id_n_sectors(id); pdev->type = DEV_TYPE_HARDDISK; pdev->blksz = ATA_SECT_SIZE; From 046a69b84808ed86a59bb32a970da912c1e78c94 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:10:59 +0100 Subject: [PATCH 090/140] ata: dwc_ahsata: Add ahci driver model support Disable this support for cm_fx6 to avoid breakage. Signed-off-by: Soeren Moch --- configs/cm_fx6_defconfig | 1 + drivers/ata/Kconfig | 8 ++++++++ drivers/ata/dwc_ahsata.c | 24 ++++++++++++++++++++++++ 3 files changed, 33 insertions(+) diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 6156ac2bee..2178170c5a 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -51,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y +# CONFIG_DWC_AHSATA_AHCI is not set CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 7ebee75c0a..593e9cbc1f 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -66,6 +66,14 @@ config DWC_AHSATA Enable this driver to support the DWC AHSATA SATA controller found in i.MX5 and i.MX6 SoCs. +config DWC_AHSATA_AHCI + bool "Enable DWC AHSATA AHCI driver support" + depends on DWC_AHSATA + depends on AHCI + default y + help + Enable this option unless you need your private ahci implementation + config FSL_SATA bool "Enable Freescale SATA controller driver support" select LIBATA diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c index 6fe5641dd9..afced8e7e3 100644 --- a/drivers/ata/dwc_ahsata.c +++ b/drivers/ata/dwc_ahsata.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -1020,6 +1021,9 @@ int dwc_ahsata_probe(struct udevice *dev) struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev); int ret; +#if defined(CONFIG_MX6) + setup_sata(); +#endif uc_priv->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NO_ATAPI; uc_priv->mmio_base = (void __iomem *)dev_read_addr(dev); @@ -1067,4 +1071,24 @@ U_BOOT_DRIVER(dwc_ahsata_blk) = { .ops = &dwc_ahsata_blk_ops, }; +#if CONFIG_IS_ENABLED(DWC_AHSATA_AHCI) +struct ahci_ops dwc_ahsata_ahci_ops = { + .port_status = dwc_ahsata_port_status, + .reset = dwc_ahsata_bus_reset, + .scan = dwc_ahsata_scan, +}; + +static const struct udevice_id dwc_ahsata_ahci_ids[] = { + { .compatible = "fsl,imx6q-ahci" }, + { } +}; + +U_BOOT_DRIVER(dwc_ahsata_ahci) = { + .name = "dwc_ahsata_ahci", + .id = UCLASS_AHCI, + .of_match = dwc_ahsata_ahci_ids, + .ops = &dwc_ahsata_ahci_ops, + .probe = dwc_ahsata_probe, +}; +#endif #endif From 186d95380d282d2f0cd9cdb01b2c3805313c6a69 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:11:00 +0100 Subject: [PATCH 091/140] board: tbs2910: Convert sata to ahci driver model While at it, also configure 64-bit LBA support. Signed-off-by: Soeren Moch --- board/tbs/tbs2910/tbs2910.c | 4 ---- configs/tbs2910_defconfig | 1 + include/configs/tbs2910.h | 1 + 3 files changed, 2 insertions(+), 4 deletions(-) diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index 2445efbde2..84c813e29f 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -374,9 +373,6 @@ int board_init(void) #ifdef CONFIG_VIDEO_IPUV3 setup_display(); #endif -#ifdef CONFIG_DWC_AHSATA - setup_sata(); -#endif #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 153f61d09d..54e34df6aa 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_TBS2910=y CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_PRE_CONSOLE_BUFFER=y diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index eff93eff4f..a211b9d611 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -77,6 +77,7 @@ #define CONFIG_DWC_AHSATA_PORT_ID 0 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR #define CONFIG_LBA48 +#define CONFIG_SYS_64BIT_LBA #endif /* USB */ From 01b7e8f6d4878c1b095627a70f1f10afb4db8078 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Fri, 1 Mar 2019 13:11:01 +0100 Subject: [PATCH 092/140] board: tbs2910: Convert mmc to driver model So we don't need to duplicate settings from the device tree in the board file. Signed-off-by: Soeren Moch --- board/tbs/tbs2910/tbs2910.c | 108 ------------------------------------ configs/tbs2910_defconfig | 1 + include/configs/tbs2910.h | 7 --- 3 files changed, 1 insertion(+), 115 deletions(-) diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index 84c813e29f..fb0e773afc 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -30,10 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) @@ -103,110 +99,6 @@ static void setup_iomux_uart(void) } #ifdef CONFIG_FSL_ESDHC -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -static iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -static struct fsl_esdhc_cfg usdhc_cfg[3] = { - {USDHC2_BASE_ADDR}, - {USDHC3_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -#define USDHC2_CD_GPIO IMX_GPIO_NR(2, 2) -#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 0) - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - case USDHC3_BASE_ADDR: - ret = !gpio_get_value(USDHC3_CD_GPIO); - break; - case USDHC4_BASE_ADDR: - ret = 1; /* eMMC/uSDHC4 is always present */ - break; - } - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - /* - * (U-Boot device node) (Physical Port) - * mmc0 SD2 - * mmc1 SD3 - * mmc2 eMMC - */ - int i, ret; - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - gpio_request(USDHC2_CD_GPIO, "MMC0_CD"); - gpio_direction_input(USDHC2_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - gpio_request(USDHC3_CD_GPIO, "MMC1_CD"); - gpio_direction_input(USDHC3_CD_GPIO); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - break; - case 2: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - break; - default: - printf("Warning: you configured more USDHC controllers" - "(%d) then supported by the board (%d)\n", - i + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) - return ret; - } - return 0; -} - /* set environment device to boot device when booting from SD */ int board_mmc_get_env_dev(int devno) { diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 54e34df6aa..4d755c88c3 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -46,6 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_KEYBOARD=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_MII=y diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index a211b9d611..f31cadd951 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -40,13 +40,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ -/* Filesystems / image support */ - -/* MMC */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR -#define CONFIG_SUPPORT_EMMC_BOOT - /* Ethernet */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC From 57f065fee2a421085621a34097ccbc45fc18aad5 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:31 +0100 Subject: [PATCH 093/140] video: ipuv3: add DM_VIDEO support Extend the driver to build with DM_VIDEO enabled. DTS files must additionally include 'u-boot,dm-pre-reloc' property in soc and ipu nodes to enable driver binding to ipu device. Signed-off-by: Anatolij Gustschin --- arch/arm/include/asm/mach-imx/video.h | 1 + arch/arm/mach-imx/video.c | 25 +++++--- drivers/video/Kconfig | 14 ++--- drivers/video/mxc_ipuv3_fb.c | 87 +++++++++++++++++++++++++++ 4 files changed, 113 insertions(+), 14 deletions(-) diff --git a/arch/arm/include/asm/mach-imx/video.h b/arch/arm/include/asm/mach-imx/video.h index 812e6f85e4..d1a14ad7d3 100644 --- a/arch/arm/include/asm/mach-imx/video.h +++ b/arch/arm/include/asm/mach-imx/video.h @@ -26,4 +26,5 @@ extern size_t display_count; #endif int ipu_set_ldb_clock(int rate); +int ipu_displays_init(void); #endif diff --git a/arch/arm/mach-imx/video.c b/arch/arm/mach-imx/video.c index 953fe53cb4..22a371a212 100644 --- a/arch/arm/mach-imx/video.c +++ b/arch/arm/mach-imx/video.c @@ -4,6 +4,17 @@ #include #include +#ifdef CONFIG_IMX_HDMI +#include +#include + +int detect_hdmi(struct display_info_t const *dev) +{ + struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; + return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; +} +#endif + int board_video_skip(void) { int i; @@ -42,6 +53,11 @@ int board_video_skip(void) displays[i].mode.name, displays[i].mode.xres, displays[i].mode.yres); + +#ifdef CONFIG_IMX_HDMI + if (!strcmp(displays[i].mode.name, "HDMI")) + imx_enable_hdmi_phy(); +#endif } else printf("LCD %s cannot be configured: %d\n", displays[i].mode.name, ret); @@ -53,12 +69,7 @@ int board_video_skip(void) return ret; } -#ifdef CONFIG_IMX_HDMI -#include -#include -int detect_hdmi(struct display_info_t const *dev) +int ipu_displays_init(void) { - struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; - return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; + return board_video_skip(); } -#endif diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 2eac4b6381..73a2402f41 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -538,6 +538,13 @@ config VIDEO_TEGRA124 source "drivers/video/bridge/Kconfig" +config VIDEO_IPUV3 + bool "i.MX IPUv3 Core video support" + depends on (VIDEO || DM_VIDEO) && (MX5 || MX6) + help + This enables framebuffer driver for i.MX processors working + on the IPUv3(Image Processing Unit) internal graphic processor. + config VIDEO bool "Enable legacy video support" depends on !DM_VIDEO @@ -547,13 +554,6 @@ config VIDEO model. Video drivers typically provide a colour text console and cursor. -config VIDEO_IPUV3 - bool "i.MX IPUv3 Core video support" - depends on VIDEO && MX6 - help - This enables framebuffer driver for i.MX processors working - on the IPUv3(Image Processing Unit) internal graphic processor. - config CFB_CONSOLE bool "Enable colour frame buffer console" depends on VIDEO diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c index 23cd55de47..5b3ba7b3a9 100644 --- a/drivers/video/mxc_ipuv3_fb.c +++ b/drivers/video/mxc_ipuv3_fb.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include "videomodes.h" @@ -24,6 +25,9 @@ #include "mxcfb.h" #include "ipu_regs.h" +#include +#include + DECLARE_GLOBAL_DATA_PTR; static int mxcfb_map_video_memory(struct fb_info *fbi); @@ -401,8 +405,14 @@ static int mxcfb_map_video_memory(struct fb_info *fbi) fbi->fix.line_length; } fbi->fix.smem_len = roundup(fbi->fix.smem_len, ARCH_DMA_MINALIGN); + +#if CONFIG_IS_ENABLED(DM_VIDEO) + fbi->screen_base = (char *)gd->video_bottom; +#else fbi->screen_base = (char *)memalign(ARCH_DMA_MINALIGN, fbi->fix.smem_len); +#endif + fbi->fix.smem_start = (unsigned long)fbi->screen_base; if (fbi->screen_base == 0) { puts("Unable to allocate framebuffer memory\n"); @@ -416,7 +426,9 @@ static int mxcfb_map_video_memory(struct fb_info *fbi) fbi->screen_size = fbi->fix.smem_len; +#if CONFIG_IS_ENABLED(VIDEO) gd->fb_base = fbi->fix.smem_start; +#endif /* Clear the screen */ memset((char *)fbi->screen_base, 0, fbi->fix.smem_len); @@ -611,3 +623,78 @@ int ipuv3_fb_init(struct fb_videomode const *mode, return 0; } + +#if CONFIG_IS_ENABLED(DM_VIDEO) +enum { + /* Maximum display size we support */ + LCD_MAX_WIDTH = 1920, + LCD_MAX_HEIGHT = 1080, + LCD_MAX_LOG2_BPP = VIDEO_BPP16, +}; + +static int ipuv3_video_probe(struct udevice *dev) +{ + struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + struct video_priv *uc_priv = dev_get_uclass_priv(dev); + u32 fb_start, fb_end; + int ret; + + debug("%s() plat: base 0x%lx, size 0x%x\n", + __func__, plat->base, plat->size); + + ret = ipu_probe(); + if (ret) + return ret; + + ret = ipu_displays_init(); + if (ret < 0) + return ret; + + ret = mxcfb_probe(gpixfmt, gdisp, gmode); + if (ret < 0) + return ret; + + uc_priv->xsize = gmode->xres; + uc_priv->ysize = gmode->yres; + uc_priv->bpix = LCD_MAX_LOG2_BPP; + + /* Enable dcache for the frame buffer */ + fb_start = plat->base & ~(MMU_SECTION_SIZE - 1); + fb_end = plat->base + plat->size; + fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT); + mmu_set_region_dcache_behaviour(fb_start, fb_end - fb_start, + DCACHE_WRITEBACK); + video_set_flush_dcache(dev, true); + + return 0; +} + +struct ipuv3_video_priv { + ulong regs; +}; + +static int ipuv3_video_bind(struct udevice *dev) +{ + struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); + + plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT * + (1 << LCD_MAX_LOG2_BPP) / 8; + + return 0; +} + +static const struct udevice_id ipuv3_video_ids[] = { + { .compatible = "fsl,imx6q-ipu" }, + { } +}; + +U_BOOT_DRIVER(ipuv3_video) = { + .name = "ipuv3_video", + .id = UCLASS_VIDEO, + .of_match = ipuv3_video_ids, + .bind = ipuv3_video_bind, + .probe = ipuv3_video_probe, + .priv_auto_alloc_size = sizeof(struct ipuv3_video_priv), + .flags = DM_FLAG_PRE_RELOC, +}; +#endif /* CONFIG_DM_VIDEO */ From bffd13144b1fef3ee93007b92263667704597544 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:32 +0100 Subject: [PATCH 094/140] video: move ipuv3 files to subdirectory Place ipuv3 files and headers in custom driver subdirectory. Signed-off-by: Anatolij Gustschin --- drivers/video/Kconfig | 7 +------ drivers/video/Makefile | 2 +- drivers/video/imx/Kconfig | 8 ++++++++ drivers/video/imx/Makefile | 6 ++++++ drivers/video/{ => imx}/ipu.h | 0 drivers/video/{ => imx}/ipu_common.c | 0 drivers/video/{ => imx}/ipu_disp.c | 0 drivers/video/{ => imx}/ipu_regs.h | 0 drivers/video/{ => imx}/mxc_ipuv3_fb.c | 2 +- drivers/video/{ => imx}/mxcfb.h | 0 10 files changed, 17 insertions(+), 8 deletions(-) create mode 100644 drivers/video/imx/Kconfig create mode 100644 drivers/video/imx/Makefile rename drivers/video/{ => imx}/ipu.h (100%) rename drivers/video/{ => imx}/ipu_common.c (100%) rename drivers/video/{ => imx}/ipu_disp.c (100%) rename drivers/video/{ => imx}/ipu_regs.h (100%) rename drivers/video/{ => imx}/mxc_ipuv3_fb.c (99%) rename drivers/video/{ => imx}/mxcfb.h (100%) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 73a2402f41..53871f864f 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -538,12 +538,7 @@ config VIDEO_TEGRA124 source "drivers/video/bridge/Kconfig" -config VIDEO_IPUV3 - bool "i.MX IPUv3 Core video support" - depends on (VIDEO || DM_VIDEO) && (MX5 || MX6) - help - This enables framebuffer driver for i.MX processors working - on the IPUv3(Image Processing Unit) internal graphic processor. +source "drivers/video/imx/Kconfig" config VIDEO bool "Enable legacy video support" diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 671f037c35..349a207035 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -46,7 +46,7 @@ obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o obj-$(CONFIG_VIDEO_EFI) += efi.o obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o -obj-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o +obj-$(CONFIG_VIDEO_IPUV3) += imx/ obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o diff --git a/drivers/video/imx/Kconfig b/drivers/video/imx/Kconfig new file mode 100644 index 0000000000..c33620e075 --- /dev/null +++ b/drivers/video/imx/Kconfig @@ -0,0 +1,8 @@ + +config VIDEO_IPUV3 + bool "i.MX IPUv3 Core video support" + depends on (VIDEO || DM_VIDEO) && (MX5 || MX6) + help + This enables framebuffer driver for i.MX processors working + on the IPUv3(Image Processing Unit) internal graphic processor. + diff --git a/drivers/video/imx/Makefile b/drivers/video/imx/Makefile new file mode 100644 index 0000000000..179ea651fe --- /dev/null +++ b/drivers/video/imx/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2000-2007 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. + +obj-y += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o diff --git a/drivers/video/ipu.h b/drivers/video/imx/ipu.h similarity index 100% rename from drivers/video/ipu.h rename to drivers/video/imx/ipu.h diff --git a/drivers/video/ipu_common.c b/drivers/video/imx/ipu_common.c similarity index 100% rename from drivers/video/ipu_common.c rename to drivers/video/imx/ipu_common.c diff --git a/drivers/video/ipu_disp.c b/drivers/video/imx/ipu_disp.c similarity index 100% rename from drivers/video/ipu_disp.c rename to drivers/video/imx/ipu_disp.c diff --git a/drivers/video/ipu_regs.h b/drivers/video/imx/ipu_regs.h similarity index 100% rename from drivers/video/ipu_regs.h rename to drivers/video/imx/ipu_regs.h diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c similarity index 99% rename from drivers/video/mxc_ipuv3_fb.c rename to drivers/video/imx/mxc_ipuv3_fb.c index 5b3ba7b3a9..3e38d4bdcc 100644 --- a/drivers/video/mxc_ipuv3_fb.c +++ b/drivers/video/imx/mxc_ipuv3_fb.c @@ -20,7 +20,7 @@ #include #include #include -#include "videomodes.h" +#include "../videomodes.h" #include "ipu.h" #include "mxcfb.h" #include "ipu_regs.h" diff --git a/drivers/video/mxcfb.h b/drivers/video/imx/mxcfb.h similarity index 100% rename from drivers/video/mxcfb.h rename to drivers/video/imx/mxcfb.h From 3eb0801016b9c7b3f0760da9d207e6d22064ef67 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:33 +0100 Subject: [PATCH 095/140] imx: move CONFIG_VIDEO_IPUV3 to defconfigs Signed-off-by: Anatolij Gustschin --- configs/apalis_imx6_defconfig | 1 + configs/aristainetos2_defconfig | 1 + configs/aristainetos2b_defconfig | 1 + configs/aristainetos_defconfig | 1 + configs/cgtqmx6eval_defconfig | 1 + configs/cm_fx6_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + configs/dms-ba16-1g_defconfig | 1 + configs/dms-ba16_defconfig | 1 + configs/ge_bx50v3_defconfig | 2 ++ configs/gwventana_emmc_defconfig | 1 + configs/gwventana_gw5904_defconfig | 1 + configs/gwventana_nand_defconfig | 1 + configs/m53menlo_defconfig | 1 + configs/marsboard_defconfig | 1 + configs/mx51evk_defconfig | 1 + configs/mx53cx9020_defconfig | 1 + configs/mx53loco_defconfig | 1 + configs/mx53ppd_defconfig | 1 + configs/mx6cuboxi_defconfig | 1 + configs/mx6qsabrelite_defconfig | 1 + configs/mx6sabreauto_defconfig | 1 + configs/mx6sabresd_defconfig | 1 + configs/nitrogen6dl2g_defconfig | 1 + configs/nitrogen6dl_defconfig | 1 + configs/nitrogen6q2g_defconfig | 1 + configs/nitrogen6q_defconfig | 1 + configs/nitrogen6s1g_defconfig | 1 + configs/nitrogen6s_defconfig | 1 + configs/novena_defconfig | 1 + configs/riotboard_defconfig | 1 + configs/riotboard_spl_defconfig | 1 + configs/tbs2910_defconfig | 1 + configs/wandboard_defconfig | 1 + include/configs/advantech_dms-ba16.h | 1 - include/configs/apalis_imx6.h | 1 - include/configs/aristainetos-common.h | 1 - include/configs/cgtqmx6eval.h | 1 - include/configs/cm_fx6.h | 1 - include/configs/colibri_imx6.h | 1 - include/configs/embestmx6boards.h | 1 - include/configs/ge_bx50v3.h | 6 ------ include/configs/gw_ventana.h | 1 - include/configs/m53menlo.h | 1 - include/configs/mx51evk.h | 1 - include/configs/mx53cx9020.h | 1 - include/configs/mx53loco.h | 1 - include/configs/mx53ppd.h | 5 ----- include/configs/mx6cuboxi.h | 1 - include/configs/mx6sabre_common.h | 1 - include/configs/nitrogen6x.h | 1 - include/configs/novena.h | 1 - include/configs/tbs2910.h | 1 - include/configs/wandboard.h | 1 - 54 files changed, 35 insertions(+), 29 deletions(-) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 1ab5edc966..60ca8a5147 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -82,5 +82,6 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index b852b4d630..1dd2c3b6b8 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -55,6 +55,7 @@ CONFIG_MXC_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index 7806d0a41c..e58541f7e0 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -53,6 +53,7 @@ CONFIG_MXC_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index bad6aebf00..0f2412ba80 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -53,6 +53,7 @@ CONFIG_MXC_SPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 2311c4f3aa..d5d170f308 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -74,5 +74,6 @@ CONFIG_CI_UDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 2178170c5a..4a46bb58c3 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -79,4 +79,5 @@ CONFIG_DM_USB=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index df5a7be39f..611f9f0950 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -78,5 +78,6 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index 6ca5d2bb32..c274c3af0e 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -53,5 +53,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index 4ad3df6214..6c27c3865c 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -52,5 +52,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 354c61fd6b..cee265dac7 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -62,3 +62,5 @@ CONFIG_DM_GPIO=y CONFIG_DM_SPI=y CONFIG_DM_SPI_FLASH=y CONFIG_OF_BOARD_SETUP=y +CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 07171c7009..2e04127014 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -84,6 +84,7 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_HEXDUMP=y CONFIG_OF_LIBFDT=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 0ed2209e3b..275aa89ed6 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -88,6 +88,7 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_HEXDUMP=y CONFIG_OF_LIBFDT=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 57e4a999ab..477d205bc3 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -87,6 +87,7 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_HEXDUMP=y CONFIG_OF_LIBFDT=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 5555e05030..e830b2c92e 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -64,6 +64,7 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_IMX_WATCHDOG=y CONFIG_FAT_WRITE=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 320e14e2be..a2a0390ca6 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -35,5 +35,6 @@ CONFIG_USB=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index e93e81f3c3..dc0b3b3f77 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -31,5 +31,6 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 07f3a23028..831d50925f 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -32,4 +32,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX5=y CONFIG_MXC_UART=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index 4e161371e3..776fc8bab4 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -32,5 +32,6 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index db31d817aa..2a6183b77b 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -39,6 +39,7 @@ CONFIG_RTC_S35392A=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 506e3a71df..f1c2fd4dba 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -39,5 +39,6 @@ CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 39893528b6..8a5f9dbb93 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -57,5 +57,6 @@ CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index d0f950bb6e..fec3b8492b 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -85,4 +85,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 0fd32aa1d6..d6b720ccd6 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -96,4 +96,5 @@ CONFIG_CI_UDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index debe60b3f0..5b3899d590 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -59,5 +59,6 @@ CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 96d9c02b47..d89069a0d5 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -59,5 +59,6 @@ CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 5bc4219dee..e9214d472b 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -61,5 +61,6 @@ CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 37fa405931..f1480f15c7 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -61,5 +61,6 @@ CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 1d3f0151fe..b920db0dad 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -59,5 +59,6 @@ CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 5bf2b3a021..c3b8032d47 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -59,5 +59,6 @@ CONFIG_CI_UDC=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 4c9c1cb9eb..103d9183cb 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -58,6 +58,7 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index e3d16df6a8..84561c8232 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -35,5 +35,6 @@ CONFIG_USB=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/riotboard_spl_defconfig b/configs/riotboard_spl_defconfig index 51fa98d5a9..db6ee8fc3f 100644 --- a/configs/riotboard_spl_defconfig +++ b/configs/riotboard_spl_defconfig @@ -44,6 +44,7 @@ CONFIG_USB=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y CONFIG_SPL_OF_LIBFDT=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 4d755c88c3..05973eab8b 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -69,4 +69,5 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_I2C_EDID=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_EFI_LOADER is not set diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 5725487446..9a67e63132 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -42,5 +42,6 @@ CONFIG_MII=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index e2c70605b2..034fd9c51b 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -217,7 +217,6 @@ /* Framebuffer */ #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index c8aa1bdddf..fc72a55255 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -80,7 +80,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index 4f28f52402..a24814673c 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -187,7 +187,6 @@ /* UBI support */ /* Framebuffer */ -#define CONFIG_VIDEO_IPUV3 /* check this console not needed, after test remove it */ #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index ad0a64a936..07c6409e8f 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -60,7 +60,6 @@ #define CONFIG_USBD_HS /* Framebuffer */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index dfd96ff8d5..2e8dda8ab8 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -212,7 +212,6 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) /* Display */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_IMX_HDMI #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index a6a823ee1f..802270e401 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -71,7 +71,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 5142680e7d..858bed012c 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -86,7 +86,6 @@ #endif /* Framebuffer */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 34d9eaaa69..bb4a1ccc5e 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -198,13 +198,7 @@ #define CONFIG_SYS_FSL_USDHC_NUM 3 /* Framebuffer */ -#define CONFIG_VIDEO #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_IPUV3 -#define CONFIG_CFB_CONSOLE -#define CONFIG_VGA_AS_SINGLE_DEVICE -#define CONFIG_SYS_CONSOLE_FG_COL 0xFF -#define CONFIG_SYS_CONSOLE_BG_COL 0x00 #define CONFIG_HIDE_LOGO_VERSION #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 84ee44e872..93608e5aec 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -132,7 +132,6 @@ #define CONFIG_NETCONSOLE /* Framebuffer and LCD */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 51456fbe55..84d061339e 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -138,7 +138,6 @@ * LCD */ #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index eb172c97b3..9bf9773c69 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -68,7 +68,6 @@ /* Framebuffer and LCD */ #define CONFIG_PREBOOT -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 3ed5ee3c57..1e3ea88b77 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -161,7 +161,6 @@ /* Framebuffer and LCD */ #define CONFIG_PREBOOT -#define CONFIG_VIDEO_IPUV3 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 816164e87e..2d18f05423 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -178,7 +178,6 @@ /* Framebuffer and LCD */ #define CONFIG_PREBOOT -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 5b97fe9843..f002324fdd 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -215,9 +215,4 @@ #define CONFIG_PWM_IMX #define CONFIG_IMX6_PWM_PER_CLK 66666000 -/* Framebuffer and LCD */ -#ifdef CONFIG_VIDEO - #define CONFIG_VIDEO_IPUV3 -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index a62e14f7c6..7b4ae2102e 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -35,7 +35,6 @@ #define CONFIG_PHY_ATHEROS /* Framebuffer */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 6fe0467229..c137612b01 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -185,7 +185,6 @@ #endif /* Framebuffer */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index d941caa905..afaa908406 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -58,7 +58,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* Framebuffer and LCD */ -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN diff --git a/include/configs/novena.h b/include/configs/novena.h index 25736f3c03..bb5bf808c2 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -125,7 +125,6 @@ /* Video output */ #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_BMP_16BPP diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index f31cadd951..a753d41835 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -51,7 +51,6 @@ /* Framebuffer */ #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index b03a1c550c..e6d1fcacf5 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -65,7 +65,6 @@ /* Framebuffer */ #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_IPUV3 #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN From f45ec8fcfb86c84ce2c012512ba4255cb11a2ecf Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:34 +0100 Subject: [PATCH 096/140] imx6: dts: add 'u-boot, dm-pre-reloc' to soc and ipu nodes u-boot,dm-pre-reloc is required for reserving video memory when binding DM_VIDEO driver. Signed-off-by: Anatolij Gustschin --- arch/arm/dts/imx6qdl.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index e4daf15088..c0a9478008 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -145,6 +145,7 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; + u-boot,dm-pre-reloc; dma_apbh: dma-apbh@110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; @@ -1261,6 +1262,7 @@ <&clks IMX6QDL_CLK_IPU1_DI1>; clock-names = "bus", "di0", "di1"; resets = <&src 2>; + u-boot,dm-pre-reloc; ipu1_csi0: port@0 { reg = <0>; From 68555fb77816cf0f97846e4d21bd18268d4d7544 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:35 +0100 Subject: [PATCH 097/140] apalis_imx6: convert to DM_VIDEO Enable DM_VIDEO in defconfig. Signed-off-by: Anatolij Gustschin --- configs/apalis_imx6_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 60ca8a5147..06695208bc 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -81,7 +81,8 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT_OVERLAY=y From dda4d77f58a245919b5050412b02efc7c52cbf23 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:36 +0100 Subject: [PATCH 098/140] imx6: icore: convert to DM_VIDEO Enable DM_VIDEO in defconfigs. Signed-off-by: Anatolij Gustschin --- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 69c45b948b..7b1f7abc4e 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -50,5 +50,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index b53a5010e5..1e26f7a8c9 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -51,5 +51,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 24e99718e6..223f732207 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -67,5 +67,5 @@ CONFIG_PINCTRL_IMX6=y CONFIG_DEBUG_UART_MXC=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index cf149d615b..8702426561 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -50,5 +50,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y From 0b09f7b15052bb419e318e38da453be46e5a13e5 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:37 +0100 Subject: [PATCH 099/140] imx6: ge_bx50v3: convert to DM_VIDEO Enable DM_VIDEO in defconfig. Signed-off-by: Anatolij Gustschin --- configs/ge_bx50v3_defconfig | 2 +- include/configs/ge_bx50v3.h | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index cee265dac7..1db59c7940 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -62,5 +62,5 @@ CONFIG_DM_GPIO=y CONFIG_DM_SPI=y CONFIG_DM_SPI_FLASH=y CONFIG_OF_BOARD_SETUP=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index bb4a1ccc5e..7c2d891865 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -198,12 +198,10 @@ #define CONFIG_SYS_FSL_USDHC_NUM 3 /* Framebuffer */ -#ifdef CONFIG_VIDEO #define CONFIG_HIDE_LOGO_VERSION #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP #define CONFIG_CMD_BMP -#endif #define CONFIG_PWM_IMX #define CONFIG_IMX6_PWM_PER_CLK 66000000 From a0f045c7fb464ddbe105e947eaf3f937a71a24e4 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:38 +0100 Subject: [PATCH 100/140] colibri_imx6: convert to DM_VIDEO Enable DM_VIDEO in defconfig. Signed-off-by: Anatolij Gustschin --- configs/colibri_imx6_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 611f9f0950..bf05c68807 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -77,7 +77,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT_OVERLAY=y From f3592ceac9810b34801772b6d335d8f7cff4c287 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:39 +0100 Subject: [PATCH 101/140] mx6sabresd: convert to DM_VIDEO Enable DM_VIDEO in defconfig. Signed-off-by: Anatolij Gustschin --- configs/mx6sabresd_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index d6b720ccd6..eaf0f01004 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -95,6 +95,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set From c63d8a728282b1d8fe32db90a1edd7dba7790c25 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:40 +0100 Subject: [PATCH 102/140] mx6sabreauto: convert to DM_VIDEO Enable DM_VIDEO in defconfig. Signed-off-by: Anatolij Gustschin --- configs/mx6sabreauto_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index fec3b8492b..23fd9977d0 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -84,6 +84,6 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set From 4f115e3b9bef1c4e2670c3e5e893d89cbd8e9af1 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:41 +0100 Subject: [PATCH 103/140] imx6: wandboard: add device tree Add device trees from Linux in preparation for driver model conversions. Signed-off-by: Anatolij Gustschin --- arch/arm/dts/imx6dl-wandboard-revb1.dts | 18 ++ arch/arm/dts/imx6qdl-wandboard-revb1.dtsi | 41 ++++ arch/arm/dts/imx6qdl-wandboard.dtsi | 279 ++++++++++++++++++++++ board/wandboard/MAINTAINERS | 3 + configs/wandboard_defconfig | 3 +- 5 files changed, 343 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx6dl-wandboard-revb1.dts create mode 100644 arch/arm/dts/imx6qdl-wandboard-revb1.dtsi create mode 100644 arch/arm/dts/imx6qdl-wandboard.dtsi diff --git a/arch/arm/dts/imx6dl-wandboard-revb1.dts b/arch/arm/dts/imx6dl-wandboard-revb1.dts new file mode 100644 index 0000000000..738db4fc77 --- /dev/null +++ b/arch/arm/dts/imx6dl-wandboard-revb1.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * Author: Fabio Estevam + */ +/dts-v1/; +#include "imx6dl.dtsi" +#include "imx6qdl-wandboard-revb1.dtsi" + +/ { + model = "Wandboard i.MX6 Dual Lite Board rev B1"; + compatible = "wand,imx6dl-wandboard", "fsl,imx6dl"; + + memory@10000000 { + reg = <0x10000000 0x40000000>; + }; +}; diff --git a/arch/arm/dts/imx6qdl-wandboard-revb1.dtsi b/arch/arm/dts/imx6qdl-wandboard-revb1.dtsi new file mode 100644 index 0000000000..855dc6f9df --- /dev/null +++ b/arch/arm/dts/imx6qdl-wandboard-revb1.dtsi @@ -0,0 +1,41 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * Author: Fabio Estevam + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include "imx6qdl-wandboard.dtsi" + +&iomuxc { + pinctrl-0 = <&pinctrl_hog>; + + imx6qdl-wandboard { + pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* uSDHC1 CD */ + MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */ + MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x0f0b0 /* WL_REF_ON */ + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x0f0b0 /* WL_RST_N */ + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x000b0 /* WL_REG_ON */ + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */ + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */ + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 /* RGMII_nRST */ + MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000 /* BT_ON */ + MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x80000000 /* BT_WAKE */ + MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x80000000 /* BT_HOST_WAKE */ + >; + }; + }; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + non-removable; + status = "okay"; +}; diff --git a/arch/arm/dts/imx6qdl-wandboard.dtsi b/arch/arm/dts/imx6qdl-wandboard.dtsi new file mode 100644 index 0000000000..381bf61fcd --- /dev/null +++ b/arch/arm/dts/imx6qdl-wandboard.dtsi @@ -0,0 +1,279 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * Author: Fabio Estevam + */ + +#include + +/ { + sound { + compatible = "fsl,imx6-wandboard-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx6-wandboard-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&codec>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <3>; + }; + + sound-spdif { + compatible = "fsl,imx-audio-spdif"; + model = "imx-spdif"; + spdif-controller = <&spdif>; + spdif-out; + }; + + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: regulator-usbotgvbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotgvbus>; + gpio = <&gpio3 22 GPIO_ACTIVE_LOW>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c1>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + codec: sgtl5000@a { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mclk>; + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks IMX6QDL_CLK_CKO>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_3p3v>; + lrclk-strength = <3>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + + imx6qdl-wandboard { + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_mclk: mclkgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 + >; + }; + + pinctrl_spdif: spdifgrp { + fsl,pins = < + MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 + >; + }; + + pinctrl_usbotgvbus: usbotgvbusgrp { + fsl,pins = < + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + >; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; + fsl,err006687-workaround-present; + status = "okay"; +}; + +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdif>; + status = "okay"; +}; + +&ssi1 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; + status = "okay"; +}; diff --git a/board/wandboard/MAINTAINERS b/board/wandboard/MAINTAINERS index d7cbae8f95..00a31a9346 100644 --- a/board/wandboard/MAINTAINERS +++ b/board/wandboard/MAINTAINERS @@ -1,6 +1,9 @@ WANDBOARD BOARD M: Fabio Estevam S: Maintained +F: arch/arm/dts/imx6qdl-wandboard.dtsi +F: arch/arm/dts/imx6qdl-wandboard-revb1.dtsi +F: arch/arm/dts/imx6dl-wandboard-revb1.dts F: board/wandboard/ F: include/configs/wandboard.h F: configs/wandboard_defconfig diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 9a67e63132..9307ea6c64 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revb1" CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y @@ -44,4 +46,3 @@ CONFIG_USB=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y From a23ade6d2684908cf08de82536c4c3676a0d1015 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:42 +0100 Subject: [PATCH 104/140] imx6: wandboard: convert to DM_GPIO and enable pinctrl driver Enable DM_GPIO and pinctrl in defconfig and add gpio_request() calls where required. Signed-off-by: Anatolij Gustschin --- board/wandboard/wandboard.c | 12 ++++++++++++ configs/wandboard_defconfig | 3 +++ 2 files changed, 15 insertions(+) diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 6af1b45882..e0d5769131 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -131,12 +131,14 @@ static void setup_iomux_enet(void) if (with_pmic) { SETUP_IOMUX_PADS(enet_ar8035_power_pads); /* enable AR8035 POWER */ + gpio_request(ETH_PHY_AR8035_POWER, "PHY_POWER"); gpio_direction_output(ETH_PHY_AR8035_POWER, 0); } /* wait until 3.3V of PHY and clock become stable */ mdelay(10); /* Reset AR8031 PHY */ + gpio_request(ETH_PHY_RESET, "PHY_RESET"); gpio_direction_output(ETH_PHY_RESET, 0); mdelay(10); gpio_set_value(ETH_PHY_RESET, 1); @@ -170,6 +172,11 @@ int board_mmc_init(bd_t *bis) int ret; u32 index = 0; +#if !CONFIG_IS_ENABLED(DM_MMC) + gpio_request(USDHC1_CD_GPIO, "USDHC1_CD"); + gpio_request(USDHC3_CD_GPIO, "USDHC3_CD"); +#endif + /* * Following map is done: * (U-Boot device node) (Physical Port) @@ -356,6 +363,8 @@ static void enable_fwadapt_7wvga(struct display_info_t const *dev) { SETUP_IOMUX_PADS(fwadapt_7wvga_pads); + gpio_request(IMX_GPIO_NR(2, 10), "DISP0_BKLEN"); + gpio_request(IMX_GPIO_NR(2, 11), "DISP0_VDDEN"); gpio_direction_output(IMX_GPIO_NR(2, 10), 1); gpio_direction_output(IMX_GPIO_NR(2, 11), 1); } @@ -418,6 +427,7 @@ static void setup_display(void) /* Disable LCD backlight */ SETUP_IOMUX_PAD(PAD_DI0_PIN4__GPIO4_IO20); + gpio_request(IMX_GPIO_NR(4, 20), "LCD_BKLEN"); gpio_direction_input(IMX_GPIO_NR(4, 20)); } #endif /* CONFIG_VIDEO_IPUV3 */ @@ -548,6 +558,8 @@ int board_init(void) int checkboard(void) { + gpio_request(REV_DETECTION, "REV_DETECT"); + if (is_revd1()) puts("Board: Wandboard rev D1\n"); else if (is_revc1()) diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 9307ea6c64..11cf4415ae 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -38,9 +38,12 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y +CONFIG_DM_GPIO=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_VIDEO=y From 68559dd42d0449e61e076090ac0877e0d0de57f9 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:43 +0100 Subject: [PATCH 105/140] imx6: wandboard: convert to DM_USB Drop CONFIG_USB_MAX_CONTROLLER_COUNT and enable DM_USB in defconfig. Signed-off-by: Anatolij Gustschin --- configs/wandboard_defconfig | 1 + include/configs/wandboard.h | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 11cf4415ae..9e13d7f67c 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -46,6 +46,7 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_THERMAL=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index e6d1fcacf5..e01e3e3669 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -51,7 +51,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 From f99cd5a787208227e665a76002322a17fad2f1b2 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:44 +0100 Subject: [PATCH 106/140] imx6: wandboard: convert to DM_VIDEO Enable DM_VIDEO in defconfig. Signed-off-by: Anatolij Gustschin --- configs/wandboard_defconfig | 2 +- include/configs/wandboard.h | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 9e13d7f67c..c4018cce4a 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -47,6 +47,6 @@ CONFIG_PINCTRL_IMX6=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_DM_USB=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y # CONFIG_VIDEO_SW_CURSOR is not set diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index e01e3e3669..13a9fd2450 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -63,7 +63,6 @@ #define CONFIG_PHY_ATHEROS /* Framebuffer */ -#ifdef CONFIG_VIDEO #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN @@ -72,7 +71,6 @@ #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP -#endif #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0\0" \ From ec837c82d7093140d834ff17995ec0a5417e88aa Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:45 +0100 Subject: [PATCH 107/140] imx6: wandboard: convert to DM_PMIC Enable DM_PMIC_PFUZE100 driver and add PMIC description to DTS. Rework power_init_board() code. Signed-off-by: Anatolij Gustschin --- arch/arm/dts/imx6qdl-wandboard.dtsi | 101 ++++++++++++++++++++++++++++ board/wandboard/wandboard.c | 34 ++++++---- configs/wandboard_defconfig | 2 + include/configs/wandboard.h | 6 -- 4 files changed, 123 insertions(+), 20 deletions(-) diff --git a/arch/arm/dts/imx6qdl-wandboard.dtsi b/arch/arm/dts/imx6qdl-wandboard.dtsi index 381bf61fcd..4d03d49fde 100644 --- a/arch/arm/dts/imx6qdl-wandboard.dtsi +++ b/arch/arm/dts/imx6qdl-wandboard.dtsi @@ -90,6 +90,107 @@ VDDIO-supply = <®_3p3v>; lrclk-strength = <3>; }; + + pmic: pfuze100@8 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; }; &iomuxc { diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index e0d5769131..23589df932 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -453,24 +453,30 @@ int board_early_init_f(void) int power_init_board(void) { - struct pmic *p; - u32 reg; + struct udevice *dev; + int reg, ret; - /* configure PFUZE100 PMIC */ - power_pfuze100_init(PMIC_I2C_BUS); - p = pmic_get("PFUZE100"); - if (p && !pmic_probe(p)) { - pmic_reg_read(p, PFUZE100_DEVICEID, ®); - printf("PMIC: PFUZE100 ID=0x%02x\n", reg); - with_pmic = true; + puts("PMIC: "); - /* Set VGEN2 to 1.5V and enable */ - pmic_reg_read(p, PFUZE100_VGEN2VOL, ®); - reg &= ~(LDO_VOL_MASK); - reg |= (LDOA_1_50V | (1 << (LDO_EN))); - pmic_reg_write(p, PFUZE100_VGEN2VOL, reg); + ret = pmic_get("pfuze100", &dev); + if (ret < 0) { + printf("pmic_get() ret %d\n", ret); + return 0; } + reg = pmic_reg_read(dev, PFUZE100_DEVICEID); + if (reg < 0) { + printf("pmic_reg_read() ret %d\n", reg); + return 0; + } + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); + with_pmic = true; + + /* Set VGEN2 to 1.5V and enable */ + reg = pmic_reg_read(dev, PFUZE100_VGEN2VOL); + reg &= ~(LDO_VOL_MASK); + reg |= (LDOA_1_50V | (1 << (LDO_EN))); + pmic_reg_write(dev, PFUZE100_VGEN2VOL, reg); return 0; } diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index c4018cce4a..63f2639bd3 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -44,6 +44,8 @@ CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 13a9fd2450..aeb66ad454 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -40,12 +40,6 @@ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 100000 -/* PMIC */ -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_PFUZE100 -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 - /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 From c60954207983bbeaa343ef730d82224c940053e8 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:46 +0100 Subject: [PATCH 108/140] imx6: wandboard: convert to DM_I2C Allow building with DM_I2C enabled. Signed-off-by: Anatolij Gustschin --- board/wandboard/wandboard.c | 23 ++++++++++++++++++----- configs/wandboard_defconfig | 5 +++++ include/configs/wandboard.h | 8 -------- 3 files changed, 23 insertions(+), 13 deletions(-) diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 23589df932..c0902abe38 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -355,8 +355,21 @@ static void do_enable_hdmi(struct display_info_t const *dev) static int detect_i2c(struct display_info_t const *dev) { +#ifdef CONFIG_DM_I2C + struct udevice *bus, *udev; + int rc; + + rc = uclass_get_device_by_seq(UCLASS_I2C, dev->bus, &bus); + if (rc) + return rc; + rc = dm_i2c_probe(bus, dev->addr, 0, &udev); + if (rc) + return 0; + return 1; +#else return (0 == i2c_set_bus_num(dev->bus)) && (0 == i2c_probe(dev->addr)); +#endif } static void enable_fwadapt_7wvga(struct display_info_t const *dev) @@ -547,13 +560,13 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; #if defined(CONFIG_VIDEO_IPUV3) - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c2_pad_info); + setup_i2c(1, CONFIG_SYS_MXC_I2C1_SPEED, 0x7f, &mx6dl_i2c2_pad_info); if (is_mx6dq() || is_mx6dqp()) { - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c2_pad_info); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c3_pad_info); + setup_i2c(1, CONFIG_SYS_MXC_I2C1_SPEED, 0x7f, &mx6q_i2c2_pad_info); + setup_i2c(2, CONFIG_SYS_MXC_I2C2_SPEED, 0x7f, &mx6q_i2c3_pad_info); } else { - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c2_pad_info); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c3_pad_info); + setup_i2c(1, CONFIG_SYS_MXC_I2C1_SPEED, 0x7f, &mx6dl_i2c2_pad_info); + setup_i2c(2, CONFIG_SYS_MXC_I2C2_SPEED, 0x7f, &mx6dl_i2c3_pad_info); } setup_display(); diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 63f2639bd3..9d9fbffbbd 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -39,6 +39,11 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_MII=y diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index aeb66ad454..2e6262f0f4 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -32,14 +32,6 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_SPEED 100000 - /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 From 2cbf1b3215e17ea9e2eec98a0581da25709f066f Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 18 Mar 2019 23:29:47 +0100 Subject: [PATCH 109/140] imx6: wandboard: convert to DM_MMC Move SDHC init to SPL code since it is not required with DM_MMC. Enable DM_MMC support. Signed-off-by: Anatolij Gustschin --- board/wandboard/spl.c | 92 +++++++++++++++++++++++++++++++++++ board/wandboard/wandboard.c | 97 ------------------------------------- configs/wandboard_defconfig | 1 + 3 files changed, 93 insertions(+), 97 deletions(-) diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index 9c3350019c..000cb109fc 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -422,4 +422,96 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); } + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2) +#define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC1_BASE_ADDR}, +}; + +static iomux_v3_cfg_t const usdhc1_pads[] = { + IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + /* Carrier MicroSD Card Detect */ + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + /* SOM MicroSD Card Detect */ + IOMUX_PADS(PAD_EIM_DA9__GPIO3_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + case USDHC3_BASE_ADDR: + ret = !gpio_get_value(USDHC3_CD_GPIO); + break; + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + int ret; + u32 index = 0; + + /* + * Following map is done: + * (U-Boot device node) (Physical Port) + * mmc0 SOM MicroSD + * mmc1 Carrier board MicroSD + */ + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + SETUP_IOMUX_PADS(usdhc3_pads); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 4; + gpio_direction_input(USDHC3_CD_GPIO); + break; + case 1: + SETUP_IOMUX_PADS(usdhc1_pads); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[1].max_bus_width = 4; + gpio_direction_input(USDHC1_CD_GPIO); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return -EINVAL; + } + + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + if (ret) + return ret; + } + + return 0; +} + #endif diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index c0902abe38..69fbc8b690 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -22,8 +22,6 @@ #include #include #include -#include -#include #include #include #include @@ -37,10 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ - PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ - PAD_CTL_SRE_FAST | PAD_CTL_HYS) - #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) @@ -48,8 +42,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ PAD_CTL_ODE | PAD_CTL_SRE_FAST) -#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2) -#define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9) #define ETH_PHY_RESET IMX_GPIO_NR(3, 29) #define ETH_PHY_AR8035_POWER IMX_GPIO_NR(7, 13) #define REV_DETECTION IMX_GPIO_NR(2, 28) @@ -68,28 +60,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), }; -static iomux_v3_cfg_t const usdhc1_pads[] = { - IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - /* Carrier MicroSD Card Detect */ - IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -static iomux_v3_cfg_t const usdhc3_pads[] = { - IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - /* SOM MicroSD Card Detect */ - IOMUX_PADS(PAD_EIM_DA9__GPIO3_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - static iomux_v3_cfg_t const enet_pads[] = { IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), @@ -145,73 +115,6 @@ static void setup_iomux_enet(void) udelay(100); } -static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC3_BASE_ADDR}, - {USDHC1_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC1_BASE_ADDR: - ret = !gpio_get_value(USDHC1_CD_GPIO); - break; - case USDHC3_BASE_ADDR: - ret = !gpio_get_value(USDHC3_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int ret; - u32 index = 0; - -#if !CONFIG_IS_ENABLED(DM_MMC) - gpio_request(USDHC1_CD_GPIO, "USDHC1_CD"); - gpio_request(USDHC3_CD_GPIO, "USDHC3_CD"); -#endif - - /* - * Following map is done: - * (U-Boot device node) (Physical Port) - * mmc0 SOM MicroSD - * mmc1 Carrier board MicroSD - */ - for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { - switch (index) { - case 0: - SETUP_IOMUX_PADS(usdhc3_pads); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[0].max_bus_width = 4; - gpio_direction_input(USDHC3_CD_GPIO); - break; - case 1: - SETUP_IOMUX_PADS(usdhc1_pads); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - usdhc_cfg[1].max_bus_width = 4; - gpio_direction_input(USDHC1_CD_GPIO); - break; - default: - printf("Warning: you configured more USDHC controllers" - "(%d) then supported by the board (%d)\n", - index + 1, CONFIG_SYS_FSL_USDHC_NUM); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); - if (ret) - return ret; - } - - return 0; -} - static int ar8031_phy_fixup(struct phy_device *phydev) { unsigned short val; diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 9d9fbffbbd..7f64ea65b1 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -44,6 +44,7 @@ CONFIG_SYS_I2C_MXC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_MII=y From 7b48e2b05a14d1952a3dcaf689c9d4c3d088dbfb Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:51 +0100 Subject: [PATCH 110/140] Add missing space in comment Spotted two missing spaces in comments. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- drivers/video/videomodes.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index a4c587a390..63cd605b6a 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -112,7 +112,7 @@ void build_info(void) sc_misc_build_info(-1, &sc_build, &sc_commit); if (!sc_build) { printf("SCFW does not support build info\n"); - sc_commit = 0; /* Display 0 when the build info is not supported*/ + sc_commit = 0; /* Display 0 when the build info is not supported */ } printf("Build: SCFW %x\n", sc_commit); } diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c index 1cfeaa980f..d7614329ff 100644 --- a/drivers/video/videomodes.c +++ b/drivers/video/videomodes.c @@ -397,7 +397,7 @@ int video_edid_dtd_to_ctfb_res_modes(struct edid_detailed_timing *t, EDID_DETAILED_TIMING_VERTICAL_BLANKING(*t) == 0 || EDID_DETAILED_TIMING_HSYNC_OFFSET(*t) == 0 || EDID_DETAILED_TIMING_VSYNC_OFFSET(*t) == 0 || - /* 3d formats are not supported*/ + /* 3d formats are not supported */ EDID_DETAILED_TIMING_FLAG_STEREO(*t) != 0) return -EINVAL; From 872fc0d8acb65f0577bcfd396d61586cdeba3ad0 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:52 +0100 Subject: [PATCH 111/140] vf610: ddrmc: add missing include The DDR memory controller include file for the Vybrid uses iomux_v3_cfg_t without actually including iomux-vf610.h. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- arch/arm/include/asm/arch-vf610/ddrmc-vf610.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/include/asm/arch-vf610/ddrmc-vf610.h b/arch/arm/include/asm/arch-vf610/ddrmc-vf610.h index c7da2b8a5e..03e3cecb95 100644 --- a/arch/arm/include/asm/arch-vf610/ddrmc-vf610.h +++ b/arch/arm/include/asm/arch-vf610/ddrmc-vf610.h @@ -10,6 +10,8 @@ #ifndef __ASM_ARCH_VF610_DDRMC_H #define __ASM_ARCH_VF610_DDRMC_H +#include + struct ddr3_jedec_timings { u8 tinit; u32 trst_pwron; From 37822a6ca195ab0ad9c95761adc4c817be32ba0c Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:53 +0100 Subject: [PATCH 112/140] imx: bootaux: add dependency on vf610 Allow using bootaux also on VF610 aka Vybrid. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- arch/arm/mach-imx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8631fbd481..ec09ef240f 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -23,7 +23,7 @@ config IMX_RDC config IMX_BOOTAUX bool "Support boot auxiliary core" - depends on ARCH_MX7 || ARCH_MX6 + depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 help bootaux [addr] to boot auxiliary core. From 20df4b570d164675da17bf23998e51271f5a79a3 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:54 +0100 Subject: [PATCH 113/140] configs: move CONFIG_USB_EHCI_VF to Kconfig Move CONFIG_USB_EHCI_VF to drivers/usb/host/Kconfig and update the one and only user thereof being colibri_vf. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- drivers/usb/host/Kconfig | 7 +++++++ include/configs/colibri_vf.h | 1 - scripts/config_whitelist.txt | 1 - 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index ba1e6bfa43..0fbc115801 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -154,6 +154,13 @@ config USB_EHCI_OMAP Enables support for the on-chip EHCI controller on OMAP3 and later SoCs. +config USB_EHCI_VF + bool "Support for Vybrid on-chip EHCI USB controller" + depends on ARCH_VF610 + default y + help + Enables support for the on-chip EHCI controller on Vybrid SoCs. + if USB_EHCI_MX7 config MXC_USB_OTG_HACTIVE diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 31ff8a00a6..2fe7f217fa 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -159,7 +159,6 @@ #endif /* USB Host Support */ -#define CONFIG_USB_EHCI_VF #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index fa98efc24c..31c1ba3477 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -4514,7 +4514,6 @@ CONFIG_USB_EHCI_MXS CONFIG_USB_EHCI_SPEAR CONFIG_USB_EHCI_TXFIFO_THRESH CONFIG_USB_EHCI_VCT -CONFIG_USB_EHCI_VF CONFIG_USB_ETH_QMULT CONFIG_USB_ETH_SUBSET CONFIG_USB_EXT2_BOOT From 214fde90623721aa1b583c42ff0ca73c046524d8 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:55 +0100 Subject: [PATCH 114/140] configs: colibri_vf: remove obsolete mmc/sd card environment Remove obsolete MMC/SD card environment configuration dating back to un-fused samples times. While at it also remove meanwhile spurious "USB Storage" comment. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- include/configs/colibri_vf.h | 9 --------- 1 file changed, 9 deletions(-) diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 2fe7f217fa..7b974d9e97 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -145,13 +145,6 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Environment organization */ - -#ifdef CONFIG_ENV_IS_IN_MMC -#define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_OFFSET (12 * 64 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) -#endif - #ifdef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE (64 * 2048) #define CONFIG_ENV_RANGE (4 * 64 * 2048) @@ -165,6 +158,4 @@ /* USB DFU */ #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) -/* USB Storage */ - #endif /* __CONFIG_H */ From 34db6e871714c860ff71bf27066f3b2d82a49800 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:56 +0100 Subject: [PATCH 115/140] configs: colibri_vf: limit size of malloc() pool before relocation Limit the size of the malloc() pool before relocation (SYS_MALLOC_F_LEN). Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- configs/colibri_vf_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 4192501257..8188582ed9 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 +CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_TARGET_COLIBRI_VF=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_NR_DRAM_BANKS=1 From 0a6f625d65b25d995fe15b775a0bd26fb8c901e8 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:57 +0100 Subject: [PATCH 116/140] configs: move CONFIG_MXC_OCOTP to Kconfig While commit 3e020f03e94f ("driver: misc: add MXC_OCOTP Kconfig entry") introduced a Kconfig entry it did not actually migrate all configurations to using it. As CONFIG_MXC_OCOTP was in mx{6/7}_common.h enable it by default on those architectures. Additionally, also enable it on ARCH_IMX8M and ARCH_VF610 where all current members enabled it through their legacy configuration header files. Signed-off-by: Marcel Ziswiler Reviewed-by: Lukasz Majewski --- configs/bk4r1_defconfig | 1 - configs/pcm052_defconfig | 1 - drivers/misc/Kconfig | 2 ++ include/configs/advantech_dms-ba16.h | 2 -- include/configs/apalis_imx6.h | 5 ----- include/configs/colibri_imx6.h | 5 ----- include/configs/colibri_vf.h | 4 ---- include/configs/dh_imx6.h | 5 ----- include/configs/ge_bx50v3.h | 2 -- include/configs/imx8mq_evk.h | 1 - include/configs/kp_imx6q_tpc.h | 5 ----- include/configs/mx6_common.h | 3 --- include/configs/mx7_common.h | 3 --- include/configs/vf610twr.h | 4 ---- 14 files changed, 2 insertions(+), 41 deletions(-) diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index e3852f4856..439207fd39 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -49,7 +49,6 @@ CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y -CONFIG_MXC_OCOTP=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SYS_I2C_EEPROM_BUS=2 diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 906abbfd69..fd093b35c2 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -36,7 +36,6 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_MISC=y -CONFIG_MXC_OCOTP=y CONFIG_I2C_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SYS_I2C_EEPROM_BUS=2 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index d6e677fba8..0e645f58be 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -128,6 +128,8 @@ config JZ4780_EFUSE config MXC_OCOTP bool "Enable MXC OCOTP Driver" + depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_VF610 + default y help If you say Y here, you will get support for the One Time Programmable memory pages that are stored on the some diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index 034fd9c51b..57edeee941 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -34,8 +34,6 @@ #define CONFIG_MXC_UART -#define CONFIG_MXC_OCOTP - /* SATA Configs */ #define CONFIG_SYS_SATA_MAX_DEVICE 1 #define CONFIG_DWC_AHSATA_PORT_ID 0 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index fc72a55255..96169f55f0 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -41,11 +41,6 @@ #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 -/* OCOTP Configs */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* MMC Configs */ #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 802270e401..803c9be064 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -39,11 +39,6 @@ #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_MXC_I2C3_SPEED 400000 -/* OCOTP Configs */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* MMC Configs */ #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 7b974d9e97..e7b786e48b 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -17,10 +17,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - #ifdef CONFIG_VIDEO_FSL_DCU_FB #define CONFIG_SPLASH_SCREEN_ALIGN #define CONFIG_VIDEO_LOGO diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 48514ff076..3eee382a64 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -48,11 +48,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_ARP_TIMEOUT 200UL -/* Fuses */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* I2C Configs */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 7c2d891865..196f114c60 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -35,8 +35,6 @@ #define CONFIG_MXC_UART -#define CONFIG_MXC_OCOTP - /* SATA Configs */ #ifdef CONFIG_CMD_SATA #define CONFIG_SYS_SATA_MAX_DEVICE 1 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index a9e38a70e6..6094d1bf18 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -230,7 +230,6 @@ #define CONFIG_MXC_GPIO -#define CONFIG_MXC_OCOTP #define CONFIG_CMD_FUSE /* I2C Configs */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index b6b27ee1d5..d2ebf92953 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -31,11 +31,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_ARP_TIMEOUT 200UL -/* Fuses */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* I2C Configs */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index cdc8833778..6b20c6db58 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -57,9 +57,6 @@ /* MMC */ #define CONFIG_FSL_USDHC -/* Fuses */ -#define CONFIG_MXC_OCOTP - /* Secure boot (HAB) support */ #ifdef CONFIG_SECURE_BOOT #define CONFIG_CSF_SIZE 0x2000 diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index a895c936aa..cc7e87269e 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -42,9 +42,6 @@ /* MMC */ #define CONFIG_FSL_USDHC -/* Fuses */ -#define CONFIG_MXC_OCOTP - #define CONFIG_ARMV7_SECURE_BASE 0x00900000 #define CONFIG_ARMV7_PSCI_1_0 diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 686a383739..ba85bc91e7 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -19,10 +19,6 @@ /* Enable passing of ATAGs */ #define CONFIG_CMDLINE_TAG -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) From 1854a9c91699b38c8da4f409c6c1f79243b9ded5 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:58 +0100 Subject: [PATCH 117/140] ARM: dts: colibri_vf: update device trees Update device tree in preparation of further driver model migration: Ethernet FEC, ESDHC aka MMC/SD card, I2C, NFC aka NAND flash controller, USBH_PEN GPIO regulator. Add iomux resp. pinctrl entries to be removed from proprietary platform data: DSPI, ESDHC, FEC, I2C, NFC, UART, USBH_PEN GPIO. Introduce a U-Boot specific device tree with some required u-boot,dm-pre-reloc properties: soc, aips0, pinctrl_ddr and uart0 incl. pinctrl. While at it also update the MAINTAINERS file. Signed-off-by: Marcel Ziswiler --- arch/arm/dts/vf-colibri-u-boot.dtsi | 23 ++++ arch/arm/dts/vf-colibri.dtsi | 198 ++++++++++++++++++++++++++- arch/arm/dts/vf500-colibri.dts | 1 + arch/arm/dts/vf610-colibri.dts | 1 + board/toradex/colibri_vf/MAINTAINERS | 4 +- 5 files changed, 224 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/vf-colibri-u-boot.dtsi diff --git a/arch/arm/dts/vf-colibri-u-boot.dtsi b/arch/arm/dts/vf-colibri-u-boot.dtsi new file mode 100644 index 0000000000..db86739805 --- /dev/null +++ b/arch/arm/dts/vf-colibri-u-boot.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 + +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&aips0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl_ddr { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/vf-colibri.dtsi b/arch/arm/dts/vf-colibri.dtsi index 923dc2451c..5ce17076e9 100644 --- a/arch/arm/dts/vf-colibri.dtsi +++ b/arch/arm/dts/vf-colibri.dtsi @@ -1,18 +1,37 @@ // SPDX-License-Identifier: GPL-2.0+ OR X11 /* - * Copyright 2014 Toradex AG + * Copyright 2014-2019 Toradex AG */ + +/dts-v1/; #include "vf.dtsi" +#include "vf610-pinfunc.h" / { chosen { stdout-path = &uart0; }; + + aliases { + usb0 = &ehci0; /* required for ums */ + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1_reg>; + regulator-name = "VCC_USB[1-4]"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio2 19 GPIO_ACTIVE_LOW>; /* USBH_PEN */ + }; }; &dspi1 { - status = "okay"; bus-num = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dspi1>; + status = "okay"; spi_cmd: sspi@0 { reg = <0>; @@ -29,8 +48,183 @@ &ehci1 { dr_mode = "host"; status = "okay"; + vbus-supply = <®_usbh_vbus>; +}; + +&esdhc1 { + bus-width = <4>; + cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + status = "okay"; +}; + +&fec1 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc: m41t0m6@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ddr>; + + pinctrl_ddr: ddrgrp { + fsl,pins = < + VF610_PAD_DDR_A15__DDR_A_15 0x180 + VF610_PAD_DDR_A14__DDR_A_14 0x180 + VF610_PAD_DDR_A13__DDR_A_13 0x180 + VF610_PAD_DDR_A12__DDR_A_12 0x180 + VF610_PAD_DDR_A11__DDR_A_11 0x180 + VF610_PAD_DDR_A10__DDR_A_10 0x180 + VF610_PAD_DDR_A9__DDR_A_9 0x180 + VF610_PAD_DDR_A8__DDR_A_8 0x180 + VF610_PAD_DDR_A7__DDR_A_7 0x180 + VF610_PAD_DDR_A6__DDR_A_6 0x180 + VF610_PAD_DDR_A5__DDR_A_5 0x180 + VF610_PAD_DDR_A4__DDR_A_4 0x180 + VF610_PAD_DDR_A3__DDR_A_3 0x180 + VF610_PAD_DDR_A2__DDR_A_2 0x180 + VF610_PAD_DDR_A1__DDR_A_1 0x180 + VF610_PAD_DDR_A0__DDR_A_0 0x180 + VF610_PAD_DDR_BA2__DDR_BA_2 0x180 + VF610_PAD_DDR_BA1__DDR_BA_1 0x180 + VF610_PAD_DDR_BA0__DDR_BA_0 0x180 + VF610_PAD_DDR_CAS__DDR_CAS_B 0x180 + VF610_PAD_DDR_CKE__DDR_CKE_0 0x180 + VF610_PAD_DDR_CLK__DDR_CLK_0 0x180 + VF610_PAD_DDR_CS__DDR_CS_B_0 0x180 + VF610_PAD_DDR_D15__DDR_D_15 0x10180 + VF610_PAD_DDR_D14__DDR_D_14 0x10180 + VF610_PAD_DDR_D13__DDR_D_13 0x10180 + VF610_PAD_DDR_D12__DDR_D_12 0x10180 + VF610_PAD_DDR_D11__DDR_D_11 0x10180 + VF610_PAD_DDR_D10__DDR_D_10 0x10180 + VF610_PAD_DDR_D9__DDR_D_9 0x10180 + VF610_PAD_DDR_D8__DDR_D_8 0x10180 + VF610_PAD_DDR_D7__DDR_D_7 0x10180 + VF610_PAD_DDR_D6__DDR_D_6 0x10180 + VF610_PAD_DDR_D5__DDR_D_5 0x10180 + VF610_PAD_DDR_D4__DDR_D_4 0x10180 + VF610_PAD_DDR_D3__DDR_D_3 0x10180 + VF610_PAD_DDR_D2__DDR_D_2 0x10180 + VF610_PAD_DDR_D1__DDR_D_1 0x10180 + VF610_PAD_DDR_D0__DDR_D_0 0x10180 + VF610_PAD_DDR_DQM1__DDR_DQM_1 0x10180 + VF610_PAD_DDR_DQM0__DDR_DQM_0 0x10180 + VF610_PAD_DDR_DQS1__DDR_DQS_1 0x10180 + VF610_PAD_DDR_DQS0__DDR_DQS_0 0x10180 + VF610_PAD_DDR_RAS__DDR_RAS_B 0x180 + VF610_PAD_DDR_WE__DDR_WE_B 0x180 + VF610_PAD_DDR_ODT1__DDR_ODT_0 0x180 + VF610_PAD_DDR_ODT0__DDR_ODT_1 0x180 + VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 0x180 + VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2 0x180 + VF610_PAD_DDR_RESETB 0x180 + >; + }; + + pinctrl_dspi1: dspi1grp { + fsl,pins = < + VF610_PAD_PTD5__DSPI1_CS0 0x33e2 + VF610_PAD_PTD6__DSPI1_SIN 0x33e1 + VF610_PAD_PTD7__DSPI1_SOUT 0x33e2 + VF610_PAD_PTD8__DSPI1_SCK 0x33e2 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTB20__GPIO_42 0x219d + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + VF610_PAD_PTA6__RMII_CLKOUT 0x30df + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30df + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30df + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30df + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30df + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30df + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30df + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30df + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30df + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30df + >; + }; + + pinctrl_i2c0: i2c0grp { + fsl,pins = < + VF610_PAD_PTB14__I2C0_SCL 0x37ff + VF610_PAD_PTB15__I2C0_SDA 0x37ff + >; + }; + + pinctrl_nfc: nfcgrp { + fsl,pins = < + VF610_PAD_PTD23__NF_IO7 0x28df + VF610_PAD_PTD22__NF_IO6 0x28df + VF610_PAD_PTD21__NF_IO5 0x28df + VF610_PAD_PTD20__NF_IO4 0x28df + VF610_PAD_PTD19__NF_IO3 0x28df + VF610_PAD_PTD18__NF_IO2 0x28df + VF610_PAD_PTD17__NF_IO1 0x28df + VF610_PAD_PTD16__NF_IO0 0x28df + VF610_PAD_PTB24__NF_WE_B 0x28c2 + VF610_PAD_PTB25__NF_CE0_B 0x28c2 + VF610_PAD_PTB27__NF_RE_B 0x28c2 + VF610_PAD_PTC26__NF_RB_B 0x283d + VF610_PAD_PTC27__NF_ALE 0x28c2 + VF610_PAD_PTC28__NF_CLE 0x28c2 + >; + }; + + pinctrl_uart0: uart0grp { + fsl,pins = < + VF610_PAD_PTB10__UART0_TX 0x11af + VF610_PAD_PTB11__UART0_RX 0x11af + VF610_PAD_PTB12__UART0_RTS 0x11af + VF610_PAD_PTB13__UART0_CTS 0x11af + >; + }; + + pinctrl_usbh1_reg: gpio_usb_vbus { + fsl,pins = < + VF610_PAD_PTD4__GPIO_83 0x22ed + >; + }; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nfc>; + status = "okay"; }; &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; status = "okay"; }; diff --git a/arch/arm/dts/vf500-colibri.dts b/arch/arm/dts/vf500-colibri.dts index 3f33d970e0..c83a16fdcb 100644 --- a/arch/arm/dts/vf500-colibri.dts +++ b/arch/arm/dts/vf500-colibri.dts @@ -5,6 +5,7 @@ /dts-v1/; #include "vf-colibri.dtsi" +#include "vf-colibri-u-boot.dtsi" / { model = "Toradex Colibri VF50"; diff --git a/arch/arm/dts/vf610-colibri.dts b/arch/arm/dts/vf610-colibri.dts index 0a6b937fee..7275fec279 100644 --- a/arch/arm/dts/vf610-colibri.dts +++ b/arch/arm/dts/vf610-colibri.dts @@ -5,6 +5,7 @@ /dts-v1/; #include "vf-colibri.dtsi" +#include "vf-colibri-u-boot.dtsi" / { model = "Toradex Colibri VF61"; diff --git a/board/toradex/colibri_vf/MAINTAINERS b/board/toradex/colibri_vf/MAINTAINERS index a1217a47bd..3ee2b33152 100644 --- a/board/toradex/colibri_vf/MAINTAINERS +++ b/board/toradex/colibri_vf/MAINTAINERS @@ -1,10 +1,12 @@ Colibri VFxx M: Stefan Agner +W: http://developer.toradex.com/software/linux/linux-software +W: https://www.toradex.com/community S: Maintained F: board/toradex/colibri_vf/ F: include/configs/colibri_vf.h F: configs/colibri_vf_defconfig -F: configs/colibri_vf_dtb_defconfig F: arch/arm/dts/vf-colibri.dtsi +F: arch/arm/dts/vf-colibri-u-boot.dtsi F: arch/arm/dts/vf500-colibri.dts F: arch/arm/dts/vf610-colibri.dts From c5954431eb6c04ec75e6afe61199c685f2f93840 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:24:59 +0100 Subject: [PATCH 118/140] configs: colibri_vf: disable obscure options Disable more obscure options to save another 26 KB in preparation of the upcoming driver model migration. Signed-off-by: Marcel Ziswiler --- configs/colibri_vf_defconfig | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 8188582ed9..706d7ca634 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -17,11 +17,17 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set CONFIG_SYS_PROMPT="Colibri VFxx # " +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADB is not set @@ -46,10 +52,10 @@ CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_DFU_MMC=y CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y +# CONFIG_MMC_HW_PARTITIONING is not set CONFIG_FSL_ESDHC=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y @@ -57,6 +63,8 @@ CONFIG_MTD_UBI_FASTMAP=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y +# CONFIG_SPL_SERIAL_PRESENT is not set +# CONFIG_TPL_SERIAL_PRESENT is not set CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_USB=y From 6d277bc323eb7a38686a1fca401f561abd1546e7 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:25:00 +0100 Subject: [PATCH 119/140] colibri_vf: migrate pinctrl and regulators to dtb/dm Migrate pinctrl and regulators to device tree resp. driver model: DDR, DSPI, ENET, ESDHC, I2C, NFC and UART. Enable CMD_DM, PINCTRL and DM_REGULATOR. While at it also update copyright period and sort include files. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- board/toradex/colibri_vf/colibri_vf.c | 139 ++------------------------ configs/colibri_vf_defconfig | 5 + 2 files changed, 16 insertions(+), 128 deletions(-) diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 79f702f2bf..8e0dea2dc2 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -1,43 +1,36 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2015 Toradex, Inc. + * Copyright 2015-2019 Toradex, Inc. * * Based on vf610twr.c: * Copyright 2013 Freescale Semiconductor, Inc. */ #include -#include + +#include +#include +#include #include #include -#include -#include -#include -#include +#include +#include #include #include #include +#include +#include #include #include +#include #include #include -#include -#include -#include #include + #include "../common/tdx-common.h" DECLARE_GLOBAL_DATA_PTR; -#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE) - -#define ESDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE) - -#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE) - #define USB_PEN_GPIO 83 #define USB_CDET_GPIO 102 #define PTC0_GPIO_45 45 @@ -89,11 +82,6 @@ static struct ddrmc_cr_setting colibri_vf_cr_settings[] = { { 0, -1 } }; -static const iomux_v3_cfg_t usb_pads[] = { - VF610_PAD_PTD4__GPIO_83, - VF610_PAD_PTC29__GPIO_102, -}; - int dram_init(void) { static const struct ddr3_jedec_timings timings = { @@ -147,92 +135,12 @@ int dram_init(void) .wldqsen = 25, }; - ddrmc_setup_iomux(NULL, 0); - ddrmc_ctrl_init_ddr3(&timings, colibri_vf_cr_settings, NULL, 1, 2); gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); return 0; } -static void setup_iomux_uart(void) -{ - static const iomux_v3_cfg_t uart_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTB4__UART1_TX, UART_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTB5__UART1_RX, UART_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTB10__UART0_TX, UART_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTB11__UART0_RX, UART_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); -} - -static void setup_iomux_enet(void) -{ - static const iomux_v3_cfg_t enet0_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTA6__RMII0_CLKOUT, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC10__RMII1_MDIO, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC9__RMII1_MDC, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC11__RMII1_CRS_DV, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC12__RMII1_RD1, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC13__RMII1_RD0, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC14__RMII1_RXER, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC15__RMII1_TD1, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC16__RMII1_TD0, ENET_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTC17__RMII1_TXEN, ENET_PAD_CTRL), - }; - - imx_iomux_v3_setup_multiple_pads(enet0_pads, ARRAY_SIZE(enet0_pads)); -} - -static void setup_iomux_i2c(void) -{ - static const iomux_v3_cfg_t i2c0_pads[] = { - VF610_PAD_PTB14__I2C0_SCL, - VF610_PAD_PTB15__I2C0_SDA, - }; - - imx_iomux_v3_setup_multiple_pads(i2c0_pads, ARRAY_SIZE(i2c0_pads)); -} - -#ifdef CONFIG_NAND_VF610_NFC -static void setup_iomux_nfc(void) -{ - static const iomux_v3_cfg_t nfc_pads[] = { - VF610_PAD_PTD23__NF_IO7, - VF610_PAD_PTD22__NF_IO6, - VF610_PAD_PTD21__NF_IO5, - VF610_PAD_PTD20__NF_IO4, - VF610_PAD_PTD19__NF_IO3, - VF610_PAD_PTD18__NF_IO2, - VF610_PAD_PTD17__NF_IO1, - VF610_PAD_PTD16__NF_IO0, - VF610_PAD_PTB24__NF_WE_B, - VF610_PAD_PTB25__NF_CE0_B, - VF610_PAD_PTB27__NF_RE_B, - VF610_PAD_PTC26__NF_RB_B, - VF610_PAD_PTC27__NF_ALE, - VF610_PAD_PTC28__NF_CLE - }; - - imx_iomux_v3_setup_multiple_pads(nfc_pads, ARRAY_SIZE(nfc_pads)); -} -#endif - -#ifdef CONFIG_FSL_DSPI -static void setup_iomux_dspi(void) -{ - static const iomux_v3_cfg_t dspi1_pads[] = { - VF610_PAD_PTD5__DSPI1_CS0, - VF610_PAD_PTD6__DSPI1_SIN, - VF610_PAD_PTD7__DSPI1_SOUT, - VF610_PAD_PTD8__DSPI1_SCK, - }; - - imx_iomux_v3_setup_multiple_pads(dspi1_pads, ARRAY_SIZE(dspi1_pads)); -} -#endif - #ifdef CONFIG_VYBRID_GPIO static void setup_iomux_gpio(void) { @@ -344,20 +252,8 @@ int board_mmc_getcd(struct mmc *mmc) int board_mmc_init(bd_t *bis) { - static const iomux_v3_cfg_t esdhc1_pads[] = { - NEW_PAD_CTRL(VF610_PAD_PTA24__ESDHC1_CLK, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA25__ESDHC1_CMD, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA26__ESDHC1_DAT0, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA27__ESDHC1_DAT1, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA28__ESDHC1_DAT2, ESDHC_PAD_CTRL), - NEW_PAD_CTRL(VF610_PAD_PTA29__ESDHC1_DAT3, ESDHC_PAD_CTRL), - }; - esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - imx_iomux_v3_setup_multiple_pads( - esdhc1_pads, ARRAY_SIZE(esdhc1_pads)); - return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); } #endif @@ -496,21 +392,10 @@ int board_early_init_f(void) clock_init(); mscm_init(); - setup_iomux_uart(); - setup_iomux_enet(); - setup_iomux_i2c(); -#ifdef CONFIG_NAND_VF610_NFC - setup_iomux_nfc(); -#endif - #ifdef CONFIG_VYBRID_GPIO setup_iomux_gpio(); #endif -#ifdef CONFIG_FSL_DSPI - setup_iomux_dspi(); -#endif - #ifdef CONFIG_VIDEO_FSL_DCU_FB setup_tcon(); setup_iomux_fsl_dcu(); @@ -594,8 +479,6 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_USB_EHCI_VF int board_ehci_hcd_init(int port) { - imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); - switch (port) { case 0: /* USBC does not have PEN, also configured as USB client only */ diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 706d7ca634..9a91cb4b82 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y @@ -63,6 +64,10 @@ CONFIG_MTD_UBI_FASTMAP=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_VYBRID=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y # CONFIG_SPL_SERIAL_PRESENT is not set # CONFIG_TPL_SERIAL_PRESENT is not set CONFIG_DM_SERIAL=y From 9f9ecdfffd070b302245c1470a259a2af32c47de Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:25:01 +0100 Subject: [PATCH 120/140] colibri_vf: migrate fec, esdhc, nfc and usb to driver model Migrate FEC, ESDHC, NFC and USB to driver model. While at it also do no longer enable optional I2C clock in board file as the generic clock code now handles this. Note for space reason and as it is not required just for booting we do not enable I2C in U-Boot by default. While at it also update copyright period. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- board/toradex/colibri_vf/colibri_vf.c | 82 +-------------------------- configs/colibri_vf_defconfig | 5 ++ include/configs/colibri_vf.h | 13 +---- 3 files changed, 7 insertions(+), 93 deletions(-) diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 8e0dea2dc2..c4d05532fe 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -16,23 +16,16 @@ #include #include #include -#include #include #include -#include #include -#include -#include #include -#include #include #include "../common/tdx-common.h" DECLARE_GLOBAL_DATA_PTR; -#define USB_PEN_GPIO 83 -#define USB_CDET_GPIO 102 #define PTC0_GPIO_45 45 static struct ddrmc_cr_setting colibri_vf_cr_settings[] = { @@ -239,25 +232,6 @@ static void setup_tcon(void) } #endif -#ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg esdhc_cfg[1] = { - {ESDHC1_BASE_ADDR}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - /* eSDHC1 is always present */ - return 1; -} - -int board_mmc_init(bd_t *bis) -{ - esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - - return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); -} -#endif - static inline int is_colibri_vf61(void) { struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR; @@ -290,7 +264,7 @@ static void clock_init(void) CCM_CCGR3_ANADIG_CTRL_MASK | CCM_CCGR3_SCSC_CTRL_MASK); clrsetbits_le32(&ccm->ccgr4, CCM_REG_CTRL_MASK, CCM_CCGR4_WKUP_CTRL_MASK | CCM_CCGR4_CCM_CTRL_MASK | - CCM_CCGR4_GPC_CTRL_MASK | CCM_CCGR4_I2C0_CTRL_MASK); + CCM_CCGR4_GPC_CTRL_MASK); clrsetbits_le32(&ccm->ccgr6, CCM_REG_CTRL_MASK, CCM_CCGR6_OCOTP_CTRL_MASK | CCM_CCGR6_DDRMC_CTRL_MASK); clrsetbits_le32(&ccm->ccgr7, CCM_REG_CTRL_MASK, @@ -379,14 +353,6 @@ static void mscm_init(void) writew(MSCM_IRSPRC_CP0_EN, &mscmir->irsprc[i]); } -int board_phy_config(struct phy_device *phydev) -{ - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - int board_early_init_f(void) { clock_init(); @@ -433,13 +399,8 @@ int board_init(void) * so we must use the external oscillator in order * to maintain correct time in the hwclock */ - setbits_le32(&scsc->sosc_ctr, SCSC_SOSC_CTR_SOSC_EN); -#ifdef CONFIG_USB_EHCI_VF - gpio_request(USB_CDET_GPIO, "usb-cdet-gpio"); -#endif - return 0; } @@ -476,47 +437,6 @@ int ft_board_setup(void *blob, bd_t *bd) } #endif -#ifdef CONFIG_USB_EHCI_VF -int board_ehci_hcd_init(int port) -{ - switch (port) { - case 0: - /* USBC does not have PEN, also configured as USB client only */ - break; - case 1: - gpio_request(USB_PEN_GPIO, "usb-pen-gpio"); - gpio_direction_output(USB_PEN_GPIO, 0); - break; - } - return 0; -} - -int board_usb_phy_mode(int port) -{ - switch (port) { - case 0: - /* - * Port 0 is used only in client mode on Colibri Vybrid modules - * Check for state of USB client gpio pin and accordingly return - * USB_INIT_DEVICE or USB_INIT_HOST. - */ - if (gpio_get_value(USB_CDET_GPIO)) - return USB_INIT_DEVICE; - else - return USB_INIT_HOST; - case 1: - /* Port 1 is used only in host mode on Colibri Vybrid modules */ - return USB_INIT_HOST; - default: - /* - * There are only two USB controllers on Vybrid. Ideally we will - * not reach here. However return USB_INIT_HOST if we do. - */ - return USB_INIT_HOST; - } -} -#endif - /* * Backlight off before OS handover */ diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 9a91cb4b82..344fe77234 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -56,13 +56,18 @@ CONFIG_DM=y CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y +CONFIG_DM_MMC=y # CONFIG_MMC_HW_PARTITIONING is not set CONFIG_FSL_ESDHC=y +CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y +CONFIG_NAND_VF610_NFC_DT=y CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_VYBRID=y diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index e7b786e48b..1acc6e5056 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2015-2016 Toradex, Inc. + * Copyright 2015-2019 Toradex, Inc. * * Configuration settings for the Toradex VF50/VF61 modules. * @@ -36,17 +36,6 @@ /* NAND support */ #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR - -/* Dynamic MTD partition support */ - -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 - -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET1_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 From c12e415c878f52ea4ef8e9c22a12c1619634d9e6 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:25:02 +0100 Subject: [PATCH 121/140] config: colibri_vf: use macros from linux/sizes.h Use SZ_X{MK} macros from linux/sizes.h for include/configs/colibri_vf.h. Signed-off-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- include/configs/colibri_vf.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 1acc6e5056..9effa56539 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -12,6 +12,7 @@ #define __CONFIG_H #include +#include #define CONFIG_SYS_FSL_CLK @@ -28,7 +29,7 @@ #endif /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M) /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -118,7 +119,7 @@ /* Physical memory map */ #define PHYS_SDRAM (0x80000000) -#define PHYS_SDRAM_SIZE (256 * 1024 * 1024) +#define PHYS_SDRAM_SIZE (256 * SZ_1M) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -141,6 +142,6 @@ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* USB DFU */ -#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) #endif /* __CONFIG_H */ From 06487fd188f2a1320f32ef262972b822f7983732 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 25 Mar 2019 17:25:03 +0100 Subject: [PATCH 122/140] colibri_vf: add distroboot support Add support for distro boot. This is especially helpful for external devices. There is a global boot command which scans a predefined list of boot targets: run distro_bootcmd As well as direct boot commands such as: run bootcmd_mmc0 run bootcmd_usb run bootcmd_dhcp ... Refer to doc/README.distro fo details. While at it also re-order boot command macros as well as the CONFIG_EXTRA_ENV_SETTINGS. Signed-off-by: Stefan Agner Acked-by: Max Krummenacher Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- include/configs/colibri_vf.h | 83 ++++++++++++++++++++++-------------- 1 file changed, 50 insertions(+), 33 deletions(-) diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 9effa56539..83a33ff786 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -48,13 +48,15 @@ /* We boot from the gfxRAM area of the OCRAM. */ #define CONFIG_BOARD_SIZE_LIMIT 520192 -#define SD_BOOTCMD \ - "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ - "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ - "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ - "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ - "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ +#define MEM_LAYOUT_ENV_SETTINGS \ + "bootm_size=0x10000000\0" \ + "fdt_addr_r=0x82000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "kernel_addr_r=0x81000000\0" \ + "pxefile_addr_r=0x87100000\0" \ + "ramdisk_addr_r=0x82100000\0" \ + "scriptaddr=0x87000000\0" #define NFS_BOOTCMD \ "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ @@ -65,7 +67,15 @@ "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ -#define UBI_BOOTCMD \ +#define SD_BOOTCMD \ + "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ + "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ + "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ + "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ + "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ + "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + +#define UBI_BOOTCMD \ "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ "ubi.fm_autoconvert=1\0" \ "ubiboot=run setup; " \ @@ -76,36 +86,43 @@ "ubi read ${fdt_addr_r} dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ -#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" +#define CONFIG_BOOTCOMMAND "run ubiboot; run distro_bootcmd;" + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) +#include +#undef BOOTENV_RUN_NET_USB_START +#define BOOTENV_RUN_NET_USB_START "" #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" #define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_addr_r=0x82000000\0" \ - "fdt_addr_r=0x84000000\0" \ - "kernel_file=zImage\0" \ - "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ - "fdt_board=eval-v3\0" \ - "fdt_fixup=;\0" \ - "defargs=\0" \ - "console=ttyLP0\0" \ - "setup=setenv setupargs " \ - "console=tty1 console=${console}" \ - ",${baudrate}n8 ${memargs}\0" \ - "setsdupdate=mmc rescan && set interface mmc && " \ - "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ - "source ${loadaddr}\0" \ - "setusbupdate=usb start && set interface usb && " \ - "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ - "source ${loadaddr}\0" \ - "setupdate=run setsdupdate || run setusbupdate\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ - "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \ - "splashpos=m,m\0" \ - SD_BOOTCMD \ + BOOTENV \ + MEM_LAYOUT_ENV_SETTINGS \ NFS_BOOTCMD \ - UBI_BOOTCMD + SD_BOOTCMD \ + UBI_BOOTCMD \ + "console=ttyLP0\0" \ + "defargs=\0" \ + "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ + "fdt_board=eval-v3\0" \ + "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ + "fdt_fixup=;\0" \ + "kernel_file=zImage\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + "setsdupdate=mmc rescan && set interface mmc && " \ + "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ + "source ${loadaddr}\0" \ + "setup=setenv setupargs console=tty1 console=${console}" \ + ",${baudrate}n8 ${memargs}\0" \ + "setupdate=run setsdupdate || run setusbupdate\0" \ + "setusbupdate=usb start && set interface usb && " \ + "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ + "source ${loadaddr}\0" \ + "splashpos=m,m\0" \ + "video-mode=dcufb:640x480-16@60,monitor=lcd\0" /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ From 304042c1f3c793c677c5fe08a6fbf21236d7b879 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 25 Mar 2019 17:25:04 +0100 Subject: [PATCH 123/140] colibri_vf: set fdtfile for distroboot Set fdtfile to represent the current board. This allows distribution to load the correct device tree, which in the module case often deviates from the common fallback ${soc}-${board}${boardver}.dtb... Signed-off-by: Stefan Agner Acked-by: Max Krummenacher Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- include/configs/colibri_vf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 83a33ff786..0bbeeb902e 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -86,7 +86,8 @@ "ubi read ${fdt_addr_r} dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ -#define CONFIG_BOOTCOMMAND "run ubiboot; run distro_bootcmd;" +#define CONFIG_BOOTCOMMAND "run ubiboot; " \ + "setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd;" #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ @@ -108,7 +109,6 @@ "defargs=\0" \ "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ "fdt_board=eval-v3\0" \ - "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ "fdt_fixup=;\0" \ "kernel_file=zImage\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ From da4cc0b63ad45464cb2fea3e4c770355ed811146 Mon Sep 17 00:00:00 2001 From: Bhuvanchandra DV Date: Mon, 25 Mar 2019 17:25:05 +0100 Subject: [PATCH 124/140] colibri_vf: sync the board info message Use similar info message as on other modules. Signed-off-by: Bhuvanchandra DV Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- board/toradex/colibri_vf/colibri_vf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index c4d05532fe..9c5bf4951b 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -407,9 +407,9 @@ int board_init(void) int checkboard(void) { if (is_colibri_vf61()) - puts("Board: Colibri VF61\n"); + puts("Model: Toradex Colibri VF61\n"); else - puts("Board: Colibri VF50\n"); + puts("Model: Toradex Colibri VF50\n"); return 0; } From c7fcbfc695281975a96c765f110134d68c7cafc0 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 25 Mar 2019 17:25:06 +0100 Subject: [PATCH 125/140] colibri_vf: enable user debug by default Let the kernel print some debug messages when a user program crashes due to an exception. Signed-off-by: Stefan Agner Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- include/configs/colibri_vf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 0bbeeb902e..030281bb67 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -106,7 +106,7 @@ SD_BOOTCMD \ UBI_BOOTCMD \ "console=ttyLP0\0" \ - "defargs=\0" \ + "defargs=user_debug=31\0" \ "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ "fdt_board=eval-v3\0" \ "fdt_fixup=;\0" \ From 389d680f9b45c04fee72ce069451d7908974a2bc Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 25 Mar 2019 17:25:07 +0100 Subject: [PATCH 126/140] colibri_vf: disable undefined instruction events in user debug It turns out that OpenSSL calls undefined instructions to detect ARM capabilities at runtime (via SIGILL handler). This leads to stack traces e.g. when logging in using SSH: [ 877.464442] sshd (613): undefined instruction: pc=76ee2da8 ... Disable undefined instruction events since it is used as an autodetecion mechanism. Signed-off-by: Stefan Agner Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- include/configs/colibri_vf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 030281bb67..b2f27c1977 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -106,7 +106,7 @@ SD_BOOTCMD \ UBI_BOOTCMD \ "console=ttyLP0\0" \ - "defargs=user_debug=31\0" \ + "defargs=user_debug=30\0" \ "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ "fdt_board=eval-v3\0" \ "fdt_fixup=;\0" \ From f5febed1255b8ca29bc9cf77a114e6981459c379 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 25 Mar 2019 17:25:08 +0100 Subject: [PATCH 127/140] config: colibri_vf: enable mtd partitions via dt Use device tree to set MTD partitions of the NAND chip. Signed-off-by: Stefan Agner Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- configs/colibri_vf_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 344fe77234..8f6cceca7f 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -91,4 +91,5 @@ CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_VIDEO=y CONFIG_SYS_CONSOLE_FG_COL=0x00 CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_EFI_UNICODE_CAPITALIZATION is not set From 2588bf1edc3545bd72ecf32f14114dc0dfde58b8 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 25 Mar 2019 17:25:09 +0100 Subject: [PATCH 128/140] arm: vf610: add uart2 clock/pinmux support Add support for Vybrid's UART2 (Colibri UART_B). Signed-off-by: Stefan Agner Acked-by: Marcel Ziswiler --- arch/arm/include/asm/arch-vf610/crm_regs.h | 1 + arch/arm/include/asm/arch-vf610/iomux-vf610.h | 6 +++++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-vf610/crm_regs.h b/arch/arm/include/asm/arch-vf610/crm_regs.h index 9fce49ddc6..0c9ed52933 100644 --- a/arch/arm/include/asm/arch-vf610/crm_regs.h +++ b/arch/arm/include/asm/arch-vf610/crm_regs.h @@ -200,6 +200,7 @@ struct anadig_reg { #define CCM_REG_CTRL_MASK 0xffffffff #define CCM_CCGR0_UART0_CTRL_MASK (0x3 << 14) #define CCM_CCGR0_UART1_CTRL_MASK (0x3 << 16) +#define CCM_CCGR0_UART2_CTRL_MASK (0x3 << 18) #define CCM_CCGR0_DSPI0_CTRL_MASK (0x3 << 24) #define CCM_CCGR0_DSPI1_CTRL_MASK (0x3 << 26) #define CCM_CCGR1_USBC0_CTRL_MASK (0x3 << 8) diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h index 01bc2998b8..8ba03e5a17 100644 --- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h +++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h @@ -132,10 +132,14 @@ enum { VF610_PAD_PTD24__GPIO_70 = IOMUX_PAD(0x0118, 0x0118, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD23__NF_IO7 = IOMUX_PAD(0x011c, 0x011c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), VF610_PAD_PTD0__QSPI0_A_QSCK = IOMUX_PAD(0x013c, 0x013c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), + VF610_PAD_PTD0__UART2_TX = IOMUX_PAD(0x013c, 0x013c, 2, 0x38c, 2, VF610_UART_PAD_CTRL), VF610_PAD_PTD1__QSPI0_A_CS0 = IOMUX_PAD(0x0140, 0x0140, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), + VF610_PAD_PTD1__UART2_RX = IOMUX_PAD(0x0140, 0x0140, 2, 0x388, 2, VF610_UART_PAD_CTRL), VF610_PAD_PTD2__QSPI0_A_DATA3 = IOMUX_PAD(0x0144, 0x0144, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), + VF610_PAD_PTD2__GPIO_81 = IOMUX_PAD(0x0144, 0x0144, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD3__QSPI0_A_DATA2 = IOMUX_PAD(0x0148, 0x0148, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), - VF610_PAD_PTD4__GPIO_83 = IOMUX_PAD(0x014C, 0x014C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTD3__GPIO_82 = IOMUX_PAD(0x0148, 0x0148, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), + VF610_PAD_PTD4__GPIO_83 = IOMUX_PAD(0x014C, 0x014C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL), VF610_PAD_PTD4__QSPI0_A_DATA1 = IOMUX_PAD(0x014c, 0x014c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD5__QSPI0_A_DATA0 = IOMUX_PAD(0x0150, 0x0150, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), VF610_PAD_PTD7__QSPI0_B_QSCK = IOMUX_PAD(0x0158, 0x0158, 1, __NA_, 0, VF610_QSPI_PAD_CTRL), From be24fc780727bf008844d255fc25f2d23afa7812 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 25 Mar 2019 17:25:10 +0100 Subject: [PATCH 129/140] colibri_vf: adjust timing according to data sheet Using the DDR Validation tool in Processor Expert uncovered two timing inconsistencies. Since those timings are related to the suspend mode they do not affect or change regular memory behaviour. Signed-off-by: Stefan Agner Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- board/toradex/colibri_vf/colibri_vf.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 9c5bf4951b..3e39912f91 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -101,15 +101,21 @@ int dram_init(void) .tras_lockout = 0, .tdal = 12, .bstlen = 3, - .tdll = 512, + .tdll = 512, /* not applicable since freq. scaling + * is not used + */ .trp_ab = 6, .tref = 3120, .trfc = 64, .tref_int = 0, .tpdex = 3, .txpdll = 10, - .txsnr = 48, - .txsr = 468, + .txsnr = 68, /* changed to conform to JEDEC + * specifications + */ + .txsr = 506, /* changed to conform to JEDEC + * specifications + */ .cksrx = 5, .cksre = 5, .freq_chg_en = 0, From afda2ace8a00b7ec563d89b74f6965042ae088e6 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 25 Mar 2019 17:25:11 +0100 Subject: [PATCH 130/140] colibri_vf: use leveling evaluated by DDR validation tools The DDR validation tool (which is part of Processor Expert) allows to evaluate leveling parameters for CR105/CR106/CR110. Several runs have been made with Colibri VF50 and VF61 and it seems to evaluate very similar values. Use this values by default. Note: The newly evaluated parameters seem to require CTLUPD_AREF to be enabled! Note 2: The tool also evaluated 6 as a new value for PHY02/18 GATE_CFG (Coarse adjust of gate open time). However, this seems not to work in practise. Signed-off-by: Stefan Agner Acked-by: Marcel Ziswiler --- board/toradex/colibri_vf/colibri_vf.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 3e39912f91..9d63fbf3bd 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -29,6 +29,13 @@ DECLARE_GLOBAL_DATA_PTR; #define PTC0_GPIO_45 45 static struct ddrmc_cr_setting colibri_vf_cr_settings[] = { + { DDRMC_CR79_CTLUPD_AREF(1), 79 }, + /* sets manual values for read lvl. (gate) delay of data slice 0/1 */ + { DDRMC_CR105_RDLVL_DL_0(28), 105 }, + { DDRMC_CR106_RDLVL_GTDL_0(24), 106 }, + { DDRMC_CR110_RDLVL_DL_1(28) | DDRMC_CR110_RDLVL_GTDL_1(24), 110 }, + { DDRMC_CR102_RDLVL_GT_REGEN | DDRMC_CR102_RDLVL_REG_EN, 102 }, + /* AXI */ { DDRMC_CR117_AXI0_W_PRI(0) | DDRMC_CR117_AXI0_R_PRI(0), 117 }, { DDRMC_CR118_AXI1_W_PRI(1) | DDRMC_CR118_AXI1_R_PRI(1), 118 }, From 671b6a3d78c967b48b9df7c995b1a6fdb93bb847 Mon Sep 17 00:00:00 2001 From: Gerard Salvatella Date: Mon, 25 Mar 2019 17:25:12 +0100 Subject: [PATCH 131/140] colibri_vf: fix sdboot for vybrid modules Currently, Vybrid's sdboot variable tries to load the kernel from /boot of the root partition (typically second partition when using the sdcard image). However, since we moved to flash the kernel in a separate UBI volume, we no longer deploy the kernel/device tree to /boot, hence sdboot does not work in its current state. Load the kernel and device tree from the first (typically FAT) partition as customary on all Toradex modules. While at it also change from rw to ro as e.g. systemd will re-mount the root file system rw anyway after checking it. Signed-off-by: Gerard Salvatella Acked-by: Stefan Agner Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- include/configs/colibri_vf.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index b2f27c1977..0d57e303a1 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -68,11 +68,11 @@ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ #define SD_BOOTCMD \ - "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ + "sdargs=root=/dev/mmcblk0p2 ro rootwait\0" \ "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ - "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ - "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ + "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ + "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ #define UBI_BOOTCMD \ From 587b13c69c054430f937b6e6967402e8db2a00e6 Mon Sep 17 00:00:00 2001 From: Dominik Sliwa Date: Mon, 25 Mar 2019 17:18:27 +0100 Subject: [PATCH 132/140] =?UTF-8?q?toradex:=20configblock:=20add=20an=20-y?= =?UTF-8?q?=20parameter=20to=20'cfgblock=20create=E2=80=99?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add an optional -y parameter to 'cfgblock create’ to simplify automation. Signed-off-by: Dominik Sliwa Acked-by: Stefan Agner Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- board/toradex/common/tdx-cfg-block.c | 39 ++++++++++++++++++---------- 1 file changed, 26 insertions(+), 13 deletions(-) diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index d4f5b1803a..2fcb998ae4 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -418,6 +418,7 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc, int offset = 0; int ret = CMD_RET_SUCCESS; int err; + int force_overwrite = 0; /* Allocate RAM area for config block */ config_block = memalign(ARCH_DMA_MINALIGN, size); @@ -428,6 +429,11 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc, memset(config_block, 0xff, size); + if (argc >= 3) { + if (argv[2][0] == '-' && argv[2][1] == 'y') + force_overwrite = 1; + } + read_tdx_cfg_block(); if (valid_cfgblock) { #if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND) @@ -448,24 +454,31 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc, CONFIG_TDX_CFG_BLOCK_OFFSET); goto out; #else - char message[CONFIG_SYS_CBSIZE]; - sprintf(message, - "A valid Toradex config block is present, still recreate? [y/N] "); + if (!force_overwrite) { + char message[CONFIG_SYS_CBSIZE]; - if (!cli_readline(message)) - goto out; + sprintf(message, + "A valid Toradex config block is present, still recreate? [y/N] "); - if (console_buffer[0] != 'y' && console_buffer[0] != 'Y') - goto out; + if (!cli_readline(message)) + goto out; + + if (console_buffer[0] != 'y' && + console_buffer[0] != 'Y') + goto out; + } #endif } /* Parse new Toradex config block data... */ - if (argc < 3) + if (argc < 3 || (force_overwrite && argc < 4)) { err = get_cfgblock_interactive(); - else - err = get_cfgblock_barcode(argv[2]); - + } else { + if (force_overwrite) + err = get_cfgblock_barcode(argv[3]); + else + err = get_cfgblock_barcode(argv[2]); + } if (err) { ret = CMD_RET_FAILURE; goto out; @@ -549,8 +562,8 @@ static int do_cfgblock(cmd_tbl_t *cmdtp, int flag, int argc, } U_BOOT_CMD( - cfgblock, 3, 0, do_cfgblock, + cfgblock, 4, 0, do_cfgblock, "Toradex config block handling commands", - "create [barcode] - (Re-)create Toradex config block\n" + "create [-y] [barcode] - (Re-)create Toradex config block\n" "cfgblock reload - Reload Toradex config block from flash" ); From 43bfc499925ee1f49355974409808a227cb4f9a0 Mon Sep 17 00:00:00 2001 From: Bhuvanchandra DV Date: Mon, 25 Mar 2019 17:18:28 +0100 Subject: [PATCH 133/140] toradex: common: unify behaviour when config block is missing If the config block is missing, various things may fail or behave strangely on certain modules. This patch unifies that behaviour by using a fake MAC address, until user updates the config block. Signed-off-by: Bhuvanchandra DV Acked-by: Marcel Ziswiler Reviewed-by: Igor Opaniuk --- board/toradex/common/tdx-common.c | 34 ++++++++++++++++--------------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index fde230c955..2d560cceaf 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -12,6 +12,8 @@ #include #include "tdx-common.h" +#define TORADEX_OUI 0x00142dUL + #ifdef CONFIG_TDX_CFG_BLOCK static char tdx_serial_str[9]; static char tdx_board_rev_str[6]; @@ -68,20 +70,25 @@ int show_board_info(void) unsigned char ethaddr[6]; if (read_tdx_cfg_block()) { - printf("Missing Toradex config block\n"); + printf("MISSING TORADEX CONFIG BLOCK\n"); + tdx_eth_addr.oui = htonl(TORADEX_OUI << 8); + tdx_eth_addr.nic = htonl(tdx_serial << 8); checkboard(); - return 0; + } else { + sprintf(tdx_serial_str, "%08u", tdx_serial); + sprintf(tdx_board_rev_str, "V%1d.%1d%c", + tdx_hw_tag.ver_major, + tdx_hw_tag.ver_minor, + (char)tdx_hw_tag.ver_assembly + 'A'); + + env_set("serial#", tdx_serial_str); + + printf("Model: Toradex %s %s, Serial# %s\n", + toradex_modules[tdx_hw_tag.prodid], + tdx_board_rev_str, + tdx_serial_str); } - /* board serial-number */ - sprintf(tdx_serial_str, "%08u", tdx_serial); - sprintf(tdx_board_rev_str, "V%1d.%1d%c", - tdx_hw_tag.ver_major, - tdx_hw_tag.ver_minor, - (char)tdx_hw_tag.ver_assembly + 'A'); - - env_set("serial#", tdx_serial_str); - /* * Check if environment contains a valid MAC address, * set the one from config block if not @@ -101,11 +108,6 @@ int show_board_info(void) } #endif - printf("Model: Toradex %s %s, Serial# %s\n", - toradex_modules[tdx_hw_tag.prodid], - tdx_board_rev_str, - tdx_serial_str); - return 0; } From ccdd37130b3cfe8f11532b0b7b24774e2034acf0 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:18:29 +0100 Subject: [PATCH 134/140] tdx-cfg-block: fix off by one issue Fix toradex_modules array off by one issue potentially leading to spurious printout during boot e.g. Model: Toradex V1.2A, instead of Model: Toradex UNKNOWN MODULE V1.2A. Signed-off-by: Marcel Ziswiler Acked-by: Max Krummenacher Reviewed-by: Igor Opaniuk --- board/toradex/common/tdx-cfg-block.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 2fcb998ae4..b90077bedc 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -261,7 +261,7 @@ int read_tdx_cfg_block(void) } /* Cap product id to avoid issues with a yet unknown one */ - if (tdx_hw_tag.prodid > (sizeof(toradex_modules) / + if (tdx_hw_tag.prodid >= (sizeof(toradex_modules) / sizeof(toradex_modules[0]))) tdx_hw_tag.prodid = 0; From c77ea32ed8cce0061198a29a9b0c0e55394d0aaf Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 1 Apr 2019 11:32:07 +0200 Subject: [PATCH 135/140] imx: aristainetos: fix build breakage ipu.h header is not found since the ipuv3 driver was moved to the drivers/video/imx subdirectory. Fix it. Signed-off-by: Anatolij Gustschin --- board/aristainetos/aristainetos-v2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index b33a75c82c..63b1057553 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -33,7 +33,7 @@ #include #include #include -#include <../drivers/video/ipu.h> +#include <../drivers/video/imx/ipu.h> #if defined(CONFIG_VIDEO_BMP_LOGO) #include #endif From dee535bc90768a2f386500aea5fc6ed6a2e54de4 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Mon, 25 Mar 2019 17:38:02 +0100 Subject: [PATCH 136/140] apalis/colibri_imx6: add device trees to makefile Add device trees to Makefile to avoid newly introduced error: Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=' argument make[1]: *** [dts/Makefile:28: arch/arm/dts/imx6-apalis.dtb] Error 1 make: *** [Makefile:1009: dts/dt.dtb] Error 2 Signed-off-by: Marcel Ziswiler --- arch/arm/dts/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1b57e8ff00..5a8d855ecd 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -544,6 +544,9 @@ dtb-$(CONFIG_MX6ULL) += \ imx6ull-14x14-evk.dtb \ imx6ull-colibri.dtb \ +dtb-$(CONFIG_ARCH_MX6) += \ + imx6-colibri.dtb + dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7d-sdb-qspi.dtb \ imx7-colibri-emmc.dtb \ From 7092e935696aa5db62af5ffd7bc7db06d0730db8 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 1 Apr 2019 14:45:45 +0200 Subject: [PATCH 137/140] imx6: tbs2910: fix dtb build error Fix broken build: Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=' argument Signed-off-by: Anatolij Gustschin --- arch/arm/dts/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5a8d855ecd..0fb64192df 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -503,6 +503,9 @@ dtb-$(CONFIG_MX6Q) += \ imx6q-display5.dtb \ imx6q-logicpd.dtb +dtb-$(CONFIG_TARGET_TBS2910) += \ + imx6q-tbs2910.dtb + dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ From 275e8b622f5eb7aa08d687f7427fe5eeb6e0c083 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 1 Apr 2019 14:32:07 +0200 Subject: [PATCH 138/140] imx6: dts: add wandboard dtb target to fix build error Fix broken build: Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=' argument Signed-off-by: Anatolij Gustschin --- arch/arm/dts/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0fb64192df..0aee8dfde0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -522,6 +522,9 @@ dtb-$(CONFIG_MX6QDL) += \ imx6qp-sabreauto.dtb \ imx6qp-sabresd.dtb +dtb-$(CONFIG_TARGET_WANDBOARD) += \ + imx6dl-wandboard-revb1.dtb + dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb dtb-$(CONFIG_MX6SLL) += imx6sll-evk.dtb From afbdff18f4841b86f4ae294e1356eefa7c1565dd Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 1 Apr 2019 14:32:08 +0200 Subject: [PATCH 139/140] imx6: wandboard: fix dwc_ahsata build errors when DM enabled Enable CONFIG_AHCI to fix errors: drivers/ata/dwc_ahsata.c: In function `ahci_init_one': drivers/ata/dwc_ahsata.c:868:21: error: `struct blk_desc' has no member named `priv' sata_dev_desc[pdev].priv = uc_priv; ^ drivers/ata/dwc_ahsata.c: In function `init_sata': drivers/ata/dwc_ahsata.c:891:30: error: `struct blk_desc' has no member named `priv' uc_priv = sata_dev_desc[dev].priv; ... Also enable DM_SCSI to fix migration build warning. Signed-off-by: Anatolij Gustschin --- configs/wandboard_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 7f64ea65b1..ba0c844262 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -52,9 +53,9 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_SCSI=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y -# CONFIG_VIDEO_SW_CURSOR is not set From e0627f77f55ea8d606cd4b0902bc47ffaad220d0 Mon Sep 17 00:00:00 2001 From: Soeren Moch Date: Sun, 14 Apr 2019 20:41:05 +0200 Subject: [PATCH 140/140] board: tbs2910: Remove CMD_FDT support in defconfig to reduce u-boot size This fixes the build failure "u-boot.imx exceeds file size limit". Signed-off-by: Soeren Moch --- configs/tbs2910_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 05973eab8b..96b813d877 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Matrix U-Boot> " CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_FDT is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y