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i.mx: i.mx6q: add the initial support for i.mx6q ARM2 board
Add the initial support for Freescale i.MX6Q Armadillo2 board Support: MMC boot from slot 0/1, debug UART(UART4), usdhc. There is two MMC slots on the boards: mmc dev 0 -> connect USDHC3 -> the lower slot on the board, mmc dev 1 -> connect USDHC4 -> the upper slot on the board, Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
This commit is contained in:
Jason Liu
Albert ARIBAUD
parent
c8bfe24fec
commit
76d7f57449
6 changed files with 528 additions and 0 deletions
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@ -574,6 +574,7 @@ Jason Liu <r64343@freescale.com>
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mx53evk i.MX53
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mx53loco i.MX53
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mx6qarm2 i.MX6Q
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Enric Balletbo i Serra <eballetbo@iseebcn.com>
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42
board/freescale/mx6qarm2/Makefile
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42
board/freescale/mx6qarm2/Makefile
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@ -0,0 +1,42 @@
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#
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# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
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#
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# (C) Copyright 2011 Freescale Semiconductor, Inc.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := mx6qarm2.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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167
board/freescale/mx6qarm2/imximage.cfg
Normal file
167
board/freescale/mx6qarm2/imximage.cfg
Normal file
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@ -0,0 +1,167 @@
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# Copyright (C) 2011 Freescale Semiconductor, Inc.
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# Jason Liu <r64343@freescale.com>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not write to the Free Software
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# Foundation Inc. 51 Franklin Street Fifth Floor Boston,
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# MA 02110-1301 USA
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#
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# Refer docs/README.imxmage for more details about how-to configure
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# and create imximage boot image
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#
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# The syntax is taken as close as possible with the kwbimage
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# image version
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IMAGE_VERSION 2
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# Boot Device : one of
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# spi, sd (the board has no nand neither onenand)
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BOOT_FROM sd
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# Device Configuration Data (DCD)
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#
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# Each entry must have the format:
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# Addr-type Address Value
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#
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# where:
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# Addr-type register length (1,2 or 4 bytes)
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# Address absolute address of the register
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# value value to be stored in the register
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DATA 4 0x020e05a8 0x00000030
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DATA 4 0x020e05b0 0x00000030
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DATA 4 0x020e0524 0x00000030
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DATA 4 0x020e051c 0x00000030
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DATA 4 0x020e0518 0x00000030
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DATA 4 0x020e050c 0x00000030
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DATA 4 0x020e05b8 0x00000030
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DATA 4 0x020e05c0 0x00000030
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DATA 4 0x020e05ac 0x00020030
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DATA 4 0x020e05b4 0x00020030
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DATA 4 0x020e0528 0x00020030
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DATA 4 0x020e0520 0x00020030
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DATA 4 0x020e0514 0x00020030
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DATA 4 0x020e0510 0x00020030
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DATA 4 0x020e05bc 0x00020030
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DATA 4 0x020e05c4 0x00020030
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DATA 4 0x020e056c 0x00020030
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DATA 4 0x020e0578 0x00020030
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DATA 4 0x020e0588 0x00020030
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DATA 4 0x020e0594 0x00020030
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DATA 4 0x020e057c 0x00020030
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DATA 4 0x020e0590 0x00003000
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DATA 4 0x020e0598 0x00003000
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DATA 4 0x020e058c 0x00000000
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DATA 4 0x020e059c 0x00003030
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DATA 4 0x020e05a0 0x00003030
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DATA 4 0x020e0784 0x00000030
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DATA 4 0x020e0788 0x00000030
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DATA 4 0x020e0794 0x00000030
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DATA 4 0x020e079c 0x00000030
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DATA 4 0x020e07a0 0x00000030
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DATA 4 0x020e07a4 0x00000030
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DATA 4 0x020e07a8 0x00000030
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DATA 4 0x020e0748 0x00000030
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DATA 4 0x020e074c 0x00000030
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DATA 4 0x020e0750 0x00020000
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DATA 4 0x020e0758 0x00000000
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DATA 4 0x020e0774 0x00020000
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DATA 4 0x020e078c 0x00000030
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DATA 4 0x020e0798 0x000C0000
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DATA 4 0x021b081c 0x33333333
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DATA 4 0x021b0820 0x33333333
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DATA 4 0x021b0824 0x33333333
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DATA 4 0x021b0828 0x33333333
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DATA 4 0x021b481c 0x33333333
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DATA 4 0x021b4820 0x33333333
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DATA 4 0x021b4824 0x33333333
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DATA 4 0x021b4828 0x33333333
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DATA 4 0x021b0018 0x00081740
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DATA 4 0x021b001c 0x00008000
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DATA 4 0x021b000c 0x555A7975
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DATA 4 0x021b0010 0xFF538E64
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DATA 4 0x021b0014 0x01FF00DB
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DATA 4 0x021b002c 0x000026D2
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DATA 4 0x021b0030 0x005B0E21
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DATA 4 0x021b0008 0x09444040
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DATA 4 0x021b0004 0x00025576
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DATA 4 0x021b0040 0x00000027
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DATA 4 0x021b0000 0xC31A0000
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DATA 4 0x021b001c 0x04088032
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DATA 4 0x021b001c 0x0408803A
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DATA 4 0x021b001c 0x00008033
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DATA 4 0x021b001c 0x0000803B
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DATA 4 0x021b001c 0x00428031
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DATA 4 0x021b001c 0x00428039
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DATA 4 0x021b001c 0x09408030
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DATA 4 0x021b001c 0x09408038
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DATA 4 0x021b001c 0x04008040
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DATA 4 0x021b001c 0x04008048
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DATA 4 0x021b0800 0xA1380003
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DATA 4 0x021b4800 0xA1380003
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DATA 4 0x021b0020 0x00005800
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DATA 4 0x021b0818 0x00022227
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DATA 4 0x021b4818 0x00022227
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DATA 4 0x021b083c 0x434B0350
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DATA 4 0x021b0840 0x034C0359
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DATA 4 0x021b483c 0x434B0350
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DATA 4 0x021b4840 0x03650348
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DATA 4 0x021b0848 0x4436383B
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DATA 4 0x021b4848 0x39393341
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DATA 4 0x021b0850 0x35373933
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DATA 4 0x021b4850 0x48254A36
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DATA 4 0x021b080c 0x001F001F
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DATA 4 0x021b0810 0x001F001F
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DATA 4 0x021b480c 0x00440044
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DATA 4 0x021b4810 0x00440044
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DATA 4 0x021b08b8 0x00000800
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DATA 4 0x021b48b8 0x00000800
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DATA 4 0x021b001c 0x00000000
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DATA 4 0x021b0404 0x00011006
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DATA 4 0x020e0010 0xF00000FF
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DATA 4 0x020e0018 0x00070007
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DATA 4 0x020e001c 0x00070007
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DATA 4 0x020c4068 0x00C03F3F
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DATA 4 0x020c406c 0x0030FC00
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DATA 4 0x020c4070 0x0FFFC000
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DATA 4 0x020c4074 0x3FF00000
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DATA 4 0x020c4078 0x00FFF300
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DATA 4 0x020c407c 0x0F0000C3
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DATA 4 0x020c4080 0x000003FC
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155
board/freescale/mx6qarm2/mx6qarm2.c
Normal file
155
board/freescale/mx6qarm2/mx6qarm2.c
Normal file
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@ -0,0 +1,155 @@
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/*
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx6x_pins.h>
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#include <asm/arch/iomux-v3.h>
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#include <asm/errno.h>
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#include <asm/gpio.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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return 0;
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}
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iomux_v3_cfg_t uart4_pads[] = {
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MX6Q_PAD_KEY_COL0__UART4_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6Q_PAD_KEY_ROW0__UART4_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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iomux_v3_cfg_t usdhc3_pads[] = {
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MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_NANDF_CS0__GPIO_6_11 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
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};
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iomux_v3_cfg_t usdhc4_pads[] = {
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MX6Q_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
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}
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#ifdef CONFIG_FSL_ESDHC
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struct fsl_esdhc_cfg usdhc_cfg[2] = {
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{USDHC3_BASE_ADDR, 1},
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{USDHC4_BASE_ADDR, 1},
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};
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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if (cfg->esdhc_base == USDHC3_BASE_ADDR) {
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gpio_direction_input(171); /*GPIO6_11*/
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*cd = gpio_get_value(171);
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} else /* Don't have the CD GPIO pin on board */
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*cd = 0;
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return 0;
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}
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int board_mmc_init(bd_t *bis)
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{
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s32 status = 0;
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u32 index = 0;
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for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
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switch (index) {
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case 0:
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imx_iomux_v3_setup_multiple_pads(
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usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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break;
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case 1:
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imx_iomux_v3_setup_multiple_pads(
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usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
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break;
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default:
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printf("Warning: you configured more USDHC controllers"
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"(%d) then supported by the board (%d)\n",
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index + 1, CONFIG_SYS_FSL_USDHC_NUM);
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return status;
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}
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status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
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}
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return status;
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}
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#endif
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int board_early_init_f(void)
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{
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setup_iomux_uart();
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: MX6Q-Armadillo2\n");
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return 0;
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}
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@ -180,6 +180,7 @@ mx53evk arm armv7 mx53evk freesca
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mx53loco arm armv7 mx53loco freescale mx5 mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg
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mx53smd arm armv7 mx53smd freescale mx5 mx53smd:IMX_CONFIG=board/freescale/mx53smd/imximage.cfg
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vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg
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mx6qarm2 arm armv7 mx6qarm2 freescale mx6 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg
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cm_t35 arm armv7 cm_t35 - omap3
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omap3_overo arm armv7 overo - omap3
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omap3_pandora arm armv7 pandora - omap3
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162
include/configs/mx6qarm2.h
Normal file
162
include/configs/mx6qarm2.h
Normal file
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@ -0,0 +1,162 @@
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/*
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6Q Armadillo2 board.
|
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*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_MX6Q
|
||||
#define CONFIG_SYS_MX6_HCLK 24000000
|
||||
#define CONFIG_SYS_MX6_CLK32 32768
|
||||
#define CONFIG_DISPLAY_CPUINFO
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#include <asm/arch/imx-regs.h>
|
||||
|
||||
#define CONFIG_CMDLINE_TAG
|
||||
#define CONFIG_SETUP_MEMORY_TAGS
|
||||
#define CONFIG_INITRD_TAG
|
||||
|
||||
/* Size of malloc() pool */
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
|
||||
|
||||
#define CONFIG_ARCH_CPU_INIT
|
||||
#define CONFIG_BOARD_EARLY_INIT_F
|
||||
#define CONFIG_MXC_GPIO
|
||||
|
||||
#define CONFIG_MXC_UART
|
||||
#define CONFIG_MXC_UART_BASE UART4_BASE
|
||||
|
||||
/* MMC Configs */
|
||||
#define CONFIG_FSL_ESDHC
|
||||
#define CONFIG_FSL_USDHC
|
||||
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
||||
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
||||
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
|
||||
|
||||
/* Command definition */
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#undef CONFIG_CMD_NET
|
||||
#undef CONFIG_CMD_NFS
|
||||
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
|
||||
#define CONFIG_LOADADDR 0x10800000
|
||||
#define CONFIG_SYS_TEXT_BASE 0x17800000
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"script=boot.scr\0" \
|
||||
"uimage=uImage\0" \
|
||||
"console=ttymxc3\0" \
|
||||
"mmcdev=1\0" \
|
||||
"mmcpart=2\0" \
|
||||
"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
|
||||
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=${mmcroot}\0" \
|
||||
"loadbootscript=" \
|
||||
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source\0" \
|
||||
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"bootm\0" \
|
||||
"netargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/nfs " \
|
||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||
"netboot=echo Booting from net ...; " \
|
||||
"run netargs; " \
|
||||
"dhcp ${uimage}; bootm\0" \
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"mmc dev ${mmcdev};" \
|
||||
"if mmc rescan ${mmcdev}; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"if run loaduimage; then " \
|
||||
"run mmcboot; " \
|
||||
"else run netboot; " \
|
||||
"fi; " \
|
||||
"fi; " \
|
||||
"else run netboot; fi"
|
||||
|
||||
#define CONFIG_ARP_TIMEOUT 200UL
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_SYS_PROMPT "MX6QARM2 U-Boot > "
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x10000000
|
||||
#define CONFIG_SYS_MEMTEST_END 0x10010000
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_STACKSIZE (128 * 1024)
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
|
||||
#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
|
||||
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET \
|
||||
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR \
|
||||
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
||||
|
||||
/* FLASH and environment organization */
|
||||
#define CONFIG_SYS_NO_FLASH
|
||||
|
||||
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
|
||||
#define CONFIG_ENV_SIZE (8 * 1024)
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 1
|
||||
|
||||
#define CONFIG_OF_LIBFDT
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Add table
Reference in a new issue