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imx: fix coding style

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Fix checkpatch warning and errors in several i.MX related files.

While at it also address a checkpatch warning at arch/arm/cpu/armv7/mx5/soc.c
regarding the usage of extern in a C file.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This commit is contained in:
Fabio Estevam 2011-10-13 05:34:59 +00:00 • committed by Albert ARIBAUD
parent f8f96129bf
commit 77f11a99e1
14 changed files with 108 additions and 101 deletions
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23
arch/arm/cpu/arm1136/mx31/timer.c
View file

@ -43,7 +43,11 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */ /*
* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
* "tick" is internal timer period
*/
#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION #ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
/* ~0.4% error - measured with stop-watch on 100s boot-delay */ /* ~0.4% error - measured with stop-watch on 100s boot-delay */
static inline unsigned long long tick_to_time(unsigned long long tick) static inline unsigned long long tick_to_time(unsigned long long tick)
@ -68,7 +72,8 @@ static inline unsigned long long us_to_tick(unsigned long long us)
} }
#else #else
/* ~2% error */ /* ~2% error */
#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) #define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) \
/ CONFIG_SYS_HZ)
#define US_PER_TICK (1000000 / CONFIG_MX31_CLK32) #define US_PER_TICK (1000000 / CONFIG_MX31_CLK32)
static inline unsigned long long tick_to_time(unsigned long long tick) static inline unsigned long long tick_to_time(unsigned long long tick)
@ -91,7 +96,7 @@ static inline unsigned long long us_to_tick(unsigned long long us)
#endif #endif
/* The 32768Hz 32-bit timer overruns in 131072 seconds */ /* The 32768Hz 32-bit timer overruns in 131072 seconds */
int timer_init (void) int timer_init(void)
{ {
int i; int i;
@ -106,7 +111,7 @@ int timer_init (void)
return 0; return 0;
} }
unsigned long long get_ticks (void) unsigned long long get_ticks(void)
{ {
ulong now = GPTCNT; /* current tick value */ ulong now = GPTCNT; /* current tick value */
@ -119,7 +124,7 @@ unsigned long long get_ticks (void)
return gd->tbl; return gd->tbl;
} }
ulong get_timer_masked (void) ulong get_timer_masked(void)
{ {
/* /*
* get_ticks() returns a long long (64 bit), it wraps in * get_ticks() returns a long long (64 bit), it wraps in
@ -130,13 +135,13 @@ ulong get_timer_masked (void)
return tick_to_time(get_ticks()); return tick_to_time(get_ticks());
} }
ulong get_timer (ulong base) ulong get_timer(ulong base)
{ {
return get_timer_masked () - base; return get_timer_masked() - base;
} }
/* delay x useconds AND preserve advance timestamp value */ /* delay x useconds AND preserve advance timestamp value */
void __udelay (unsigned long usec) void __udelay(unsigned long usec)
{ {
unsigned long long tmp; unsigned long long tmp;
ulong tmo; ulong tmo;
@ -148,7 +153,7 @@ void __udelay (unsigned long usec)
/*NOP*/; /*NOP*/;
} }
void reset_cpu (ulong addr) void reset_cpu(ulong addr)
{ {
struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
wdog->wcr = WDOG_ENABLE; wdog->wcr = WDOG_ENABLE;

2
arch/arm/cpu/arm1136/mx35/generic.c
View file

@ -240,7 +240,7 @@ unsigned int mxc_get_main_clock(enum mxc_main_clocks clk)
} }
break; break;
case IPG_CLK: case IPG_CLK:
ret_val = get_ipg_clk();; ret_val = get_ipg_clk();
break; break;
case IPG_PER_CLK: case IPG_PER_CLK:
ret_val = get_ipg_per_clk(); ret_val = get_ipg_per_clk();

110
arch/arm/cpu/arm926ejs/mx25/generic.c
View file

@ -39,7 +39,7 @@
* f = 2 * f_ref * -------------------- * f = 2 * f_ref * --------------------
* pd + 1 * pd + 1
*/ */
static unsigned int imx_decode_pll (unsigned int pll, unsigned int f_ref) static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
{ {
unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT) unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT)
& CCM_PLL_MFI_MASK; & CCM_PLL_MFI_MASK;
@ -52,57 +52,57 @@ static unsigned int imx_decode_pll (unsigned int pll, unsigned int f_ref)
mfi = mfi <= 5 ? 5 : mfi; mfi = mfi <= 5 ? 5 : mfi;
return lldiv (2 * (u64) f_ref * (mfi * (mfd + 1) + mfn), return lldiv(2 * (u64) f_ref * (mfi * (mfd + 1) + mfn),
(mfd + 1) * (pd + 1)); (mfd + 1) * (pd + 1));
} }
static ulong imx_get_mpllclk (void) static ulong imx_get_mpllclk(void)
{ {
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = 24000000; ulong fref = 24000000;
return imx_decode_pll (readl (&ccm->mpctl), fref); return imx_decode_pll(readl(&ccm->mpctl), fref);
} }
ulong imx_get_armclk (void) ulong imx_get_armclk(void)
{ {
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong cctl = readl (&ccm->cctl); ulong cctl = readl(&ccm->cctl);
ulong fref = imx_get_mpllclk (); ulong fref = imx_get_mpllclk();
ulong div; ulong div;
if (cctl & CCM_CCTL_ARM_SRC) if (cctl & CCM_CCTL_ARM_SRC)
fref = lldiv ((fref * 3), 4); fref = lldiv((fref * 3), 4);
div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT) div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT)
& CCM_CCTL_ARM_DIV_MASK) + 1; & CCM_CCTL_ARM_DIV_MASK) + 1;
return lldiv (fref, div); return lldiv(fref, div);
} }
ulong imx_get_ahbclk (void) ulong imx_get_ahbclk(void)
{ {
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong cctl = readl (&ccm->cctl); ulong cctl = readl(&ccm->cctl);
ulong fref = imx_get_armclk (); ulong fref = imx_get_armclk();
ulong div; ulong div;
div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT) div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT)
& CCM_CCTL_AHB_DIV_MASK) + 1; & CCM_CCTL_AHB_DIV_MASK) + 1;
return lldiv (fref, div); return lldiv(fref, div);
} }
ulong imx_get_perclk (int clk) ulong imx_get_perclk(int clk)
{ {
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = imx_get_ahbclk (); ulong fref = imx_get_ahbclk();
ulong div; ulong div;
div = readl (&ccm->pcdr[CCM_PERCLK_REG (clk)]); div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
div = ((div >> CCM_PERCLK_SHIFT (clk)) & CCM_PERCLK_MASK) + 1; div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1;
return lldiv (fref, div); return lldiv(fref, div);
} }
u32 get_cpu_rev(void) u32 get_cpu_rev(void)
@ -153,7 +153,7 @@ static char *get_reset_cause(void)
} }
int print_cpuinfo (void) int print_cpuinfo(void)
{ {
char buf[32]; char buf[32];
u32 cpurev = get_cpu_rev(); u32 cpurev = get_cpu_rev();
@ -161,22 +161,22 @@ int print_cpuinfo (void)
printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n", printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n",
(cpurev & 0xF0) >> 4, (cpurev & 0x0F), (cpurev & 0xF0) >> 4, (cpurev & 0x0F),
((cpurev & 0x8000) ? " unknown" : ""), ((cpurev & 0x8000) ? " unknown" : ""),
strmhz (buf, imx_get_armclk ())); strmhz(buf, imx_get_armclk()));
printf("Reset cause: %s\n\n", get_reset_cause()); printf("Reset cause: %s\n\n", get_reset_cause());
return 0; return 0;
} }
#endif #endif
int cpu_eth_init (bd_t * bis) int cpu_eth_init(bd_t *bis)
{ {
#if defined(CONFIG_FEC_MXC) #if defined(CONFIG_FEC_MXC)
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong val; ulong val;
val = readl (&ccm->cgr0); val = readl(&ccm->cgr0);
val |= (1 << 23); val |= (1 << 23);
writel (val, &ccm->cgr0); writel(val, &ccm->cgr0);
return fecmxc_initialize (bis); return fecmxc_initialize(bis);
#else #else
return 0; return 0;
#endif #endif
@ -186,10 +186,10 @@ int cpu_eth_init (bd_t * bis)
* Initializes on-chip MMC controllers. * Initializes on-chip MMC controllers.
* to override, implement board_mmc_init() * to override, implement board_mmc_init()
*/ */
int cpu_mmc_init (bd_t * bis) int cpu_mmc_init(bd_t *bis)
{ {
#ifdef CONFIG_MXC_MMC #ifdef CONFIG_MXC_MMC
return mxc_mmc_init (bis); return mxc_mmc_init(bis);
#else #else
return 0; return 0;
#endif #endif
@ -206,7 +206,7 @@ void mx25_uart1_init_pins(void)
muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
muxmode0 = MX25_PIN_MUX_MODE (0); muxmode0 = MX25_PIN_MUX_MODE(0);
/* /*
* set up input pins with hysteresis and 100K pull-ups * set up input pins with hysteresis and 100K pull-ups
*/ */
@ -227,25 +227,25 @@ void mx25_uart1_init_pins(void)
/* UART1 */ /* UART1 */
/* rxd */ /* rxd */
writel (muxmode0, &muxctl->pad_uart1_rxd); writel(muxmode0, &muxctl->pad_uart1_rxd);
writel (inpadctl, &padctl->pad_uart1_rxd); writel(inpadctl, &padctl->pad_uart1_rxd);
/* txd */ /* txd */
writel (muxmode0, &muxctl->pad_uart1_txd); writel(muxmode0, &muxctl->pad_uart1_txd);
writel (outpadctl, &padctl->pad_uart1_txd); writel(outpadctl, &padctl->pad_uart1_txd);
/* rts */ /* rts */
writel (muxmode0, &muxctl->pad_uart1_rts); writel(muxmode0, &muxctl->pad_uart1_rts);
writel (outpadctl, &padctl->pad_uart1_rts); writel(outpadctl, &padctl->pad_uart1_rts);
/* cts */ /* cts */
writel (muxmode0, &muxctl->pad_uart1_cts); writel(muxmode0, &muxctl->pad_uart1_cts);
writel (inpadctl, &padctl->pad_uart1_cts); writel(inpadctl, &padctl->pad_uart1_cts);
} }
#endif /* CONFIG_MXC_UART */ #endif /* CONFIG_MXC_UART */
#ifdef CONFIG_FEC_MXC #ifdef CONFIG_FEC_MXC
void mx25_fec_init_pins (void) void mx25_fec_init_pins(void)
{ {
struct iomuxc_mux_ctl *muxctl; struct iomuxc_mux_ctl *muxctl;
struct iomuxc_pad_ctl *padctl; struct iomuxc_pad_ctl *padctl;
@ -256,7 +256,7 @@ void mx25_fec_init_pins (void)
muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
muxmode0 = MX25_PIN_MUX_MODE (0); muxmode0 = MX25_PIN_MUX_MODE(0);
inpadctl_100kpd = MX25_PIN_PAD_CTL_HYS inpadctl_100kpd = MX25_PIN_PAD_CTL_HYS
| MX25_PIN_PAD_CTL_PKE | MX25_PIN_PAD_CTL_PKE
| MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD; | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
@ -275,40 +275,40 @@ void mx25_fec_init_pins (void)
outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD; outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
/* FEC_TX_CLK */ /* FEC_TX_CLK */
writel (muxmode0, &muxctl->pad_fec_tx_clk); writel(muxmode0, &muxctl->pad_fec_tx_clk);
writel (inpadctl_100kpd, &padctl->pad_fec_tx_clk); writel(inpadctl_100kpd, &padctl->pad_fec_tx_clk);
/* FEC_RX_DV */ /* FEC_RX_DV */
writel (muxmode0, &muxctl->pad_fec_rx_dv); writel(muxmode0, &muxctl->pad_fec_rx_dv);
writel (inpadctl_100kpd, &padctl->pad_fec_rx_dv); writel(inpadctl_100kpd, &padctl->pad_fec_rx_dv);
/* FEC_RDATA0 */ /* FEC_RDATA0 */
writel (muxmode0, &muxctl->pad_fec_rdata0); writel(muxmode0, &muxctl->pad_fec_rdata0);
writel (inpadctl_100kpd, &padctl->pad_fec_rdata0); writel(inpadctl_100kpd, &padctl->pad_fec_rdata0);
/* FEC_TDATA0 */ /* FEC_TDATA0 */
writel (muxmode0, &muxctl->pad_fec_tdata0); writel(muxmode0, &muxctl->pad_fec_tdata0);
writel (outpadctl, &padctl->pad_fec_tdata0); writel(outpadctl, &padctl->pad_fec_tdata0);
/* FEC_TX_EN */ /* FEC_TX_EN */
writel (muxmode0, &muxctl->pad_fec_tx_en); writel(muxmode0, &muxctl->pad_fec_tx_en);
writel (outpadctl, &padctl->pad_fec_tx_en); writel(outpadctl, &padctl->pad_fec_tx_en);
/* FEC_MDC */ /* FEC_MDC */
writel (muxmode0, &muxctl->pad_fec_mdc); writel(muxmode0, &muxctl->pad_fec_mdc);
writel (outpadctl, &padctl->pad_fec_mdc); writel(outpadctl, &padctl->pad_fec_mdc);
/* FEC_MDIO */ /* FEC_MDIO */
writel (muxmode0, &muxctl->pad_fec_mdio); writel(muxmode0, &muxctl->pad_fec_mdio);
writel (inpadctl_22kpu, &padctl->pad_fec_mdio); writel(inpadctl_22kpu, &padctl->pad_fec_mdio);
/* FEC_RDATA1 */ /* FEC_RDATA1 */
writel (muxmode0, &muxctl->pad_fec_rdata1); writel(muxmode0, &muxctl->pad_fec_rdata1);
writel (inpadctl_100kpd, &padctl->pad_fec_rdata1); writel(inpadctl_100kpd, &padctl->pad_fec_rdata1);
/* FEC_TDATA1 */ /* FEC_TDATA1 */
writel (muxmode0, &muxctl->pad_fec_tdata1); writel(muxmode0, &muxctl->pad_fec_tdata1);
writel (outpadctl, &padctl->pad_fec_tdata1); writel(outpadctl, &padctl->pad_fec_tdata1);
} }

2
arch/arm/cpu/arm926ejs/mx25/reset.c
View file

@ -39,7 +39,7 @@
/* /*
* Reset the cpu by setting up the watchdog timer and let it time out * Reset the cpu by setting up the watchdog timer and let it time out
*/ */
void reset_cpu (ulong ignored) void reset_cpu(ulong ignored)
{ {
struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE; struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
/* Disable watchdog and set Time-Out field to 0 */ /* Disable watchdog and set Time-Out field to 0 */

16
arch/arm/cpu/arm926ejs/mx25/timer.c
View file

@ -15,7 +15,7 @@
* *
* (C) Copyright 2009 DENX Software Engineering * (C) Copyright 2009 DENX Software Engineering
* Author: John Rigby <jrigby@gmail.com> * Author: John Rigby <jrigby@gmail.com>
* Add support for MX25 * Add support for MX25
* *
* See file CREDITS for list of people who contributed to this * See file CREDITS for list of people who contributed to this
* project. * project.
@ -43,8 +43,8 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#define timestamp gd->tbl #define timestamp (gd->tbl)
#define lastinc gd->lastinc #define lastinc (gd->lastinc)
/* /*
* "time" is measured in 1 / CONFIG_SYS_HZ seconds, * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
@ -121,7 +121,7 @@ int timer_init(void)
return 0; return 0;
} }
unsigned long long get_ticks (void) unsigned long long get_ticks(void)
{ {
struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE; struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
ulong now = readl(&gpt->counter); /* current tick value */ ulong now = readl(&gpt->counter); /* current tick value */
@ -140,7 +140,7 @@ unsigned long long get_ticks (void)
return timestamp; return timestamp;
} }
ulong get_timer_masked (void) ulong get_timer_masked(void)
{ {
/* /*
* get_ticks() returns a long long (64 bit), it wraps in * get_ticks() returns a long long (64 bit), it wraps in
@ -151,13 +151,13 @@ ulong get_timer_masked (void)
return tick_to_time(get_ticks()); return tick_to_time(get_ticks());
} }
ulong get_timer (ulong base) ulong get_timer(ulong base)
{ {
return get_timer_masked () - base; return get_timer_masked() - base;
} }
/* delay x useconds AND preserve advance timstamp value */ /* delay x useconds AND preserve advance timstamp value */
void __udelay (unsigned long usec) void __udelay(unsigned long usec)
{ {
unsigned long long tmp; unsigned long long tmp;
ulong tmo; ulong tmo;

2
arch/arm/cpu/arm926ejs/mx27/reset.c
View file

@ -39,7 +39,7 @@
/* /*
* Reset the cpu by setting up the watchdog timer and let it time out * Reset the cpu by setting up the watchdog timer and let it time out
*/ */
void reset_cpu (ulong ignored) void reset_cpu(ulong ignored)
{ {
struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE; struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE;
/* Disable watchdog and set Time-Out field to 0 */ /* Disable watchdog and set Time-Out field to 0 */

14
arch/arm/cpu/arm926ejs/mx27/timer.c
View file

@ -45,8 +45,8 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#define timestamp gd->tbl #define timestamp (gd->tbl)
#define lastinc gd->lastinc #define lastinc (gd->lastinc)
/* /*
* "time" is measured in 1 / CONFIG_SYS_HZ seconds, * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
@ -124,7 +124,7 @@ int timer_init(void)
return 0; return 0;
} }
unsigned long long get_ticks (void) unsigned long long get_ticks(void)
{ {
struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE; struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
ulong now = readl(&regs->gpt_tcn); /* current tick value */ ulong now = readl(&regs->gpt_tcn); /* current tick value */
@ -143,7 +143,7 @@ unsigned long long get_ticks (void)
return timestamp; return timestamp;
} }
ulong get_timer_masked (void) ulong get_timer_masked(void)
{ {
/* /*
* get_ticks() returns a long long (64 bit), it wraps in * get_ticks() returns a long long (64 bit), it wraps in
@ -154,13 +154,13 @@ ulong get_timer_masked (void)
return tick_to_time(get_ticks()); return tick_to_time(get_ticks());
} }
ulong get_timer (ulong base) ulong get_timer(ulong base)
{ {
return get_timer_masked () - base; return get_timer_masked() - base;
} }
/* delay x useconds AND preserve advance timstamp value */ /* delay x useconds AND preserve advance timstamp value */
void __udelay (unsigned long usec) void __udelay(unsigned long usec)
{ {
unsigned long long tmp; unsigned long long tmp;
ulong tmo; ulong tmo;

10
arch/arm/cpu/armv7/mx5/soc.c
View file

@ -26,6 +26,8 @@
#include <common.h> #include <common.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h> #include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/errno.h> #include <asm/errno.h>
#include <asm/io.h> #include <asm/io.h>
@ -117,14 +119,6 @@ int print_cpuinfo(void)
} }
#endif #endif
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
#if defined(CONFIG_FEC_MXC)
extern int fecmxc_initialize(bd_t *bis);
#endif
int cpu_eth_init(bd_t *bis) int cpu_eth_init(bd_t *bis)
{ {
int rc = -ENODEV; int rc = -ENODEV;

8
arch/arm/include/asm/arch-mx5/sys_proto.h
View file

@ -28,4 +28,12 @@ u32 get_cpu_rev(void);
#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
void sdelay(unsigned long); void sdelay(unsigned long);
void set_chipselect_size(int const); void set_chipselect_size(int const);
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int fecmxc_initialize(bd_t *bis);
#endif #endif

10
board/davedenx/qong/qong.c
View file

@ -43,7 +43,7 @@ void hw_watchdog_reset(void)
} }
#endif #endif
int dram_init (void) int dram_init(void)
{ {
/* dram_init must store complete ramsize in gd->ram_size */ /* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
@ -60,7 +60,7 @@ static void qong_fpga_reset(void)
udelay(300); udelay(300);
} }
int board_early_init_f (void) int board_early_init_f(void)
{ {
#ifdef CONFIG_QONG_FPGA #ifdef CONFIG_QONG_FPGA
/* CS1: FPGA/Network Controller/GPIO, 16-bit, no DTACK */ /* CS1: FPGA/Network Controller/GPIO, 16-bit, no DTACK */
@ -149,7 +149,7 @@ int board_early_init_f (void)
} }
int board_init (void) int board_init(void)
{ {
/* Chip selects */ /* Chip selects */
/* CS0: Nor Flash #0 - it must be init'ed when executing from DDR */ /* CS0: Nor Flash #0 - it must be init'ed when executing from DDR */
@ -194,13 +194,13 @@ int board_late_init(void)
return 0; return 0;
} }
int checkboard (void) int checkboard(void)
{ {
printf("Board: DAVE/DENX Qong\n"); printf("Board: DAVE/DENX Qong\n");
return 0; return 0;
} }
int misc_init_r (void) int misc_init_r(void)
{ {
#ifdef CONFIG_QONG_FPGA #ifdef CONFIG_QONG_FPGA
u32 tmp; u32 tmp;

2
board/freescale/mx31ads/mx31ads.c
View file

@ -112,7 +112,7 @@ int board_init(void)
return 0; return 0;
} }
int checkboard (void) int checkboard(void)
{ {
printf("Board: MX31ADS\n"); printf("Board: MX31ADS\n");
return 0; return 0;

2
board/karo/tx25/tx25.c
View file

@ -151,7 +151,7 @@ int board_late_init(void)
return 0; return 0;
} }
int dram_init (void) int dram_init(void)
{ {
/* dram_init must store complete ramsize in gd->ram_size */ /* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1,

6
board/logicpd/imx27lite/imx27lite.c
View file

@ -26,7 +26,7 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
int board_init (void) int board_init(void)
{ {
struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE; struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
#if defined(CONFIG_SYS_NAND_LARGEPAGE) #if defined(CONFIG_SYS_NAND_LARGEPAGE)
@ -64,7 +64,7 @@ int board_init (void)
return 0; return 0;
} }
int dram_init (void) int dram_init(void)
{ {
/* dram_init must store complete ramsize in gd->ram_size */ /* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
@ -86,7 +86,7 @@ void dram_init_banksize(void)
int checkboard(void) int checkboard(void)
{ {
puts ("Board: "); puts("Board: ");
puts(CONFIG_BOARDNAME); puts(CONFIG_BOARDNAME);
return 0; return 0;
} }

2
board/logicpd/imx31_litekit/imx31_litekit.c
View file

@ -91,7 +91,7 @@ int board_init(void)
return 0; return 0;
} }
int checkboard (void) int checkboard(void)
{ {
printf("Board: i.MX31 Litekit\n"); printf("Board: i.MX31 Litekit\n");
return 0; return 0;