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mmc: am654_sdhci: Separate J721E compatible into 8bit and 4bit versions
The j721e 4 bit instances don't have a hard DLL and therefore don't need any DLL related configurations. Split the compatibles into an 8 bit and a 4 bit one. Add a private flags field which can be used to check if the DLL is present and don't register the set_ios_post callback for the 4 bit compatible instances. Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot with the new compatibles. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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parent
d146af5b0e
commit
794453f91d
1 changed files with 72 additions and 44 deletions
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@ -72,6 +72,8 @@ struct am654_sdhci_plat {
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u32 otap_del_sel;
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u32 trm_icp;
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u32 drv_strength;
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u32 flags;
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#define DLL_PRESENT (1 << 0)
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bool dll_on;
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};
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@ -162,6 +164,10 @@ const struct sdhci_ops am654_sdhci_ops = {
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.set_control_reg = &am654_sdhci_set_control_reg,
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};
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const struct sdhci_ops j721e_4bit_sdhci_ops = {
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.set_control_reg = &am654_sdhci_set_control_reg,
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};
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int am654_sdhci_init(struct am654_sdhci_plat *plat)
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{
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u32 ctl_cfg_2 = 0;
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@ -172,25 +178,29 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat)
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mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
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regmap_update_bits(plat->base, PHY_CTRL4, mask, 0x0);
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regmap_read(plat->base, PHY_STAT1, &val);
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if (~val & CALDONE_MASK) {
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/* Calibrate IO lines */
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regmap_update_bits(plat->base, PHY_CTRL1, PDB_MASK, PDB_MASK);
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ret = regmap_read_poll_timeout(plat->base, PHY_STAT1, val,
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val & CALDONE_MASK, 1, 20);
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if (ret)
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return ret;
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if (plat->flags & DLL_PRESENT) {
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regmap_read(plat->base, PHY_STAT1, &val);
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if (~val & CALDONE_MASK) {
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/* Calibrate IO lines */
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regmap_update_bits(plat->base, PHY_CTRL1, PDB_MASK,
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PDB_MASK);
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ret = regmap_read_poll_timeout(plat->base, PHY_STAT1,
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val, val & CALDONE_MASK,
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1, 20);
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if (ret)
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return ret;
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}
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/* Configure DLL TRIM */
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mask = DLL_TRIM_ICP_MASK;
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val = plat->trm_icp << DLL_TRIM_ICP_SHIFT;
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/* Configure DLL driver strength */
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mask |= DR_TY_MASK;
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val |= plat->drv_strength << DR_TY_SHIFT;
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regmap_update_bits(plat->base, PHY_CTRL1, mask, val);
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}
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/* Configure DLL TRIM */
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mask = DLL_TRIM_ICP_MASK;
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val = plat->trm_icp << DLL_TRIM_ICP_SHIFT;
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/* Configure DLL driver strength */
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mask |= DR_TY_MASK;
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val |= plat->drv_strength << DR_TY_SHIFT;
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regmap_update_bits(plat->base, PHY_CTRL1, mask, val);
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/* Enable pins by setting IO mux to 0 */
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regmap_update_bits(plat->base, PHY_CTRL1, IOMUX_ENABLE_MASK, 0);
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@ -245,7 +255,7 @@ static int am654_sdhci_probe(struct udevice *dev)
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AM654_SDHCI_MIN_FREQ);
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if (ret)
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return ret;
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host->ops = &am654_sdhci_ops;
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host->ops = (struct sdhci_ops *)dev_get_driver_data(dev);
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host->mmc->priv = host;
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upriv->mmc = host->mmc;
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@ -268,37 +278,44 @@ static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)
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host->ioaddr = (void *)dev_read_addr(dev);
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plat->non_removable = dev_read_bool(dev, "non-removable");
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ret = dev_read_u32(dev, "ti,trm-icp", &plat->trm_icp);
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if (ret)
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return ret;
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if (device_is_compatible(dev, "ti,am654-sdhci-5.1") ||
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device_is_compatible(dev, "ti,j721e-sdhci-8bit"))
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plat->flags |= DLL_PRESENT;
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ret = dev_read_u32(dev, "ti,otap-del-sel", &plat->otap_del_sel);
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if (ret)
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return ret;
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ret = dev_read_u32(dev, "ti,driver-strength-ohm", &drv_strength);
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if (ret)
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return ret;
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if (plat->flags & DLL_PRESENT) {
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ret = dev_read_u32(dev, "ti,trm-icp", &plat->trm_icp);
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if (ret)
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return ret;
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switch (drv_strength) {
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case 50:
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plat->drv_strength = DRIVER_STRENGTH_50_OHM;
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break;
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case 33:
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plat->drv_strength = DRIVER_STRENGTH_33_OHM;
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break;
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case 66:
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plat->drv_strength = DRIVER_STRENGTH_66_OHM;
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break;
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case 100:
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plat->drv_strength = DRIVER_STRENGTH_100_OHM;
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break;
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case 40:
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plat->drv_strength = DRIVER_STRENGTH_40_OHM;
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break;
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default:
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dev_err(dev, "Invalid driver strength\n");
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return -EINVAL;
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ret = dev_read_u32(dev, "ti,driver-strength-ohm",
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&drv_strength);
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if (ret)
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return ret;
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switch (drv_strength) {
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case 50:
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plat->drv_strength = DRIVER_STRENGTH_50_OHM;
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break;
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case 33:
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plat->drv_strength = DRIVER_STRENGTH_33_OHM;
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break;
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case 66:
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plat->drv_strength = DRIVER_STRENGTH_66_OHM;
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break;
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case 100:
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plat->drv_strength = DRIVER_STRENGTH_100_OHM;
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break;
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case 40:
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plat->drv_strength = DRIVER_STRENGTH_40_OHM;
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break;
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default:
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dev_err(dev, "Invalid driver strength\n");
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return -EINVAL;
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}
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}
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ret = mmc_of_parse(dev, cfg);
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@ -316,7 +333,18 @@ static int am654_sdhci_bind(struct udevice *dev)
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}
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static const struct udevice_id am654_sdhci_ids[] = {
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{ .compatible = "ti,am654-sdhci-5.1" },
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{
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.compatible = "ti,am654-sdhci-5.1",
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.data = (ulong)&am654_sdhci_ops,
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},
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{
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.compatible = "ti,j721e-sdhci-8bit",
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.data = (ulong)&am654_sdhci_ops,
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},
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{
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.compatible = "ti,j721e-sdhci-4bit",
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.data = (ulong)&j721e_4bit_sdhci_ops,
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},
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{ }
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};
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