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fpga: Define bitstream type based on command selection

Browse source 
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2014-05-02 14:09:30 +02:00
parent 64e809afea
commit 7a78bd2679
10 changed files with 37 additions and 21 deletions
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2
board/matrix_vision/common/mv_common.c
View file

@ -77,7 +77,7 @@ int mv_load_fpga(void)
return -1; return -1;
} }
result = fpga_load(0, fpga_data, data_size); result = fpga_load(0, fpga_data, data_size, BIT_FULL);
if (!result) if (!result)
bootstage_mark(BOOTSTAGE_ID_START); bootstage_mark(BOOTSTAGE_ID_START);

10
common/cmd_fpga.c
View file

@ -148,11 +148,11 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
break; break;
case FPGA_LOAD: case FPGA_LOAD:
rc = fpga_load(dev, fpga_data, data_size); rc = fpga_load(dev, fpga_data, data_size, BIT_FULL);
break; break;
case FPGA_LOADB: case FPGA_LOADB:
rc = fpga_loadbitstream(dev, fpga_data, data_size); rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL);
break; break;
#if defined(CONFIG_CMD_FPGA_LOADMK) #if defined(CONFIG_CMD_FPGA_LOADMK)
@ -182,7 +182,8 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
data = (ulong)image_get_data(hdr); data = (ulong)image_get_data(hdr);
data_size = image_get_data_size(hdr); data_size = image_get_data_size(hdr);
} }
rc = fpga_load(dev, (void *)data, data_size); rc = fpga_load(dev, (void *)data, data_size,
BIT_FULL);
} }
break; break;
#if defined(CONFIG_FIT) #if defined(CONFIG_FIT)
@ -224,7 +225,8 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
return 1; return 1;
} }
rc = fpga_load(dev, fit_data, data_size); rc = fpga_load(dev, fit_data, data_size,
BIT_FULL);
} }
break; break;
#endif #endif

8
drivers/fpga/fpga.c
View file

@ -173,7 +173,8 @@ int fpga_add(fpga_type devtype, void *desc)
/* /*
* Convert bitstream data and load into the fpga * Convert bitstream data and load into the fpga
*/ */
int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size) int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
bitstream_type bstype)
{ {
printf("Bitstream support not implemented for this FPGA device\n"); printf("Bitstream support not implemented for this FPGA device\n");
return FPGA_FAIL; return FPGA_FAIL;
@ -182,7 +183,7 @@ int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
/* /*
* Generic multiplexing code * Generic multiplexing code
*/ */
int fpga_load(int devnum, const void *buf, size_t bsize) int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
{ {
int ret_val = FPGA_FAIL; /* assume failure */ int ret_val = FPGA_FAIL; /* assume failure */
const fpga_desc *desc = fpga_validate(devnum, buf, bsize, const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
@ -192,7 +193,8 @@ int fpga_load(int devnum, const void *buf, size_t bsize)
switch (desc->devtype) { switch (desc->devtype) {
case fpga_xilinx: case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX) #if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load(desc->devdesc, buf, bsize); ret_val = xilinx_load(desc->devdesc, buf, bsize,
bstype);
#else #else
fpga_no_sup((char *)__func__, "Xilinx devices"); fpga_no_sup((char *)__func__, "Xilinx devices");
#endif #endif

3
drivers/fpga/spartan2.c
View file

@ -41,7 +41,8 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
/* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */ /* Spartan-II Generic Implementation */
static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize) static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
bitstream_type bstype)
{ {
int ret_val = FPGA_FAIL; int ret_val = FPGA_FAIL;

3
drivers/fpga/spartan3.c
View file

@ -45,7 +45,8 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
/* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */ /* Spartan-II Generic Implementation */
static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize) static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
bitstream_type bstype)
{ {
int ret_val = FPGA_FAIL; int ret_val = FPGA_FAIL;

3
drivers/fpga/virtex2.c
View file

@ -90,7 +90,8 @@ static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize); static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize); static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize) static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
bitstream_type bstype)
{ {
int ret_val = FPGA_FAIL; int ret_val = FPGA_FAIL;

10
drivers/fpga/xilinx.c
View file

@ -24,7 +24,8 @@ static int xilinx_validate(xilinx_desc *desc, char *fn);
/* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */
int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
bitstream_type bstype)
{ {
unsigned int length; unsigned int length;
unsigned int swapsize; unsigned int swapsize;
@ -127,17 +128,18 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
dataptr += 4; dataptr += 4;
printf(" bytes in bitstream = %d\n", swapsize); printf(" bytes in bitstream = %d\n", swapsize);
return fpga_load(devnum, dataptr, swapsize); return fpga_load(devnum, dataptr, swapsize, bstype);
} }
int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize) int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
bitstream_type bstype)
{ {
if (!xilinx_validate (desc, (char *)__FUNCTION__)) { if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__); printf ("%s: Invalid device descriptor\n", __FUNCTION__);
return FPGA_FAIL; return FPGA_FAIL;
} }
return desc->operations->load(desc, buf, bsize); return desc->operations->load(desc, buf, bsize, bstype);
} }
int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize) int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)

4
drivers/fpga/zynqpl.c
View file

@ -357,8 +357,8 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,
return 0; return 0;
} }
static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize) bitstream_type bstype)
{ {
unsigned long ts; /* Timestamp */ unsigned long ts; /* Timestamp */
u32 partialbit = 0; u32 partialbit = 0;

10
include/fpga.h
View file

@ -36,12 +36,18 @@ typedef struct { /* typedef fpga_desc */
} fpga_desc; /* end, typedef fpga_desc */ } fpga_desc; /* end, typedef fpga_desc */
typedef enum {
BIT_FULL = 0,
} bitstream_type;
/* root function definitions */ /* root function definitions */
extern void fpga_init(void); extern void fpga_init(void);
extern int fpga_add(fpga_type devtype, void *desc); extern int fpga_add(fpga_type devtype, void *desc);
extern int fpga_count(void); extern int fpga_count(void);
extern int fpga_load(int devnum, const void *buf, size_t bsize); extern int fpga_load(int devnum, const void *buf, size_t bsize,
extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size); bitstream_type bstype);
extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
bitstream_type bstype);
extern int fpga_dump(int devnum, const void *buf, size_t bsize); extern int fpga_dump(int devnum, const void *buf, size_t bsize);
extern int fpga_info(int devnum); extern int fpga_info(int devnum);
extern const fpga_desc *const fpga_validate(int devnum, const void *buf, extern const fpga_desc *const fpga_validate(int devnum, const void *buf,

5
include/xilinx.h
View file

@ -45,14 +45,15 @@ typedef struct { /* typedef xilinx_desc */
} xilinx_desc; /* end, typedef xilinx_desc */ } xilinx_desc; /* end, typedef xilinx_desc */
struct xilinx_fpga_op { struct xilinx_fpga_op {
int (*load)(xilinx_desc *, const void *, size_t); int (*load)(xilinx_desc *, const void *, size_t, bitstream_type);
int (*dump)(xilinx_desc *, const void *, size_t); int (*dump)(xilinx_desc *, const void *, size_t);
int (*info)(xilinx_desc *); int (*info)(xilinx_desc *);
}; };
/* Generic Xilinx Functions /* Generic Xilinx Functions
*********************************************************************/ *********************************************************************/
int xilinx_load(xilinx_desc *desc, const void *image, size_t size); int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
bitstream_type bstype);
int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize); int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
int xilinx_info(xilinx_desc *desc); int xilinx_info(xilinx_desc *desc);