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starfive: Modify designware driver for JH7100
This patch is using internal RAM to improve performance （avoid flushing L2 cache): Modify designware driver by: 1, Modify gtxclk configuration by phydev->speed 2, Add Preseted mem support for mac descrtables and buffs 3, disable DMA memory range check when building for JH7100 The original patch is from 'Bo Li <bo.li@starfivetech.com>':
This commit is contained in:
TekkamanV
Tekkaman Ninja
parent
51478b7ab8
commit
7b587f7703
2 changed files with 82 additions and 13 deletions
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@ -287,6 +287,30 @@ config ETH_DESIGNWARE
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100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
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provide the PHY (physical media interface).
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config ETH_DESIGNWARE_PRESETED_BUFF
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bool "Preseted mem for Synopsys Designware Ethernet MAC"
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default y if TARGET_STARFIVE_JH7100
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if ETH_DESIGNWARE_PRESETED_BUFF
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config ETH_DESIGNWARE_PRESETED_TX_MAC_DES_BASE
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hex "Preseted mem for preseted_tx_mac_descrtable"
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default 0x18001000
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config ETH_DESIGNWARE_PRESETED_RX_MAC_DES_BASE
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hex "Preseted mem for preseted_rx_mac_descrtable"
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default 0x18002000
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config ETH_DESIGNWARE_PRESETED_TXBUFF_BASE
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hex "Preseted mem for preseted_txbuffs"
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default 0x18010000
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config ETH_DESIGNWARE_PRESETED_RXBUFF_BASE
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hex "Preseted mem for preseted_rxbuffs"
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default 0x18018000
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endif #ETH_DESIGNWARE_PRESETED_BUFF
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config ETH_DESIGNWARE_MESON8B
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bool "Amlogic Meson8b and later glue driver for Synopsys Designware Ethernet MAC"
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depends on DM_ETH
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@ -32,6 +32,30 @@
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#include <power/regulator.h>
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#include "designware.h"
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#if CONFIG_IS_ENABLED(TARGET_STARFIVE_JH7100)
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#include <asm/arch/io.h>
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#include <asm/arch/clkgen_ctrl_macro.h>
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#endif
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#if CONFIG_IS_ENABLED(ETH_DESIGNWARE_PRESETED_BUFF)
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#define TX_MAC_DES preseted_tx_mac_descrtable
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#define RX_MAC_DES preseted_rx_mac_descrtable
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#define TX_BUFF preseted_txbuffs
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#define RX_BUFF preseted_rxbuffs
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struct dmamacdescr *preseted_tx_mac_descrtable =
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(struct dmamacdescr *)CONFIG_ETH_DESIGNWARE_PRESETED_TX_MAC_DES_BASE;
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struct dmamacdescr *preseted_rx_mac_descrtable =
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(struct dmamacdescr *)CONFIG_ETH_DESIGNWARE_PRESETED_RX_MAC_DES_BASE;
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char *preseted_txbuffs = (char *)CONFIG_ETH_DESIGNWARE_PRESETED_TXBUFF_BASE;
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char *preseted_rxbuffs = (char *)CONFIG_ETH_DESIGNWARE_PRESETED_RXBUFF_BASE;
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#else
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#define TX_MAC_DES priv->tx_mac_descrtable
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#define RX_MAC_DES priv->rx_mac_descrtable
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#define TX_BUFF priv->txbuffs
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#define RX_BUFF priv->rxbuffs
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#endif
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static int dw_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
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{
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#ifdef CONFIG_DM_ETH
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@ -232,8 +256,8 @@ static int dw_dm_mdio_init(const char *name, void *priv)
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static void tx_descs_init(struct dw_eth_dev *priv)
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{
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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struct dmamacdescr *desc_table_p = &priv->tx_mac_descrtable[0];
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char *txbuffs = &priv->txbuffs[0];
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struct dmamacdescr *desc_table_p = &TX_MAC_DES[0];
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char *txbuffs = &TX_BUFF[0];
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struct dmamacdescr *desc_p;
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u32 idx;
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@ -261,9 +285,9 @@ static void tx_descs_init(struct dw_eth_dev *priv)
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desc_p->dmamac_next = (ulong)&desc_table_p[0];
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/* Flush all Tx buffer descriptors at once */
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flush_dcache_range((ulong)priv->tx_mac_descrtable,
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(ulong)priv->tx_mac_descrtable +
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sizeof(priv->tx_mac_descrtable));
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flush_dcache_range((ulong)TX_MAC_DES,
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(ulong)TX_MAC_DES +
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sizeof(struct dmamacdescr) * CONFIG_TX_DESCR_NUM);
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writel((ulong)&desc_table_p[0], &dma_p->txdesclistaddr);
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priv->tx_currdescnum = 0;
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@ -272,8 +296,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
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static void rx_descs_init(struct dw_eth_dev *priv)
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{
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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struct dmamacdescr *desc_table_p = &priv->rx_mac_descrtable[0];
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char *rxbuffs = &priv->rxbuffs[0];
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struct dmamacdescr *desc_table_p = &RX_MAC_DES[0];
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char *rxbuffs = &RX_BUFF[0];
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struct dmamacdescr *desc_p;
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u32 idx;
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@ -301,9 +325,9 @@ static void rx_descs_init(struct dw_eth_dev *priv)
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desc_p->dmamac_next = (ulong)&desc_table_p[0];
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/* Flush all Rx buffer descriptors at once */
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flush_dcache_range((ulong)priv->rx_mac_descrtable,
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(ulong)priv->rx_mac_descrtable +
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sizeof(priv->rx_mac_descrtable));
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flush_dcache_range((ulong)RX_MAC_DES,
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(ulong)RX_MAC_DES +
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sizeof(struct dmamacdescr) * CONFIG_RX_DESCR_NUM);
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writel((ulong)&desc_table_p[0], &dma_p->rxdesclistaddr);
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priv->rx_currdescnum = 0;
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@ -345,6 +369,25 @@ static int dw_adjust_link(struct dw_eth_dev *priv, struct eth_mac_regs *mac_p,
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if (phydev->duplex)
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conf |= FULLDPLXMODE;
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#if CONFIG_IS_ENABLED(TARGET_STARFIVE_JH7100)
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switch (phydev->speed) {
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case 1000:
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_DIVIDE_CLOCK_clk_gmac_gtxclk_(4);
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break;
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case 100:
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_DIVIDE_CLOCK_clk_gmac_gtxclk_(20);
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break;
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case 10:
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_DIVIDE_CLOCK_clk_gmac_gtxclk_(200);
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break;
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default:
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break;
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}
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#endif
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writel(conf, &mac_p->conf);
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printf("Speed: %d, %s duplex%s\n", phydev->speed,
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@ -451,7 +494,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
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{
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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u32 desc_num = priv->tx_currdescnum;
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struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
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struct dmamacdescr *desc_p = &TX_MAC_DES[desc_num];
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ulong desc_start = (ulong)desc_p;
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ulong desc_end = desc_start +
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roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
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@ -517,7 +560,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
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static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
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{
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u32 status, desc_num = priv->rx_currdescnum;
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struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
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struct dmamacdescr *desc_p = &RX_MAC_DES[desc_num];
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int length = -EAGAIN;
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ulong desc_start = (ulong)desc_p;
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ulong desc_end = desc_start +
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@ -548,7 +591,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
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static int _dw_free_pkt(struct dw_eth_dev *priv)
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{
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u32 desc_num = priv->rx_currdescnum;
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struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
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struct dmamacdescr *desc_p = &RX_MAC_DES[desc_num];
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ulong desc_start = (ulong)desc_p;
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ulong desc_end = desc_start +
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roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
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@ -667,10 +710,12 @@ int designware_initialize(ulong base_addr, u32 interface)
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return -ENOMEM;
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}
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#if !CONFIG_IS_ENABLED(TARGET_STARFIVE_JH7100)
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if ((phys_addr_t)priv + sizeof(*priv) > (1ULL << 32)) {
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printf("designware: buffers are outside DMA memory\n");
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return -EINVAL;
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}
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#endif
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memset(dev, 0, sizeof(struct eth_device));
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memset(priv, 0, sizeof(struct dw_eth_dev));
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