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ARM: DRA: Enable VTT regulator
DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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4 changed files with 36 additions and 0 deletions
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@ -140,6 +140,9 @@ void s_init(void)
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#endif
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#endif
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prcm_init();
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prcm_init();
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#ifdef CONFIG_SPL_BUILD
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#ifdef CONFIG_SPL_BUILD
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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board_early_init_f();
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#endif
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/* For regular u-boot sdram_init() is called from dram_init() */
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/* For regular u-boot sdram_init() is called from dram_init() */
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sdram_init();
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sdram_init();
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#endif
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#endif
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@ -13,6 +13,8 @@
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#include <common.h>
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#include <common.h>
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#include <palmas.h>
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#include <palmas.h>
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#include <sata.h>
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#include <sata.h>
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#include <asm/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/sata.h>
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#include <asm/arch/sata.h>
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@ -26,6 +28,9 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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/* GPIO 7_11 */
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#define GPIO_DDR_VTT_EN 203
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const struct omap_sysinfo sysinfo = {
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const struct omap_sysinfo sysinfo = {
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"Board: DRA7xx\n"
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"Board: DRA7xx\n"
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};
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};
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@ -272,3 +277,29 @@ int board_eth_init(bd_t *bis)
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return ret;
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return ret;
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}
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}
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#endif
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#endif
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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/* VTT regulator enable */
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static inline void vtt_regulator_enable(void)
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{
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if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)
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return;
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/* Do not enable VTT for DRA722 */
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if (omap_revision() == DRA722_ES1_0)
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return;
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/*
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* EVM Rev G and later use gpio7_11 for DDR3 termination.
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* This is safe enough to do on older revs.
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*/
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gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
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gpio_direction_output(GPIO_DDR_VTT_EN, 1);
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}
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int board_early_init_f(void)
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{
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vtt_regulator_enable();
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return 0;
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}
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#endif
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@ -139,5 +139,6 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
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{GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/
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{GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/
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#endif /* CONFIG_NAND || CONFIG_NOR */
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#endif /* CONFIG_NAND || CONFIG_NOR */
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{USB2_DRVVBUS, (M0 | IEN | FSC) },
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{USB2_DRVVBUS, (M0 | IEN | FSC) },
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{SPI1_CS1, (PEN | IDIS | M14) },
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};
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};
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#endif /* _MUX_DATA_DRA7XX_H_ */
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#endif /* _MUX_DATA_DRA7XX_H_ */
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@ -13,6 +13,7 @@
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#define __CONFIG_DRA7XX_EVM_H
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#define __CONFIG_DRA7XX_EVM_H
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#define CONFIG_DRA7XX
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#define CONFIG_DRA7XX
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#define CONFIG_BOARD_EARLY_INIT_F
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#ifndef CONFIG_QSPI_BOOT
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#ifndef CONFIG_QSPI_BOOT
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/* MMC ENV related defines */
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/* MMC ENV related defines */
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