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armv8: aarch64: Fix the warning about x1-x3 nonzero issue

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For 64-bit kernel, there is a warning about x1-x3 nonzero in violation
of boot protocol. To fix this issue, input argument 4 is added for
armv8_switch_to_el2 and armv8_switch_to_el1. The input argument 4 will
be set to the right value, such as zero.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Alison Wang 2017-01-17 09:39:17 +08:00 • committed by York Sun
parent 2ca84bf7b2
commit 7c5e1feb1d
8 changed files with 47 additions and 45 deletions
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28
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
View file

@ -486,29 +486,29 @@ cpu_is_le:
b.eq 1f b.eq 1f
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
adr x3, secondary_switch_to_el1 adr x4, secondary_switch_to_el1
ldr x4, =ES_TO_AARCH64 ldr x5, =ES_TO_AARCH64
#else #else
ldr x3, [x11] ldr x4, [x11]
ldr x4, =ES_TO_AARCH32 ldr x5, =ES_TO_AARCH32
#endif #endif
bl secondary_switch_to_el2 bl secondary_switch_to_el2
1: 1:
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
adr x3, secondary_switch_to_el1 adr x4, secondary_switch_to_el1
#else #else
ldr x3, [x11] ldr x4, [x11]
#endif #endif
ldr x4, =ES_TO_AARCH64 ldr x5, =ES_TO_AARCH64
bl secondary_switch_to_el2 bl secondary_switch_to_el2
ENDPROC(secondary_boot_func) ENDPROC(secondary_boot_func)
ENTRY(secondary_switch_to_el2) ENTRY(secondary_switch_to_el2)
switch_el x5, 1f, 0f, 0f switch_el x6, 1f, 0f, 0f
0: ret 0: ret
1: armv8_switch_to_el2_m x3, x4, x5 1: armv8_switch_to_el2_m x4, x5, x6
ENDPROC(secondary_switch_to_el2) ENDPROC(secondary_switch_to_el2)
ENTRY(secondary_switch_to_el1) ENTRY(secondary_switch_to_el1)
@ -522,22 +522,22 @@ ENTRY(secondary_switch_to_el1)
/* physical address of this cpus spin table element */ /* physical address of this cpus spin table element */
add x11, x1, x0 add x11, x1, x0
ldr x3, [x11] ldr x4, [x11]
ldr x5, [x11, #24] ldr x5, [x11, #24]
ldr x6, =IH_ARCH_DEFAULT ldr x6, =IH_ARCH_DEFAULT
cmp x6, x5 cmp x6, x5
b.eq 2f b.eq 2f
ldr x4, =ES_TO_AARCH32 ldr x5, =ES_TO_AARCH32
bl switch_to_el1 bl switch_to_el1
2: ldr x4, =ES_TO_AARCH64 2: ldr x5, =ES_TO_AARCH64
switch_to_el1: switch_to_el1:
switch_el x5, 0f, 1f, 0f switch_el x6, 0f, 1f, 0f
0: ret 0: ret
1: armv8_switch_to_el1_m x3, x4, x5 1: armv8_switch_to_el1_m x4, x5, x6
ENDPROC(secondary_switch_to_el1) ENDPROC(secondary_switch_to_el1)
/* Ensure that the literals used by the secondary boot code are /* Ensure that the literals used by the secondary boot code are

6
arch/arm/cpu/armv8/sec_firmware_asm.S
View file

@ -57,7 +57,8 @@ ENDPROC(_sec_firmware_support_psci_version)
* x0: argument, zero * x0: argument, zero
* x1: machine nr * x1: machine nr
* x2: fdt address * x2: fdt address
* x3: kernel entry point * x3: input argument
* x4: kernel entry point
* @param outputs for secure firmware: * @param outputs for secure firmware:
* x0: function id * x0: function id
* x1: kernel entry point * x1: kernel entry point
@ -65,10 +66,9 @@ ENDPROC(_sec_firmware_support_psci_version)
* x3: fdt address * x3: fdt address
*/ */
ENTRY(armv8_el2_to_aarch32) ENTRY(armv8_el2_to_aarch32)
mov x0, x3
mov x3, x2 mov x3, x2
mov x2, x1 mov x2, x1
mov x1, x0 mov x1, x4
ldr x0, =0xc000ff04 ldr x0, =0xc000ff04
smc #0 smc #0
ret ret

8
arch/arm/cpu/armv8/start.S
View file

@ -262,14 +262,14 @@ WEAK(lowlevel_init)
/* /*
* All slaves will enter EL2 and optionally EL1. * All slaves will enter EL2 and optionally EL1.
*/ */
adr x3, lowlevel_in_el2 adr x4, lowlevel_in_el2
ldr x4, =ES_TO_AARCH64 ldr x5, =ES_TO_AARCH64
bl armv8_switch_to_el2 bl armv8_switch_to_el2
lowlevel_in_el2: lowlevel_in_el2:
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
adr x3, lowlevel_in_el1 adr x4, lowlevel_in_el1
ldr x4, =ES_TO_AARCH64 ldr x5, =ES_TO_AARCH64
bl armv8_switch_to_el1 bl armv8_switch_to_el1
lowlevel_in_el1: lowlevel_in_el1:

22
arch/arm/cpu/armv8/transition.S
View file

@ -11,9 +11,9 @@
#include <asm/macro.h> #include <asm/macro.h>
ENTRY(armv8_switch_to_el2) ENTRY(armv8_switch_to_el2)
switch_el x5, 1f, 0f, 0f switch_el x6, 1f, 0f, 0f
0: 0:
cmp x4, #ES_TO_AARCH64 cmp x5, #ES_TO_AARCH64
b.eq 2f b.eq 2f
/* /*
* When loading 32-bit kernel, it will jump * When loading 32-bit kernel, it will jump
@ -22,23 +22,23 @@ ENTRY(armv8_switch_to_el2)
bl armv8_el2_to_aarch32 bl armv8_el2_to_aarch32
2: 2:
/* /*
* x3 is kernel entry point or switch_to_el1 * x4 is kernel entry point or switch_to_el1
* if CONFIG_ARMV8_SWITCH_TO_EL1 is defined. * if CONFIG_ARMV8_SWITCH_TO_EL1 is defined.
* When running in EL2 now, jump to the * When running in EL2 now, jump to the
* address saved in x3. * address saved in x4.
*/ */
br x3 br x4
1: armv8_switch_to_el2_m x3, x4, x5 1: armv8_switch_to_el2_m x4, x5, x6
ENDPROC(armv8_switch_to_el2) ENDPROC(armv8_switch_to_el2)
ENTRY(armv8_switch_to_el1) ENTRY(armv8_switch_to_el1)
switch_el x5, 0f, 1f, 0f switch_el x6, 0f, 1f, 0f
0: 0:
/* x3 is kernel entry point. When running in EL1 /* x4 is kernel entry point. When running in EL1
* now, jump to the address saved in x3. * now, jump to the address saved in x4.
*/ */
br x3 br x4
1: armv8_switch_to_el1_m x3, x4, x5 1: armv8_switch_to_el1_m x4, x5, x6
ENDPROC(armv8_switch_to_el1) ENDPROC(armv8_switch_to_el1)
WEAK(armv8_el2_to_aarch32) WEAK(armv8_el2_to_aarch32)

8
arch/arm/include/asm/system.h
View file

@ -196,11 +196,12 @@ void __asm_switch_ttbr(u64 new_ttbr);
* For loading 32-bit OS, machine nr * For loading 32-bit OS, machine nr
* @fdt_addr: For loading 64-bit OS, zero. * @fdt_addr: For loading 64-bit OS, zero.
* For loading 32-bit OS, fdt address. * For loading 32-bit OS, fdt address.
* @arg4: Input argument.
* @entry_point: kernel entry point * @entry_point: kernel entry point
* @es_flag: execution state flag, ES_TO_AARCH64 or ES_TO_AARCH32 * @es_flag: execution state flag, ES_TO_AARCH64 or ES_TO_AARCH32
*/ */
void armv8_switch_to_el2(u64 args, u64 mach_nr, u64 fdt_addr, void armv8_switch_to_el2(u64 args, u64 mach_nr, u64 fdt_addr,
u64 entry_point, u64 es_flag); u64 arg4, u64 entry_point, u64 es_flag);
/* /*
* Switch from EL2 to EL1 for ARMv8 * Switch from EL2 to EL1 for ARMv8
* *
@ -210,13 +211,14 @@ void armv8_switch_to_el2(u64 args, u64 mach_nr, u64 fdt_addr,
* For loading 32-bit OS, machine nr * For loading 32-bit OS, machine nr
* @fdt_addr: For loading 64-bit OS, zero. * @fdt_addr: For loading 64-bit OS, zero.
* For loading 32-bit OS, fdt address. * For loading 32-bit OS, fdt address.
* @arg4: Input argument.
* @entry_point: kernel entry point * @entry_point: kernel entry point
* @es_flag: execution state flag, ES_TO_AARCH64 or ES_TO_AARCH32 * @es_flag: execution state flag, ES_TO_AARCH64 or ES_TO_AARCH32
*/ */
void armv8_switch_to_el1(u64 args, u64 mach_nr, u64 fdt_addr, void armv8_switch_to_el1(u64 args, u64 mach_nr, u64 fdt_addr,
u64 entry_point, u64 es_flag); u64 arg4, u64 entry_point, u64 es_flag);
void armv8_el2_to_aarch32(u64 args, u64 mach_nr, u64 fdt_addr, void armv8_el2_to_aarch32(u64 args, u64 mach_nr, u64 fdt_addr,
u64 entry_point); u64 arg4, u64 entry_point);
void gic_init(void); void gic_init(void);
void gic_send_sgi(unsigned long sgino); void gic_send_sgi(unsigned long sgino);
void wait_for_wakeup(void); void wait_for_wakeup(void);

10
arch/arm/lib/bootm.c
View file

@ -287,11 +287,11 @@ static void switch_to_el1(void)
if ((IH_ARCH_DEFAULT == IH_ARCH_ARM64) && if ((IH_ARCH_DEFAULT == IH_ARCH_ARM64) &&
(images.os.arch == IH_ARCH_ARM)) (images.os.arch == IH_ARCH_ARM))
armv8_switch_to_el1(0, (u64)gd->bd->bi_arch_number, armv8_switch_to_el1(0, (u64)gd->bd->bi_arch_number,
(u64)images.ft_addr, (u64)images.ft_addr, 0,
(u64)images.ep, (u64)images.ep,
ES_TO_AARCH32); ES_TO_AARCH32);
else else
armv8_switch_to_el1((u64)images.ft_addr, 0, 0, armv8_switch_to_el1((u64)images.ft_addr, 0, 0, 0,
images.ep, images.ep,
ES_TO_AARCH64); ES_TO_AARCH64);
} }
@ -324,17 +324,17 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
update_os_arch_secondary_cores(images->os.arch); update_os_arch_secondary_cores(images->os.arch);
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
armv8_switch_to_el2((u64)images->ft_addr, 0, 0, armv8_switch_to_el2((u64)images->ft_addr, 0, 0, 0,
(u64)switch_to_el1, ES_TO_AARCH64); (u64)switch_to_el1, ES_TO_AARCH64);
#else #else
if ((IH_ARCH_DEFAULT == IH_ARCH_ARM64) && if ((IH_ARCH_DEFAULT == IH_ARCH_ARM64) &&
(images->os.arch == IH_ARCH_ARM)) (images->os.arch == IH_ARCH_ARM))
armv8_switch_to_el2(0, (u64)gd->bd->bi_arch_number, armv8_switch_to_el2(0, (u64)gd->bd->bi_arch_number,
(u64)images->ft_addr, (u64)images->ft_addr, 0,
(u64)images->ep, (u64)images->ep,
ES_TO_AARCH32); ES_TO_AARCH32);
else else
armv8_switch_to_el2((u64)images->ft_addr, 0, 0, armv8_switch_to_el2((u64)images->ft_addr, 0, 0, 0,
images->ep, images->ep,
ES_TO_AARCH64); ES_TO_AARCH64);
#endif #endif

8
arch/arm/mach-rmobile/lowlevel_init_gen3.S
View file

@ -61,14 +61,14 @@ ENTRY(lowlevel_init)
/* /*
* All slaves will enter EL2 and optionally EL1. * All slaves will enter EL2 and optionally EL1.
*/ */
adr x3, lowlevel_in_el2 adr x4, lowlevel_in_el2
ldr x4, =ES_TO_AARCH64 ldr x5, =ES_TO_AARCH64
bl armv8_switch_to_el2 bl armv8_switch_to_el2
lowlevel_in_el2: lowlevel_in_el2:
#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
adr x3, lowlevel_in_el1 adr x4, lowlevel_in_el1
ldr x4, =ES_TO_AARCH64 ldr x5, =ES_TO_AARCH64
bl armv8_switch_to_el1 bl armv8_switch_to_el1
lowlevel_in_el1: lowlevel_in_el1:

2
cmd/bootefi.c
View file

@ -246,7 +246,7 @@ static unsigned long do_bootefi_exec(void *efi, void *fdt)
/* Move into EL2 and keep running there */ /* Move into EL2 and keep running there */
armv8_switch_to_el2((ulong)entry, (ulong)&loaded_image_info, armv8_switch_to_el2((ulong)entry, (ulong)&loaded_image_info,
(ulong)&systab, (ulong)efi_run_in_el2, (ulong)&systab, 0, (ulong)efi_run_in_el2,
ES_TO_AARCH64); ES_TO_AARCH64);
/* Should never reach here, efi exits with longjmp */ /* Should never reach here, efi exits with longjmp */