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SPEAr: explicitly select clk src for UART
UART in u-boot intends to run on 48MHz clock supplied by USB PLL. Explicitly select the intended clock source. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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8337aa5c0b
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2 changed files with 8 additions and 1 deletions
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@ -30,7 +30,7 @@ int arch_cpu_init(void)
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{
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{
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struct misc_regs *const misc_p =
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struct misc_regs *const misc_p =
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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u32 periph1_clken;
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u32 periph1_clken, periph_clk_cfg;
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periph1_clken = readl(&misc_p->periph1_clken);
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periph1_clken = readl(&misc_p->periph1_clken);
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@ -42,6 +42,11 @@ int arch_cpu_init(void)
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#if defined(CONFIG_PL011_SERIAL)
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#if defined(CONFIG_PL011_SERIAL)
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periph1_clken |= MISC_UART0ENB;
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periph1_clken |= MISC_UART0ENB;
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periph_clk_cfg = readl(&misc_p->periph_clk_cfg);
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periph_clk_cfg &= ~CONFIG_SPEAR_UARTCLKMSK;
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periph_clk_cfg |= CONFIG_SPEAR_UART48M;
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writel(periph_clk_cfg, &misc_p->periph_clk_cfg);
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#endif
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#endif
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#if defined(CONFIG_DESIGNWARE_ETH)
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#if defined(CONFIG_DESIGNWARE_ETH)
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periph1_clken |= MISC_ETHENB;
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periph1_clken |= MISC_ETHENB;
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@ -110,6 +110,8 @@ struct misc_regs {
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/* PERIPH_CLK_CFG value */
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/* PERIPH_CLK_CFG value */
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#define MISC_GPT3SYNTH 0x00000400
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#define MISC_GPT3SYNTH 0x00000400
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#define MISC_GPT4SYNTH 0x00000800
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#define MISC_GPT4SYNTH 0x00000800
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#define CONFIG_SPEAR_UART48M 0
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#define CONFIG_SPEAR_UARTCLKMSK (0x1 << 4)
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/* PRSC_CLK_CFG value */
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/* PRSC_CLK_CFG value */
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/*
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/*
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