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Merge git://git.denx.de/u-boot-dm

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This commit is contained in:
Tom Rini 2017-04-04 09:18:57 -04:00
commit 7d67bb1daf
14 changed files with 711 additions and 21 deletions
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1
arch/arm/Kconfig
View file

@ -1132,6 +1132,7 @@ config ARCH_STI
select DM_SERIAL
select BLK
select DM_MMC
select DM_RESET
help
Support for STMicroelectronics STiH407/10 SoC family.
This SoC is used on Linaro 96Board STiH410-B2260

162
cmd/tpm.c
View file

@ -592,6 +592,45 @@ static int do_tpm_oiap(cmd_tbl_t *cmdtp, int flag,
return report_return_code(err);
}
#ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1
static int do_tpm_load_key_by_sha1(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
{
uint32_t parent_handle = 0;
uint32_t key_len, key_handle, err;
uint8_t usage_auth[DIGEST_LENGTH];
uint8_t parent_hash[DIGEST_LENGTH];
void *key;
if (argc < 5)
return CMD_RET_USAGE;
parse_byte_string(argv[1], parent_hash, NULL);
key = (void *)simple_strtoul(argv[2], NULL, 0);
key_len = simple_strtoul(argv[3], NULL, 0);
if (strlen(argv[4]) != 2 * DIGEST_LENGTH)
return CMD_RET_FAILURE;
parse_byte_string(argv[4], usage_auth, NULL);
err = tpm_find_key_sha1(usage_auth, parent_hash, &parent_handle);
if (err) {
printf("Could not find matching parent key (err = %d)\n", err);
return CMD_RET_FAILURE;
}
printf("Found parent key %08x\n", parent_handle);
err = tpm_load_key2_oiap(parent_handle, key, key_len, usage_auth,
&key_handle);
if (!err) {
printf("Key handle is 0x%x\n", key_handle);
setenv_hex("key_handle", key_handle);
}
return report_return_code(err);
}
#endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */
static int do_tpm_load_key2_oiap(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
@ -652,31 +691,36 @@ static int do_tpm_flush(cmd_tbl_t *cmdtp, int flag, int argc,
{
int type = 0;
if (argc != 2)
if (argc != 3)
return CMD_RET_USAGE;
if (strcasecmp(argv[1], "key"))
if (!strcasecmp(argv[1], "key"))
type = TPM_RT_KEY;
else if (strcasecmp(argv[1], "auth"))
else if (!strcasecmp(argv[1], "auth"))
type = TPM_RT_AUTH;
else if (strcasecmp(argv[1], "hash"))
else if (!strcasecmp(argv[1], "hash"))
type = TPM_RT_HASH;
else if (strcasecmp(argv[1], "trans"))
else if (!strcasecmp(argv[1], "trans"))
type = TPM_RT_TRANS;
else if (strcasecmp(argv[1], "context"))
else if (!strcasecmp(argv[1], "context"))
type = TPM_RT_CONTEXT;
else if (strcasecmp(argv[1], "counter"))
else if (!strcasecmp(argv[1], "counter"))
type = TPM_RT_COUNTER;
else if (strcasecmp(argv[1], "delegate"))
else if (!strcasecmp(argv[1], "delegate"))
type = TPM_RT_DELEGATE;
else if (strcasecmp(argv[1], "daa_tpm"))
else if (!strcasecmp(argv[1], "daa_tpm"))
type = TPM_RT_DAA_TPM;
else if (strcasecmp(argv[1], "daa_v0"))
else if (!strcasecmp(argv[1], "daa_v0"))
type = TPM_RT_DAA_V0;
else if (strcasecmp(argv[1], "daa_v1"))
else if (!strcasecmp(argv[1], "daa_v1"))
type = TPM_RT_DAA_V1;
if (strcasecmp(argv[2], "all")) {
if (!type) {
printf("Resource type %s unknown.\n", argv[1]);
return -1;
}
if (!strcasecmp(argv[2], "all")) {
uint16_t res_count;
uint8_t buf[288];
uint8_t *ptr;
@ -686,8 +730,10 @@ static int do_tpm_flush(cmd_tbl_t *cmdtp, int flag, int argc,
/* fetch list of already loaded resources in the TPM */
err = tpm_get_capability(TPM_CAP_HANDLE, type, buf,
sizeof(buf));
if (err)
if (err) {
printf("tpm_get_capability returned error %d.\n", err);
return -1;
}
res_count = get_unaligned_be16(buf);
ptr = buf + 2;
for (i = 0; i < res_count; ++i, ptr += 4)
@ -695,8 +741,10 @@ static int do_tpm_flush(cmd_tbl_t *cmdtp, int flag, int argc,
} else {
uint32_t handle = simple_strtoul(argv[2], NULL, 0);
if (!handle)
if (!handle) {
printf("Illegal resource handle %s\n", argv[2]);
return -1;
}
tpm_flush_specific(cpu_to_be32(handle), type);
}
@ -704,6 +752,68 @@ static int do_tpm_flush(cmd_tbl_t *cmdtp, int flag, int argc,
}
#endif /* CONFIG_TPM_FLUSH_RESOURCES */
#ifdef CONFIG_TPM_LIST_RESOURCES
static int do_tpm_list(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
int type = 0;
uint16_t res_count;
uint8_t buf[288];
uint8_t *ptr;
int err;
uint i;
if (argc != 2)
return CMD_RET_USAGE;
if (!strcasecmp(argv[1], "key"))
type = TPM_RT_KEY;
else if (!strcasecmp(argv[1], "auth"))
type = TPM_RT_AUTH;
else if (!strcasecmp(argv[1], "hash"))
type = TPM_RT_HASH;
else if (!strcasecmp(argv[1], "trans"))
type = TPM_RT_TRANS;
else if (!strcasecmp(argv[1], "context"))
type = TPM_RT_CONTEXT;
else if (!strcasecmp(argv[1], "counter"))
type = TPM_RT_COUNTER;
else if (!strcasecmp(argv[1], "delegate"))
type = TPM_RT_DELEGATE;
else if (!strcasecmp(argv[1], "daa_tpm"))
type = TPM_RT_DAA_TPM;
else if (!strcasecmp(argv[1], "daa_v0"))
type = TPM_RT_DAA_V0;
else if (!strcasecmp(argv[1], "daa_v1"))
type = TPM_RT_DAA_V1;
if (!type) {
printf("Resource type %s unknown.\n", argv[1]);
return -1;
}
/* fetch list of already loaded resources in the TPM */
err = tpm_get_capability(TPM_CAP_HANDLE, type, buf,
sizeof(buf));
if (err) {
printf("tpm_get_capability returned error %d.\n", err);
return -1;
}
res_count = get_unaligned_be16(buf);
ptr = buf + 2;
printf("Resources of type %s (%02x):\n", argv[1], type);
if (!res_count) {
puts("None\n");
} else {
for (i = 0; i < res_count; ++i, ptr += 4)
printf("Index %d: %08x\n", i, get_unaligned_be32(ptr));
}
return 0;
}
#endif /* CONFIG_TPM_LIST_RESOURCES */
#define MAKE_TPM_CMD_ENTRY(cmd) \
U_BOOT_CMD_MKENT(cmd, 0, 1, do_tpm_ ## cmd, "", "")
@ -756,6 +866,10 @@ static cmd_tbl_t tpm_commands[] = {
do_tpm_end_oiap, "", ""),
U_BOOT_CMD_MKENT(load_key2_oiap, 0, 1,
do_tpm_load_key2_oiap, "", ""),
#ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1
U_BOOT_CMD_MKENT(load_key_by_sha1, 0, 1,
do_tpm_load_key_by_sha1, "", ""),
#endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */
U_BOOT_CMD_MKENT(get_pub_key_oiap, 0, 1,
do_tpm_get_pub_key_oiap, "", ""),
#endif /* CONFIG_TPM_AUTH_SESSIONS */
@ -763,6 +877,10 @@ static cmd_tbl_t tpm_commands[] = {
U_BOOT_CMD_MKENT(flush, 0, 1,
do_tpm_flush, "", ""),
#endif /* CONFIG_TPM_FLUSH_RESOURCES */
#ifdef CONFIG_TPM_LIST_RESOURCES
U_BOOT_CMD_MKENT(list, 0, 1,
do_tpm_list, "", ""),
#endif /* CONFIG_TPM_LIST_RESOURCES */
};
static int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@ -812,20 +930,34 @@ U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm,
" get_capability cap_area sub_cap addr count\n"
" - Read <count> bytes of TPM capability indexed by <cap_area> and\n"
" <sub_cap> to memory address <addr>.\n"
#ifdef CONFIG_TPM_FLUSH_RESOURCES
#if defined(CONFIG_TPM_FLUSH_RESOURCES) || defined(CONFIG_TPM_LIST_RESOURCES)
"Resource management functions\n"
#endif
#ifdef CONFIG_TPM_FLUSH_RESOURCES
" flush resource_type id\n"
" - flushes a resource of type <resource_type> (may be one of key, auth,\n"
" hash, trans, context, counter, delegate, daa_tpm, daa_v0, daa_v1),\n"
" and id <id> from the TPM. Use an <id> of \"all\" to flush all\n"
" resources of that type.\n"
#endif /* CONFIG_TPM_FLUSH_RESOURCES */
#ifdef CONFIG_TPM_LIST_RESOURCES
" list resource_type\n"
" - lists resources of type <resource_type> (may be one of key, auth,\n"
" hash, trans, context, counter, delegate, daa_tpm, daa_v0, daa_v1),\n"
" contained in the TPM.\n"
#endif /* CONFIG_TPM_LIST_RESOURCES */
#ifdef CONFIG_TPM_AUTH_SESSIONS
"Storage functions\n"
" loadkey2_oiap parent_handle key_addr key_len usage_auth\n"
" - loads a key data from memory address <key_addr>, <key_len> bytes\n"
" into TPM using the parent key <parent_handle> with authorization\n"
" <usage_auth> (20 bytes hex string).\n"
#ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1
" load_key_by_sha1 parent_hash key_addr key_len usage_auth\n"
" - loads a key data from memory address <key_addr>, <key_len> bytes\n"
" into TPM using the parent hash <parent_hash> (20 bytes hex string)\n"
" with authorization <usage_auth> (20 bytes hex string).\n"
#endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */
" get_pub_key_oiap key_handle usage_auth\n"
" - get the public key portion of a loaded key <key_handle> using\n"
" authorization <usage auth> (20 bytes hex string)\n"

5
drivers/pci/pci-uclass.c
View file

@ -551,9 +551,10 @@ int dm_pci_hose_probe_bus(struct udevice *bus)
* pci_match_one_device - Tell if a PCI device structure has a matching
* PCI device id structure
* @id: single PCI device id structure to match
* @dev: the PCI device structure to match against
* @find: the PCI device id structure to match against
*
* Returns the matching pci_device_id structure or %NULL if there is no match.
* Returns true if the finding pci_device_id structure matched or false if
* there is no match.
*/
static bool pci_match_one_id(const struct pci_device_id *id,
const struct pci_device_id *find)

10
drivers/pinctrl/Kconfig
View file

@ -212,6 +212,16 @@ config PINCTRL_STM32
definitions and pin control functions for each available multiplex
function.
config PINCTRL_SINGLE
bool "Single register pin-control and pin-multiplex driver"
depends on DM
help
This enables pinctrl driver for systems using a single register for
pin configuration and multiplexing. TI's AM335X SoCs are examples of
such systems.
Depending on the platform make sure to also enable OF_TRANSLATE and
eventually SPL_OF_TRANSLATE to get correct address translations.
endif
source "drivers/pinctrl/meson/Kconfig"

1
drivers/pinctrl/Makefile
View file

@ -16,5 +16,6 @@ obj-$(CONFIG_PIC32_PINCTRL) += pinctrl_pic32.o
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
obj-$(CONFIG_PINCTRL_MESON) += meson/
obj-$(CONFIG_PINCTRL_MVEBU) += mvebu/
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o
obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o

142
drivers/pinctrl/pinctrl-single.c Normal file
View file

@ -0,0 +1,142 @@
/*
* Copyright (C) EETS GmbH, 2017, Felix Brack <f.brack@eets.ch>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm/device.h>
#include <dm/pinctrl.h>
#include <libfdt.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
struct single_pdata {
fdt_addr_t base; /* first configuration register */
int offset; /* index of last configuration register */
u32 mask; /* configuration-value mask bits */
int width; /* configuration register bit width */
};
struct single_fdt_pin_cfg {
fdt32_t reg; /* configuration register offset */
fdt32_t val; /* configuration register value */
};
/**
* single_configure_pins() - Configure pins based on FDT data
*
* @dev: Pointer to single pin configuration device which is the parent of
* the pins node holding the pin configuration data.
* @pins: Pointer to the first element of an array of register/value pairs
* of type 'struct single_fdt_pin_cfg'. Each such pair describes the
* the pin to be configured and the value to be used for configuration.
* This pointer points to a 'pinctrl-single,pins' property in the
* device-tree.
* @size: Size of the 'pins' array in bytes.
* The number of register/value pairs in the 'pins' array therefore
* equals to 'size / sizeof(struct single_fdt_pin_cfg)'.
*/
static int single_configure_pins(struct udevice *dev,
const struct single_fdt_pin_cfg *pins,
int size)
{
struct single_pdata *pdata = dev->platdata;
int count = size / sizeof(struct single_fdt_pin_cfg);
int n, reg;
u32 val;
for (n = 0; n < count; n++) {
reg = fdt32_to_cpu(pins->reg);
if ((reg < 0) || (reg > pdata->offset)) {
dev_dbg(dev, " invalid register offset 0x%08x\n", reg);
pins++;
continue;
}
reg += pdata->base;
switch (pdata->width) {
case 32:
val = readl(reg) & ~pdata->mask;
val |= fdt32_to_cpu(pins->val) & pdata->mask;
writel(val, reg);
dev_dbg(dev, " reg/val 0x%08x/0x%08x\n",
reg, val);
break;
default:
dev_warn(dev, "unsupported register width %i\n",
pdata->width);
}
pins++;
}
return 0;
}
static int single_set_state(struct udevice *dev,
struct udevice *config)
{
const void *fdt = gd->fdt_blob;
const struct single_fdt_pin_cfg *prop;
int len;
prop = fdt_getprop(fdt, config->of_offset, "pinctrl-single,pins", &len);
if (prop) {
dev_dbg(dev, "configuring pins for %s\n", config->name);
if (len % sizeof(struct single_fdt_pin_cfg)) {
dev_dbg(dev, " invalid pin configuration in fdt\n");
return -FDT_ERR_BADSTRUCTURE;
}
single_configure_pins(dev, prop, len);
len = 0;
}
return len;
}
static int single_ofdata_to_platdata(struct udevice *dev)
{
fdt_addr_t addr;
u32 of_reg[2];
int res;
struct single_pdata *pdata = dev->platdata;
pdata->width = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"pinctrl-single,register-width", 0);
res = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
"reg", of_reg, 2);
if (res)
return res;
pdata->offset = of_reg[1] - pdata->width / 8;
addr = dev_get_addr(dev);
if (addr == FDT_ADDR_T_NONE) {
dev_dbg(dev, "no valid base register address\n");
return -EINVAL;
}
pdata->base = addr;
pdata->mask = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"pinctrl-single,function-mask",
0xffffffff);
return 0;
}
const struct pinctrl_ops single_pinctrl_ops = {
.set_state = single_set_state,
};
static const struct udevice_id single_pinctrl_match[] = {
{ .compatible = "pinctrl-single" },
{ /* sentinel */ }
};
U_BOOT_DRIVER(single_pinctrl) = {
.name = "single-pinctrl",
.id = UCLASS_PINCTRL,
.of_match = single_pinctrl_match,
.ops = &single_pinctrl_ops,
.flags = DM_FLAG_PRE_RELOC,
.platdata_auto_alloc_size = sizeof(struct single_pdata),
.ofdata_to_platdata = single_ofdata_to_platdata,
};

8
drivers/reset/Kconfig
View file

@ -20,6 +20,14 @@ config SANDBOX_RESET
simply accepts requests to reset various HW modules without actually
doing anything beyond a little error checking.
config STI_RESET
bool "Enable the STi reset"
depends on ARCH_STI
help
Support for reset controllers on STMicroelectronics STiH407 family SoCs.
Say Y if you want to control reset signals provided by system config
block.
config TEGRA_CAR_RESET
bool "Enable Tegra CAR-based reset driver"
depends on TEGRA_CAR

1
drivers/reset/Makefile
View file

@ -5,6 +5,7 @@
obj-$(CONFIG_DM_RESET) += reset-uclass.o
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
obj-$(CONFIG_STI_RESET) += sti-reset.o
obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o
obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o

320
drivers/reset/sti-reset.c Normal file
View file

@ -0,0 +1,320 @@
/*
* Copyright (c) 2017
* Patrice Chotard <patrice.chotard@st.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <wait_bit.h>
#include <dm.h>
#include <reset-uclass.h>
#include <regmap.h>
#include <syscon.h>
#include <dt-bindings/reset/stih407-resets.h>
DECLARE_GLOBAL_DATA_PTR;
struct sti_reset {
const struct syscfg_reset_controller_data *data;
};
/**
* Reset channel description for a system configuration register based
* reset controller.
*
* @compatible: Compatible string of the syscon containing this
* channel's control and ack (status) bits.
* @reset_offset: Reset register offset in sysconf bank.
* @reset_bit: Bit number in reset register.
* @ack_offset: Ack reset register offset in syscon bank.
* @ack_bit: Bit number in Ack reset register.
*/
struct syscfg_reset_channel_data {
const char *compatible;
int reset_offset;
int reset_bit;
int ack_offset;
int ack_bit;
};
/**
* Description of a system configuration register based reset controller.
*
* @wait_for_ack: The controller will wait for reset assert and de-assert to
* be "ack'd" in a channel's ack field.
* @active_low: Are the resets in this controller active low, i.e. clearing
* the reset bit puts the hardware into reset.
* @nr_channels: The number of reset channels in this controller.
* @channels: An array of reset channel descriptions.
*/
struct syscfg_reset_controller_data {
bool wait_for_ack;
bool active_low;
int nr_channels;
const struct syscfg_reset_channel_data *channels;
};
/* STiH407 Peripheral powerdown definitions. */
static const char stih407_core[] = "st,stih407-core-syscfg";
static const char stih407_sbc_reg[] = "st,stih407-sbc-reg-syscfg";
static const char stih407_lpm[] = "st,stih407-lpm-syscfg";
#define _SYSCFG_RST_CH(_c, _rr, _rb, _ar, _ab) \
{ .compatible = _c, \
.reset_offset = _rr, \
.reset_bit = _rb, \
.ack_offset = _ar, \
.ack_bit = _ab, }
#define _SYSCFG_RST_CH_NO_ACK(_c, _rr, _rb) \
{ .compatible = _c, \
.reset_offset = _rr, \
.reset_bit = _rb, }
#define STIH407_SRST_CORE(_reg, _bit) \
_SYSCFG_RST_CH_NO_ACK(stih407_core, _reg, _bit)
#define STIH407_SRST_SBC(_reg, _bit) \
_SYSCFG_RST_CH_NO_ACK(stih407_sbc_reg, _reg, _bit)
#define STIH407_SRST_LPM(_reg, _bit) \
_SYSCFG_RST_CH_NO_ACK(stih407_lpm, _reg, _bit)
#define STIH407_PDN_0(_bit) \
_SYSCFG_RST_CH(stih407_core, SYSCFG_5000, _bit, SYSSTAT_5500, _bit)
#define STIH407_PDN_1(_bit) \
_SYSCFG_RST_CH(stih407_core, SYSCFG_5001, _bit, SYSSTAT_5501, _bit)
#define STIH407_PDN_ETH(_bit, _stat) \
_SYSCFG_RST_CH(stih407_sbc_reg, SYSCFG_4032, _bit, SYSSTAT_4520, _stat)
/* Powerdown requests control 0 */
#define SYSCFG_5000 0x0
#define SYSSTAT_5500 0x7d0
/* Powerdown requests control 1 (High Speed Links) */
#define SYSCFG_5001 0x4
#define SYSSTAT_5501 0x7d4
/* Ethernet powerdown/status/reset */
#define SYSCFG_4032 0x80
#define SYSSTAT_4520 0x820
#define SYSCFG_4002 0x8
static const struct syscfg_reset_channel_data stih407_powerdowns[] = {
[STIH407_EMISS_POWERDOWN] = STIH407_PDN_0(1),
[STIH407_NAND_POWERDOWN] = STIH407_PDN_0(0),
[STIH407_USB3_POWERDOWN] = STIH407_PDN_1(6),
[STIH407_USB2_PORT1_POWERDOWN] = STIH407_PDN_1(5),
[STIH407_USB2_PORT0_POWERDOWN] = STIH407_PDN_1(4),
[STIH407_PCIE1_POWERDOWN] = STIH407_PDN_1(3),
[STIH407_PCIE0_POWERDOWN] = STIH407_PDN_1(2),
[STIH407_SATA1_POWERDOWN] = STIH407_PDN_1(1),
[STIH407_SATA0_POWERDOWN] = STIH407_PDN_1(0),
[STIH407_ETH1_POWERDOWN] = STIH407_PDN_ETH(0, 2),
};
/* Reset Generator control 0/1 */
#define SYSCFG_5128 0x200
#define SYSCFG_5131 0x20c
#define SYSCFG_5132 0x210
#define LPM_SYSCFG_1 0x4 /* Softreset IRB & SBC UART */
static const struct syscfg_reset_channel_data stih407_softresets[] = {
[STIH407_ETH1_SOFTRESET] = STIH407_SRST_SBC(SYSCFG_4002, 4),
[STIH407_MMC1_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 3),
[STIH407_USB2_PORT0_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 28),
[STIH407_USB2_PORT1_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 29),
[STIH407_PICOPHY_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 30),
[STIH407_IRB_SOFTRESET] = STIH407_SRST_LPM(LPM_SYSCFG_1, 6),
[STIH407_PCIE0_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 6),
[STIH407_PCIE1_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 15),
[STIH407_SATA0_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 7),
[STIH407_SATA1_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 16),
[STIH407_MIPHY0_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 4),
[STIH407_MIPHY1_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 13),
[STIH407_MIPHY2_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 22),
[STIH407_SATA0_PWR_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 5),
[STIH407_SATA1_PWR_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 14),
[STIH407_DELTA_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 3),
[STIH407_BLITTER_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 10),
[STIH407_HDTVOUT_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 11),
[STIH407_HDQVDP_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 12),
[STIH407_VDP_AUX_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 14),
[STIH407_COMPO_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 15),
[STIH407_HDMI_TX_PHY_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 21),
[STIH407_JPEG_DEC_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 23),
[STIH407_VP8_DEC_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 24),
[STIH407_GPU_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 30),
[STIH407_HVA_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 0),
[STIH407_ERAM_HVA_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 1),
[STIH407_LPM_SOFTRESET] = STIH407_SRST_SBC(SYSCFG_4002, 2),
[STIH407_KEYSCAN_SOFTRESET] = STIH407_SRST_LPM(LPM_SYSCFG_1, 8),
[STIH407_ST231_AUD_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 26),
[STIH407_ST231_DMU_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 27),
[STIH407_ST231_GP0_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5131, 28),
[STIH407_ST231_GP1_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5128, 2),
};
/* PicoPHY reset/control */
#define SYSCFG_5061 0x0f4
static const struct syscfg_reset_channel_data stih407_picophyresets[] = {
[STIH407_PICOPHY0_RESET] = STIH407_SRST_CORE(SYSCFG_5061, 5),
[STIH407_PICOPHY1_RESET] = STIH407_SRST_CORE(SYSCFG_5061, 6),
[STIH407_PICOPHY2_RESET] = STIH407_SRST_CORE(SYSCFG_5061, 7),
};
static const struct
syscfg_reset_controller_data stih407_powerdown_controller = {
.wait_for_ack = true,
.nr_channels = ARRAY_SIZE(stih407_powerdowns),
.channels = stih407_powerdowns,
};
static const struct
syscfg_reset_controller_data stih407_softreset_controller = {
.wait_for_ack = false,
.active_low = true,
.nr_channels = ARRAY_SIZE(stih407_softresets),
.channels = stih407_softresets,
};
static const struct
syscfg_reset_controller_data stih407_picophyreset_controller = {
.wait_for_ack = false,
.nr_channels = ARRAY_SIZE(stih407_picophyresets),
.channels = stih407_picophyresets,
};
phys_addr_t sti_reset_get_regmap(const char *compatible)
{
struct udevice *syscon;
struct regmap *regmap;
int node, ret;
node = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
compatible);
if (node < 0) {
error("unable to find %s node\n", compatible);
return node;
}
ret = uclass_get_device_by_of_offset(UCLASS_SYSCON, node, &syscon);
if (ret) {
error("%s: uclass_get_device_by_of_offset failed: %d\n",
__func__, ret);
return ret;
}
regmap = syscon_get_regmap(syscon);
if (!regmap) {
error("unable to get regmap for %s\n", syscon->name);
return -ENODEV;
}
return regmap->base;
}
static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert)
{
struct udevice *dev = reset_ctl->dev;
struct syscfg_reset_controller_data *reset_desc =
(struct syscfg_reset_controller_data *)(dev->driver_data);
struct syscfg_reset_channel_data ch;
phys_addr_t base;
u32 ctrl_val = reset_desc->active_low ? !assert : !!assert;
void __iomem *reg;
/* check if reset id is inside available range */
if (reset_ctl->id >= reset_desc->nr_channels)
return -EINVAL;
/* get reset sysconf register base address */
base = sti_reset_get_regmap(reset_desc->channels[reset_ctl->id].compatible);
ch = reset_desc->channels[reset_ctl->id];
reg = (void __iomem *)base + ch.reset_offset;
if (ctrl_val)
generic_set_bit(ch.reset_bit, reg);
else
generic_clear_bit(ch.reset_bit, reg);
if (!reset_desc->wait_for_ack)
return 0;
reg = (void __iomem *)base + ch.ack_offset;
if (wait_for_bit(__func__, reg, BIT(ch.ack_bit), ctrl_val,
1000, false)) {
error("Stuck on waiting ack reset_ctl=%p dev=%p id=%lu\n",
reset_ctl, reset_ctl->dev, reset_ctl->id);
return -ETIMEDOUT;
}
return 0;
}
static int sti_reset_request(struct reset_ctl *reset_ctl)
{
return 0;
}
static int sti_reset_free(struct reset_ctl *reset_ctl)
{
return 0;
}
static int sti_reset_assert(struct reset_ctl *reset_ctl)
{
return sti_reset_program_hw(reset_ctl, true);
}
static int sti_reset_deassert(struct reset_ctl *reset_ctl)
{
return sti_reset_program_hw(reset_ctl, false);
}
struct reset_ops sti_reset_ops = {
.request = sti_reset_request,
.free = sti_reset_free,
.rst_assert = sti_reset_assert,
.rst_deassert = sti_reset_deassert,
};
static int sti_reset_probe(struct udevice *dev)
{
struct sti_reset *priv = dev_get_priv(dev);
priv->data = (void *)dev_get_driver_data(dev);
return 0;
}
static const struct udevice_id sti_reset_ids[] = {
{
.compatible = "st,stih407-picophyreset",
.data = (ulong)&stih407_picophyreset_controller,
},
{
.compatible = "st,stih407-powerdown",
.data = (ulong)&stih407_powerdown_controller,
},
{
.compatible = "st,stih407-softreset",
.data = (ulong)&stih407_softreset_controller,
},
{ }
};
U_BOOT_DRIVER(sti_reset) = {
.name = "sti_reset",
.id = UCLASS_RESET,
.of_match = sti_reset_ids,
.probe = sti_reset_probe,
.priv_auto_alloc_size = sizeof(struct sti_reset),
.ops = &sti_reset_ops,
};

15
drivers/tpm/Kconfig
View file

@ -88,4 +88,19 @@ config TPM_FLUSH_RESOURCES
help
Enable support to flush specific resources (e.g. keys) from the TPM.
The functionality is available via the 'tpm' command as well.
config TPM_LOAD_KEY_BY_SHA1
bool "Enable TPM key loading by SHA1 support"
depends on TPM
help
Enable support to load keys into the TPM by identifying
their parent via the public key's SHA1 hash.
The functionality is available via the 'tpm' command as well.
config TPM_LIST_RESOURCES
bool "Enable TPM resource listing support"
depends on TPM
help
Enable support to list specific resources (e.g. keys) within the TPM.
The functionality is available via the 'tpm' command as well.
endmenu

13
dts/Makefile
View file

@ -12,10 +12,14 @@ ifeq ($(DEVICE_TREE),)
DEVICE_TREE := unset
endif
ARCH_PATH := arch/$(ARCH)/dts
dtb_depends := arch-dtbs
ifneq ($(EXT_DTB),)
DTB := $(EXT_DTB)
else
DTB := arch/$(ARCH)/dts/$(DEVICE_TREE).dtb
DTB := $(ARCH_PATH)/$(DEVICE_TREE).dtb
dtb_depends += $(DTB:.dtb=.dts)
endif
$(obj)/dt.dtb: $(DTB) FORCE
@ -23,7 +27,10 @@ $(obj)/dt.dtb: $(DTB) FORCE
targets += dt.dtb
$(DTB): arch-dtbs
$(DTB): $(dtb_depends)
ifeq ($(EXT_DTB),)
$(Q)$(MAKE) $(build)=$(ARCH_PATH) $@
endif
$(Q)test -e $@ || ( \
echo >&2; \
echo >&2 "Device Tree Source is not correctly specified."; \
@ -33,7 +40,7 @@ $(DTB): arch-dtbs
/bin/false)
arch-dtbs:
$(Q)$(MAKE) $(build)=arch/$(ARCH)/dts dtbs
$(Q)$(MAKE) $(build)=$(ARCH_PATH) dtbs
.SECONDARY: $(obj)/dt.dtb.S

12
include/tpm.h
View file

@ -639,4 +639,16 @@ uint32_t tpm_get_permissions(uint32_t index, uint32_t *perm);
*/
uint32_t tpm_flush_specific(uint32_t key_handle, uint32_t resource_type);
#ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1
/**
* Search for a key by usage AuthData and the hash of the parent's pub key.
*
* @param auth Usage auth of the key to search for
* @param pubkey_digest SHA1 hash of the pub key structure of the key
* @param[out] handle The handle of the key (Non-null iff found)
* @return 0 if key was found in TPM; != 0 if not.
*/
uint32_t tpm_find_key_sha1(const uint8_t auth[20], const uint8_t
pubkey_digest[20], uint32_t *handle);
#endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */
#endif /* __TPM_H */

2
lib/fdtdec.c
View file

@ -112,7 +112,7 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
return FDT_ADDR_T_NONE;
}
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_OF_LIBFDT)
#if CONFIG_IS_ENABLED(OF_TRANSLATE)
if (translate)
addr = fdt_translate_address(blob, node, prop_addr);
else

40
lib/tpm.c
View file

@ -996,4 +996,44 @@ uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth,
return 0;
}
#ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1
uint32_t tpm_find_key_sha1(const uint8_t auth[20], const uint8_t
pubkey_digest[20], uint32_t *handle)
{
uint16_t key_count;
uint32_t key_handles[10];
uint8_t buf[288];
uint8_t *ptr;
uint32_t err;
uint8_t digest[20];
size_t buf_len;
unsigned int i;
/* fetch list of already loaded keys in the TPM */
err = tpm_get_capability(TPM_CAP_HANDLE, TPM_RT_KEY, buf, sizeof(buf));
if (err)
return -1;
key_count = get_unaligned_be16(buf);
ptr = buf + 2;
for (i = 0; i < key_count; ++i, ptr += 4)
key_handles[i] = get_unaligned_be32(ptr);
/* now search a(/ the) key which we can access with the given auth */
for (i = 0; i < key_count; ++i) {
buf_len = sizeof(buf);
err = tpm_get_pub_key_oiap(key_handles[i], auth, buf, &buf_len);
if (err && err != TPM_AUTHFAIL)
return -1;
if (err)
continue;
sha1_csum(buf, buf_len, digest);
if (!memcmp(digest, pubkey_digest, 20)) {
*handle = key_handles[i];
return 0;
}
}
return 1;
}
#endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */
#endif /* CONFIG_TPM_AUTH_SESSIONS */