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armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046A

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This patch is to adjust the memory mapping for FLash/SD card on
LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot
start address on serial flash and environment address.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Alison Wang 2017-05-16 10:45:59 +08:00 • committed by York Sun
parent a9a5cef391
commit 8104deb2d6
4 changed files with 20 additions and 20 deletions
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16
board/freescale/ls1046ardb/README
View file

@ -59,14 +59,14 @@ Start Address End Address Description Size
QSPI flash map: QSPI flash map:
Start Address End Address Description Size Start Address End Address Description Size
0x00_4000_0000 - 0x00_400F_FFFF RCW + PBI 1MB 0x00_4000_0000 - 0x00_400F_FFFF RCW + PBI 1MB
0x00_4010_0000 - 0x00_401F_FFFF U-Boot 1MB 0x00_4010_0000 - 0x00_402F_FFFF U-Boot 2MB
0x00_4020_0000 - 0x00_402F_FFFF U-Boot Env 1MB 0x00_4030_0000 - 0x00_403F_FFFF U-Boot Env 1MB
0x00_4030_0000 - 0x00_403F_FFFF FMan ucode 1MB 0x00_4040_0000 - 0x00_405F_FFFF PPA 2MB
0x00_4040_0000 - 0x00_404F_FFFF UEFI 1MB 0x00_4060_0000 - 0x00_408F_FFFF Secure boot header
0x00_4050_0000 - 0x00_406F_FFFF PPA 2MB + bootscript 3MB
0x00_4070_0000 - 0x00_408F_FFFF Secure boot header 0x00_4090_0000 - 0x00_4093_FFFF FMan ucode 256KB
+ bootscript 2MB 0x00_4094_0000 - 0x00_4097_FFFF QE/uQE firmware 256KB
0x00_4090_0000 - 0x00_40FF_FFFF Reserved 7MB 0x00_4098_0000 - 0x00_40FF_FFFF Reserved 6MB
0x00_4100_0000 - 0x00_43FF_FFFF FIT Image 48MB 0x00_4100_0000 - 0x00_43FF_FFFF FIT Image 48MB
Booting Options Booting Options

10
include/configs/ls1046a_common.h
View file

@ -176,23 +176,23 @@
/* /*
* PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
* about 1MB (2048 blocks), Env is stored after the image, and the env size is * about 1MB (2048 blocks), Env is stored after the image, and the env size is
* 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080(0x820). * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
*/ */
#define CONFIG_SYS_QE_FMAN_FW_IN_MMC #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
#elif defined(CONFIG_QSPI_BOOT) #elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_SYS_QE_FW_IN_SPIFLASH #define CONFIG_SYS_QE_FW_IN_SPIFLASH
#define CONFIG_SYS_FMAN_FW_ADDR 0x40300000 #define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
#define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0 #define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SPI_MAX_HZ 1000000 #define CONFIG_ENV_SPI_MAX_HZ 1000000
#define CONFIG_ENV_SPI_MODE 0x03 #define CONFIG_ENV_SPI_MODE 0x03
#elif defined(CONFIG_NAND_BOOT) #elif defined(CONFIG_NAND_BOOT)
#define CONFIG_SYS_QE_FMAN_FW_IN_NAND #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
#define CONFIG_SYS_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
#else #else
#define CONFIG_SYS_QE_FMAN_FW_IN_NOR #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
#define CONFIG_SYS_FMAN_FW_ADDR 0x60300000 #define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
#endif #endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)

10
include/configs/ls1046aqds.h
View file

@ -12,7 +12,7 @@
#if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT) #if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
#define CONFIG_SYS_TEXT_BASE 0x82000000 #define CONFIG_SYS_TEXT_BASE 0x82000000
#elif defined(CONFIG_QSPI_BOOT) #elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_SYS_TEXT_BASE 0x40010000 #define CONFIG_SYS_TEXT_BASE 0x40100000
#else #else
#define CONFIG_SYS_TEXT_BASE 0x60100000 #define CONFIG_SYS_TEXT_BASE 0x60100000
#endif #endif
@ -447,20 +447,20 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_NAND_BOOT #ifdef CONFIG_NAND_BOOT
#define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SD_BOOT) #elif defined(CONFIG_SD_BOOT)
#define CONFIG_ENV_OFFSET (1024 * 1024) #define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SIZE 0x2000
#elif defined(CONFIG_QSPI_BOOT) #elif defined(CONFIG_QSPI_BOOT)
#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x10000 #define CONFIG_ENV_SECT_SIZE 0x10000
#else #else
#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000)
#define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x20000
#endif #endif

4
include/configs/ls1046ardb.h
View file

@ -169,12 +169,12 @@
#if defined(CONFIG_SD_BOOT) #if defined(CONFIG_SD_BOOT)
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_OFFSET (1024 * 1024) #define CONFIG_ENV_OFFSET (3 * 1024 * 1024)
#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SIZE 0x2000
#else #else
#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x200000 /* 2MB */ #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
#endif #endif