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x86: Correct spi node alias

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With recent changes spi node was moved to a place as a subnode under
pch, so update the alias to refer to its correct place as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2016-01-27 00:56:34 -08:00
parent a5dd1e6726
commit 81aaa3d9fc
7 changed files with 14 additions and 14 deletions
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4
arch/x86/dts/bayleybay.dts
View file

@ -21,7 +21,7 @@
aliases { aliases {
serial0 = &serial; serial0 = &serial;
spi0 = "/spi"; spi0 = &spi;
}; };
config { config {
@ -184,7 +184,7 @@
>; >;
}; };
spi { spi: spi {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "intel,ich-spi"; compatible = "intel,ich-spi";

4
arch/x86/dts/broadwell_som-6896.dts
View file

@ -10,7 +10,7 @@
compatible = "advantech,som-6896", "intel,broadwell"; compatible = "advantech,som-6896", "intel,broadwell";
aliases { aliases {
spi0 = "/spi"; spi0 = &spi;
}; };
config { config {
@ -34,7 +34,7 @@
reg = <0x0000f800 0 0 0 0>; reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9"; compatible = "intel,pch9";
spi { spi: spi {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "intel,ich-spi"; compatible = "intel,ich-spi";

4
arch/x86/dts/chromebook_link.dts
View file

@ -11,7 +11,7 @@
compatible = "google,link", "intel,celeron-ivybridge"; compatible = "google,link", "intel,celeron-ivybridge";
aliases { aliases {
spi0 = "/pci/pch/spi"; spi0 = &spi;
usb0 = &usb_0; usb0 = &usb_0;
usb1 = &usb_1; usb1 = &usb_1;
}; };
@ -252,7 +252,7 @@
/* Enable EC SMI source */ /* Enable EC SMI source */
intel,alt-gp-smi-enable = <0x0100>; intel,alt-gp-smi-enable = <0x0100>;
spi { spi: spi {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "intel,ich-spi"; compatible = "intel,ich-spi";

4
arch/x86/dts/chromebox_panther.dts
View file

@ -10,7 +10,7 @@
compatible = "google,panther", "intel,haswell"; compatible = "google,panther", "intel,haswell";
aliases { aliases {
spi0 = "/spi"; spi0 = &spi;
}; };
config { config {
@ -56,7 +56,7 @@
reg = <0x0000f800 0 0 0 0>; reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9"; compatible = "intel,pch9";
spi { spi: spi {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "intel,ich-spi"; compatible = "intel,ich-spi";

4
arch/x86/dts/crownbay.dts
View file

@ -19,7 +19,7 @@
compatible = "intel,crownbay", "intel,queensbay"; compatible = "intel,crownbay", "intel,queensbay";
aliases { aliases {
spi0 = "/spi"; spi0 = &spi;
}; };
config { config {
@ -227,7 +227,7 @@
>; >;
}; };
spi { spi: spi {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "intel,ich-spi"; compatible = "intel,ich-spi";

4
arch/x86/dts/galileo.dts
View file

@ -18,7 +18,7 @@
compatible = "intel,galileo", "intel,quark"; compatible = "intel,galileo", "intel,quark";
aliases { aliases {
spi0 = "/spi"; spi0 = &spi;
}; };
config { config {
@ -115,7 +115,7 @@
>; >;
}; };
spi { spi: spi {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "intel,ich-spi"; compatible = "intel,ich-spi";

4
arch/x86/dts/minnowmax.dts
View file

@ -20,7 +20,7 @@
aliases { aliases {
serial0 = &serial; serial0 = &serial;
spi0 = "/spi"; spi0 = &spi;
}; };
config { config {
@ -218,7 +218,7 @@
>; >;
}; };
spi { spi: spi {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "intel,ich-spi"; compatible = "intel,ich-spi";