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board/prodrive/alpr/fpga.c: Coding style cleanup

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Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Wolfgang Denk 2011-09-05 12:52:21 +02:00
parent c2484f40d6
commit 8298fd2a9f
1 changed files with 39 additions and 37 deletions
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38
board/prodrive/alpr/fpga.c
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@ -46,17 +46,17 @@ DECLARE_GLOBAL_DATA_PTR;
static unsigned long regval; static unsigned long regval;
#define SET_GPIO_REG_0(reg, bit) { \ #define SET_GPIO_REG_0(reg, bit) do { \
regval = in32(reg); \ regval = in32(reg); \
regval &= ~(0x80000000 >> bit); \ regval &= ~(0x80000000 >> bit); \
out32(reg, regval); \ out32(reg, regval); \
} } while (0)
#define SET_GPIO_REG_1(reg, bit) { \ #define SET_GPIO_REG_1(reg, bit) do { \
regval = in32(reg); \ regval = in32(reg); \
regval |= (0x80000000 >> bit); \ regval |= (0x80000000 >> bit); \
out32(reg, regval); \ out32(reg, regval); \
} } while (0)
#define SET_GPIO_0(bit) SET_GPIO_REG_0(GPIO0_OR, bit) #define SET_GPIO_0(bit) SET_GPIO_REG_0(GPIO0_OR, bit)
#define SET_GPIO_1(bit) SET_GPIO_REG_1(GPIO0_OR, bit) #define SET_GPIO_1(bit) SET_GPIO_REG_1(GPIO0_OR, bit)
@ -69,13 +69,15 @@ static unsigned long regval;
#define SET_FPGA(data) out32(GPIO0_OR, data) #define SET_FPGA(data) out32(GPIO0_OR, data)
#define FPGA_WRITE_1 { \ #define FPGA_WRITE_1 do { \
SET_FPGA(OLD_VAL | 0 | FPGA_DATA); /* set data to 1 */ \ SET_FPGA(OLD_VAL | 0 | FPGA_DATA); /* set data to 1 */ \
SET_FPGA(OLD_VAL | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ SET_FPGA(OLD_VAL | FPGA_CLK | FPGA_DATA); /* set data to 1 */ \
} while (0)
#define FPGA_WRITE_0 { \ #define FPGA_WRITE_0 do { \
SET_FPGA(OLD_VAL | 0 | 0); /* set data to 0 */ \ SET_FPGA(OLD_VAL | 0 | 0); /* set data to 0 */ \
SET_FPGA(OLD_VAL | FPGA_CLK | 0 );} /* set data to 1 */ SET_FPGA(OLD_VAL | FPGA_CLK | 0); /* set data to 1 */ \
} while (0)
/* Plattforminitializations */ /* Plattforminitializations */
/* Here we have to set the FPGA Chain */ /* Here we have to set the FPGA Chain */
@ -130,11 +132,11 @@ int fpga_pre_fn (int cookie)
/* Set the state of CONFIG Pin */ /* Set the state of CONFIG Pin */
int fpga_config_fn(int assert_config, int flush, int cookie) int fpga_config_fn(int assert_config, int flush, int cookie)
{ {
if (assert_config) { if (assert_config)
SET_GPIO_1(CONFIG_SYS_GPIO_CONFIG); SET_GPIO_1(CONFIG_SYS_GPIO_CONFIG);
} else { else
SET_GPIO_0(CONFIG_SYS_GPIO_CONFIG); SET_GPIO_0(CONFIG_SYS_GPIO_CONFIG);
}
return FPGA_SUCCESS; return FPGA_SUCCESS;
} }
@ -144,7 +146,7 @@ int fpga_status_fn (int cookie)
unsigned long reg; unsigned long reg;
reg = in32(GPIO0_IR); reg = in32(GPIO0_IR);
if (reg &= (0x80000000 >> CONFIG_SYS_GPIO_STATUS)) { if (reg & (0x80000000 >> CONFIG_SYS_GPIO_STATUS)) {
PRINTF("STATUS = HIGH\n"); PRINTF("STATUS = HIGH\n");
return FPGA_FAIL; return FPGA_FAIL;
} }
@ -157,7 +159,7 @@ int fpga_done_fn (int cookie)
{ {
unsigned long reg; unsigned long reg;
reg = in32(GPIO0_IR); reg = in32(GPIO0_IR);
if (reg &= (0x80000000 >> CONFIG_SYS_GPIO_CON_DON)) { if (reg & (0x80000000 >> CONFIG_SYS_GPIO_CON_DON)) {
PRINTF("CONF_DON = HIGH\n"); PRINTF("CONF_DON = HIGH\n");
return FPGA_FAIL; return FPGA_FAIL;
} }
@ -180,11 +182,11 @@ int fpga_write_fn (const void *buf, size_t len, int flush, int cookie)
val = data[bytecount++]; val = data[bytecount++];
i = 8; i = 8;
do { do {
if (val & 0x01) { if (val & 0x01)
FPGA_WRITE_1; FPGA_WRITE_1;
} else { else
FPGA_WRITE_0; FPGA_WRITE_0;
}
val >>= 1; val >>= 1;
i--; i--;
} while (i > 0); } while (i > 0);
@ -244,11 +246,11 @@ int alpr_fpga_init (void)
{ {
int i; int i;
PRINTF ("%s:%d: Initialize FPGA interface\n", __FUNCTION__, __LINE__); PRINTF("%s:%d: Initialize FPGA interface\n", __func__, __LINE__);
fpga_init(); fpga_init();
for (i = 0; i < CONFIG_FPGA_COUNT; i++) { for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i); PRINTF("%s:%d: Adding fpga %d\n", __func__, __LINE__, i);
fpga_add(fpga_altera, &fpga[i]); fpga_add(fpga_altera, &fpga[i]);
} }
return 1; return 1;