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ARM: dts: rmobile: Extract SDHI nodes on M3N

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The SDHI nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot
specific DT extras until they hit mainline Linux, to make syncing of
DTs easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
This commit is contained in:
Marek Vasut 2018-12-03 20:39:07 +01:00 • committed by Marek Vasut
parent f529bc551b
commit 830b94f768
2 changed files with 48 additions and 28 deletions
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44
arch/arm/dts/r8a77965-u-boot.dtsi
View file

@ -20,6 +20,50 @@
status = "disabled"; status = "disabled";
}; };
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 314>;
status = "disabled";
};
sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 313>;
status = "disabled";
};
sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 312>;
status = "disabled";
};
sdhi3: sd@ee160000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 311>;
status = "disabled";
};
ehci0: usb@ee080100 { ehci0: usb@ee080100 {
compatible = "generic-ehci"; compatible = "generic-ehci";
reg = <0 0xee080100 0 0x100>; reg = <0 0xee080100 0 0x100>;

32
arch/arm/dts/r8a77965.dtsi
View file

@ -835,47 +835,23 @@
}; };
sdhi0: sd@ee100000 { sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee100000 0 0x2000>; reg = <0 0xee100000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; /* placeholder */
clocks = <&cpg CPG_MOD 314>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 314>;
status = "disabled";
}; };
sdhi1: sd@ee120000 { sdhi1: sd@ee120000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee120000 0 0x2000>; reg = <0 0xee120000 0 0x2000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; /* placeholder */
clocks = <&cpg CPG_MOD 313>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 313>;
status = "disabled";
}; };
sdhi2: sd@ee140000 { sdhi2: sd@ee140000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee140000 0 0x2000>; reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; /* placeholder */
clocks = <&cpg CPG_MOD 312>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 312>;
status = "disabled";
}; };
sdhi3: sd@ee160000 { sdhi3: sd@ee160000 {
compatible = "renesas,sdhi-r8a77965";
reg = <0 0xee160000 0 0x2000>; reg = <0 0xee160000 0 0x2000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; /* placeholder */
clocks = <&cpg CPG_MOD 311>;
max-frequency = <200000000>;
power-domains = <&sysc 32>;
resets = <&cpg 311>;
status = "disabled";
}; };
usb3_phy0: usb-phy@e65ee000 { usb3_phy0: usb-phy@e65ee000 {