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imx: mx7: implement functions to boot auxiliary core
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up. arch_auxiliary_core_check_up is used to check whether M4 is running or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will use the pc and stack which is set in arch_auxiliary_core_up to set R15 and R13 register and boot. Signed-off-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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2 changed files with 41 additions and 0 deletions
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@ -211,6 +211,42 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
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}
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#endif
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#ifdef CONFIG_IMX_BOOTAUX
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int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
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{
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u32 stack, pc;
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struct src *src_reg = (struct src *)SRC_BASE_ADDR;
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if (!boot_private_data)
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return 1;
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stack = *(u32 *)boot_private_data;
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pc = *(u32 *)(boot_private_data + 4);
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/* Set the stack and pc to M4 bootROM */
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writel(stack, M4_BOOTROM_BASE_ADDR);
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writel(pc, M4_BOOTROM_BASE_ADDR + 4);
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/* Enable M4 */
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clrsetbits_le32(&src_reg->m4rcr, SRC_M4RCR_M4C_NON_SCLR_RST_MASK,
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SRC_M4RCR_ENABLE_M4_MASK);
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return 0;
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}
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int arch_auxiliary_core_check_up(u32 core_id)
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{
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uint32_t val;
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struct src *src_reg = (struct src *)SRC_BASE_ADDR;
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val = readl(&src_reg->m4rcr);
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if (val & 0x00000001)
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return 0; /* assert in reset */
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return 1;
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}
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#endif
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void set_wdog_reset(struct wdog_regs *wdog)
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{
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u32 reg = readw(&wdog->wcr);
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@ -263,6 +263,11 @@ struct src {
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u32 ddrc_rcr;
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};
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#define SRC_M4RCR_M4C_NON_SCLR_RST_OFFSET 0
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#define SRC_M4RCR_M4C_NON_SCLR_RST_MASK (1 << 0)
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#define SRC_M4RCR_ENABLE_M4_OFFSET 3
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#define SRC_M4RCR_ENABLE_M4_MASK (1 << 3)
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/* GPR0 Bit Fields */
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#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_MASK 0x1u
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#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_SHIFT 0
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