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riscv: Merge unnecessary SMP ifdefs in start.S

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Two consecutive SMP ifdefs blocks can be combined into one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Bin Meng 2020-04-16 08:09:29 -07:00 • committed by Andes
parent ed1475e2f4
commit 84dc9d2690
1 changed files with 0 additions and 4 deletions
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4
arch/riscv/cpu/start.S
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@ -58,9 +58,7 @@ _start:
/* tp: hart id */ /* tp: hart id */
li t0, CONFIG_NR_CPUS li t0, CONFIG_NR_CPUS
bge tp, t0, hart_out_of_bounds_loop bge tp, t0, hart_out_of_bounds_loop
#endif
#ifdef CONFIG_SMP
/* set xSIE bit to receive IPIs */ /* set xSIE bit to receive IPIs */
#if CONFIG_IS_ENABLED(RISCV_MMODE) #if CONFIG_IS_ENABLED(RISCV_MMODE)
li t0, MIE_MSIE li t0, MIE_MSIE
@ -377,9 +375,7 @@ hart_out_of_bounds_loop:
/* Harts in this loop are out of bounds, increase CONFIG_NR_CPUS. */ /* Harts in this loop are out of bounds, increase CONFIG_NR_CPUS. */
wfi wfi
j hart_out_of_bounds_loop j hart_out_of_bounds_loop
#endif
#ifdef CONFIG_SMP
/* SMP relocation entry */ /* SMP relocation entry */
secondary_hart_relocate: secondary_hart_relocate:
/* a1: new sp */ /* a1: new sp */