mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND

Add more clarity by changing the Kconfig entry name.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Re-run migration, update a few more cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
This commit is contained in:
Miquel Raynal 2019-10-03 19:50:03 +02:00 committed by Tom Rini
parent 94d022bb40
commit 88718be300
324 changed files with 419 additions and 390 deletions

View file

@ -974,7 +974,7 @@ config ARCH_SUNXI
select SPL_USE_TINY_PRINTF select SPL_USE_TINY_PRINTF
imply CMD_DM imply CMD_DM
imply CMD_GPT imply CMD_GPT
imply CMD_UBI if NAND imply CMD_UBI if MTD_RAW_NAND
imply DISTRO_DEFAULTS imply DISTRO_DEFAULTS
imply FAT_WRITE imply FAT_WRITE
imply FIT imply FIT
@ -1004,7 +1004,7 @@ config ARCH_VF610
select CPU_V7A select CPU_V7A
select SYS_FSL_ERRATUM_ESDHC111 select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS imply CMD_MTDPARTS
imply NAND imply MTD_RAW_NAND
config ARCH_ZYNQ config ARCH_ZYNQ
bool "Xilinx Zynq based platform" bool "Xilinx Zynq based platform"

View file

@ -80,7 +80,7 @@ config CMD_HDMIDETECT
config CMD_NANDBCB config CMD_NANDBCB
bool "i.MX6 NAND Boot Control Block(BCB) command" bool "i.MX6 NAND Boot Control Block(BCB) command"
depends on NAND && CMD_MTDPARTS depends on MTD_RAW_NAND && CMD_MTDPARTS
select BCH if MX6UL || MX6ULL select BCH if MX6UL || MX6ULL
default y if (ARCH_MX6 && NAND_MXS) || (ARCH_MX7 && NAND_MXS) default y if (ARCH_MX6 && NAND_MXS) || (ARCH_MX7 && NAND_MXS)
help help

View file

@ -25,7 +25,7 @@ const struct gpmc *gpmc_cfg = (struct gpmc *)GPMC_BASE;
#if defined(CONFIG_NOR) #if defined(CONFIG_NOR)
char gpmc_cs0_flash = MTD_DEV_TYPE_NOR; char gpmc_cs0_flash = MTD_DEV_TYPE_NOR;
#elif defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND) #elif defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
char gpmc_cs0_flash = MTD_DEV_TYPE_NAND; char gpmc_cs0_flash = MTD_DEV_TYPE_NAND;
#elif defined(CONFIG_CMD_ONENAND) #elif defined(CONFIG_CMD_ONENAND)
char gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND; char gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND;
@ -93,7 +93,7 @@ void set_gpmc_cs0(int flash_type)
STNOR_GPMC_CONFIG7 STNOR_GPMC_CONFIG7
}; };
#endif #endif
#if defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND) #if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
const u32 gpmc_regs_nand[GPMC_MAX_REG] = { const u32 gpmc_regs_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG1, M_NAND_GPMC_CONFIG1,
M_NAND_GPMC_CONFIG2, M_NAND_GPMC_CONFIG2,
@ -128,7 +128,7 @@ void set_gpmc_cs0(int flash_type)
GPMC_SIZE_16M))); GPMC_SIZE_16M)));
break; break;
#endif #endif
#if defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND) #if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
case MTD_DEV_TYPE_NAND: case MTD_DEV_TYPE_NAND:
gpmc_regs = gpmc_regs_nand; gpmc_regs = gpmc_regs_nand;
base = CONFIG_SYS_NAND_BASE; base = CONFIG_SYS_NAND_BASE;

View file

@ -150,7 +150,7 @@ int board_init(void)
hw_watchdog_init(); hw_watchdog_init();
#endif #endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
gpmc_init(); gpmc_init();
#endif #endif
return 0; return 0;

View file

@ -118,7 +118,7 @@ static struct module_pin_mux mii2_pin_mux[] = {
{OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */ {OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */
{-1}, {-1},
}; };
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = { static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@ -180,7 +180,7 @@ static struct module_pin_mux gpIOs[] = {
{OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) }, {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) },
/* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */ /* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) }, {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) },
#ifndef CONFIG_NAND #ifndef CONFIG_MTD_RAW_NAND
/* GPIO2_3 - NAND_OE */ /* GPIO2_3 - NAND_OE */
{OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)}, {OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
/* GPIO2_4 - NAND_WEN */ /* GPIO2_4 - NAND_WEN */
@ -241,7 +241,7 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(i2c0_pin_mux); configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mii2_pin_mux); configure_module_pin_mux(mii2_pin_mux);
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_MMC) #elif defined(CONFIG_MMC)
configure_module_pin_mux(mmc1_pin_mux); configure_module_pin_mux(mmc1_pin_mux);

View file

@ -292,7 +292,7 @@ int board_init(void)
#endif #endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND) #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init(); gpmc_init();
#endif #endif
return 0; return 0;

View file

@ -180,7 +180,7 @@ int board_init(void)
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
gpmc_init(); gpmc_init();
#endif #endif
return 0; return 0;

View file

@ -39,7 +39,7 @@ static struct module_pin_mux guardian_interfaces_pin_mux[] = {
{-1}, {-1},
}; };
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = { static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)},
@ -82,7 +82,7 @@ void enable_i2c0_pin_mux(void)
void enable_board_pin_mux(void) void enable_board_pin_mux(void)
{ {
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#endif #endif
configure_module_pin_mux(guardian_interfaces_pin_mux); configure_module_pin_mux(guardian_interfaces_pin_mux);

View file

@ -444,7 +444,7 @@ int board_init(void)
puts("EEPROM Content Invalid.\n"); puts("EEPROM Content Invalid.\n");
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND) #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init(); gpmc_init();
#endif #endif
shc_request_gpio(); shc_request_gpio();

View file

@ -221,7 +221,7 @@ int board_init(void)
else else
config_board_mux(MUX_TYPE_SDHC); config_board_mux(MUX_TYPE_SDHC);
#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI) #if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_FSL_QSPI)
val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4); val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3)) if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))

View file

@ -76,7 +76,7 @@ int checkboard(void)
printf("NOR vBank%d\n", reg); printf("NOR vBank%d\n", reg);
} }
#elif defined(CONFIG_TARGET_T1023RDB) #elif defined(CONFIG_TARGET_T1023RDB)
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
puts("NAND\n"); puts("NAND\n");
#else #else
printf("NOR vBank%d\n", t1023rdb_ctrl(I2C_GET_BANK)); printf("NOR vBank%d\n", t1023rdb_ctrl(I2C_GET_BANK));

View file

@ -42,7 +42,7 @@ static void ci20_mux_eth(void)
{ {
void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
/* setup pins (some already setup for NAND) */ /* setup pins (some already setup for NAND) */
writel(0x04030000, gpio_regs + GPIO_PXINTC(0)); writel(0x04030000, gpio_regs + GPIO_PXINTC(0));
writel(0x04030000, gpio_regs + GPIO_PXMASKC(0)); writel(0x04030000, gpio_regs + GPIO_PXMASKC(0));

View file

@ -82,7 +82,7 @@ static struct module_pin_mux cbmux_pin_mux[] = {
{-1}, {-1},
}; };
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = { static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@ -118,7 +118,7 @@ void enable_board_pin_mux()
configure_module_pin_mux(rmii1_pin_mux); configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux); configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(cbmux_pin_mux); configure_module_pin_mux(cbmux_pin_mux);
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#endif #endif
#ifdef CONFIG_SPI #ifdef CONFIG_SPI

View file

@ -72,7 +72,7 @@ static struct module_pin_mux cbmux_pin_mux[] = {
{-1}, {-1},
}; };
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = { static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@ -108,7 +108,7 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(rmii1_pin_mux); configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux); configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(cbmux_pin_mux); configure_module_pin_mux(cbmux_pin_mux);
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#endif #endif
#ifdef CONFIG_SPI #ifdef CONFIG_SPI

View file

@ -26,7 +26,7 @@ static struct module_pin_mux uart0_pin_mux[] = {
{-1}, {-1},
}; };
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = { static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@ -169,7 +169,7 @@ void enable_board_pin_mux(void)
{ {
configure_module_pin_mux(uart0_pin_mux); configure_module_pin_mux(uart0_pin_mux);
configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(i2c1_pin_mux);
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#endif #endif
#ifndef CONFIG_NO_ETH #ifndef CONFIG_NO_ETH

View file

@ -21,7 +21,7 @@ In order to accomodate that, we create a tool that will generate an
SPL image that is ready to be programmed directly embedding the ECCs, SPL image that is ready to be programmed directly embedding the ECCs,
randomized, and with the necessary bits needed to reduce the number of randomized, and with the necessary bits needed to reduce the number of
bitflips. The U-Boot build system, when configured for the NAND (with bitflips. The U-Boot build system, when configured for the NAND (with
CONFIG_NAND=y) will also generate the image sunxi-spl-with-ecc.bin CONFIG_MTD_RAW_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
that will have been generated by that tool. that will have been generated by that tool.
In order to flash your U-Boot image onto a board, assuming that the In order to flash your U-Boot image onto a board, assuming that the

View file

@ -710,7 +710,7 @@ int board_init(void)
#endif #endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND) #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init(); gpmc_init();
#endif #endif

View file

@ -195,7 +195,7 @@ static struct module_pin_mux rmii1_pin_mux[] = {
{-1}, {-1},
}; };
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = { static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */ {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */ {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
@ -360,7 +360,7 @@ void enable_board_pin_mux(void)
/* Beaglebone pinmux */ /* Beaglebone pinmux */
configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux); configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND) #if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_NOR) #elif defined(CONFIG_NOR)
configure_module_pin_mux(bone_norcape_pin_mux); configure_module_pin_mux(bone_norcape_pin_mux);
@ -376,7 +376,7 @@ void enable_board_pin_mux(void)
if (profile & ~PROFILE_2) if (profile & ~PROFILE_2)
configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(i2c1_pin_mux);
/* Profiles 2 & 3 don't have NAND */ /* Profiles 2 & 3 don't have NAND */
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
if (profile & ~(PROFILE_2 | PROFILE_3)) if (profile & ~(PROFILE_2 | PROFILE_3))
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#endif #endif
@ -404,7 +404,7 @@ void enable_board_pin_mux(void)
} }
/* Beaglebone LT pinmux */ /* Beaglebone LT pinmux */
configure_module_pin_mux(mmc0_pin_mux); configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND) && defined(CONFIG_EMMC_BOOT) #if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT) #elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(bone_norcape_pin_mux); configure_module_pin_mux(bone_norcape_pin_mux);

View file

@ -73,7 +73,7 @@ static struct module_pin_mux gpio5_7_pin_mux[] = {
{-1}, {-1},
}; };
#ifdef CONFIG_NAND #ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = { static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */ {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */ {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
@ -128,18 +128,18 @@ void enable_board_pin_mux(void)
if (board_is_evm()) { if (board_is_evm()) {
configure_module_pin_mux(gpio5_7_pin_mux); configure_module_pin_mux(gpio5_7_pin_mux);
configure_module_pin_mux(rgmii1_pin_mux); configure_module_pin_mux(rgmii1_pin_mux);
#if defined(CONFIG_NAND) #if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#endif #endif
} else if (board_is_sk() || board_is_idk()) { } else if (board_is_sk() || board_is_idk()) {
configure_module_pin_mux(rgmii1_pin_mux); configure_module_pin_mux(rgmii1_pin_mux);
#if defined(CONFIG_NAND) #if defined(CONFIG_MTD_RAW_NAND)
printf("Error: NAND flash not present on this board\n"); printf("Error: NAND flash not present on this board\n");
#endif #endif
configure_module_pin_mux(qspi_pin_mux); configure_module_pin_mux(qspi_pin_mux);
} else if (board_is_eposevm()) { } else if (board_is_eposevm()) {
configure_module_pin_mux(rmii1_pin_mux); configure_module_pin_mux(rmii1_pin_mux);
#if defined(CONFIG_NAND) #if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#else #else
configure_module_pin_mux(qspi_pin_mux); configure_module_pin_mux(qspi_pin_mux);

View file

@ -784,7 +784,7 @@ void set_muxconf_regs(void)
early_padconf, ARRAY_SIZE(early_padconf)); early_padconf, ARRAY_SIZE(early_padconf));
} }
#if defined(CONFIG_NAND) #if defined(CONFIG_MTD_RAW_NAND)
static int nand_sw_detect(void) static int nand_sw_detect(void)
{ {
int rc; int rc;

View file

@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void) int board_init(void)
{ {
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NAND) #if defined(CONFIG_MTD_RAW_NAND)
gpmc_init(); gpmc_init();
#endif #endif
return 0; return 0;

View file

@ -265,7 +265,7 @@ int board_init(void)
#endif #endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND) #if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
gpmc_init(); gpmc_init();
#endif #endif
return 0; return 0;

View file

@ -112,7 +112,7 @@ void enable_board_pin_mux()
configure_module_pin_mux(rmii1_pin_mux); configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux); configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND) #if defined(CONFIG_MTD_RAW_NAND)
configure_module_pin_mux(nand_pin_mux); configure_module_pin_mux(nand_pin_mux);
#endif #endif
} }

View file

@ -1954,7 +1954,7 @@ config CMD_JFFS2
config CMD_MTDPARTS config CMD_MTDPARTS
bool "MTD partition support" bool "MTD partition support"
select MTD_DEVICE if (CMD_NAND || NAND) select MTD_DEVICE if (CMD_NAND || MTD_RAW_NAND)
help help
MTD partitioning tool support. MTD partitioning tool support.
It is strongly encouraged to avoid using this command It is strongly encouraged to avoid using this command

View file

@ -303,7 +303,7 @@ config NOR_BOOT
config NAND_BOOT config NAND_BOOT
bool "Support for booting from NAND flash" bool "Support for booting from NAND flash"
default n default n
imply NAND imply MTD_RAW_NAND
help help
Enabling this will make a U-Boot binary that is capable of being Enabling this will make a U-Boot binary that is capable of being
booted via NAND flash. This is not a must, some SoCs need this, booted via NAND flash. This is not a must, some SoCs need this,
@ -312,7 +312,7 @@ config NAND_BOOT
config ONENAND_BOOT config ONENAND_BOOT
bool "Support for booting from ONENAND" bool "Support for booting from ONENAND"
default n default n
imply NAND imply MTD_RAW_NAND
help help
Enabling this will make a U-Boot binary that is capable of being Enabling this will make a U-Boot binary that is capable of being
booted via ONENAND. This is not a must, some SoCs need this, booted via ONENAND. This is not a must, some SoCs need this,

View file

@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -37,7 +37,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -36,7 +36,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -44,7 +44,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -44,7 +44,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -44,7 +44,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -17,7 +17,7 @@ CONFIG_ENV_UBI_PART="UBI"
CONFIG_ENV_UBI_VOLUME="uboot-env" CONFIG_ENV_UBI_VOLUME="uboot-env"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000 CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
CONFIG_SYS_NAND_PAGE_SIZE=0x1000 CONFIG_SYS_NAND_PAGE_SIZE=0x1000
CONFIG_SYS_NAND_OOBSIZE=0x100 CONFIG_SYS_NAND_OOBSIZE=0x100

View file

@ -161,7 +161,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_MARVELL=y CONFIG_PHY_MARVELL=y
CONFIG_TSEC_ENET=y CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y

View file

@ -160,7 +160,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_PHY_MARVELL=y CONFIG_PHY_MARVELL=y
CONFIG_TSEC_ENET=y CONFIG_TSEC_ENET=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y

View file

@ -17,7 +17,7 @@ CONFIG_CMD_MTDPARTS=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition" CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
CONFIG_SYS_NAND_PAGE_SIZE=0x800 CONFIG_SYS_NAND_PAGE_SIZE=0x800
CONFIG_SYS_NAND_OOBSIZE=0x40 CONFIG_SYS_NAND_OOBSIZE=0x40

View file

@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -51,7 +51,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -51,7 +51,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -54,7 +54,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -53,7 +53,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -57,7 +57,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -56,7 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -55,7 +55,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -53,7 +53,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -50,7 +50,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -59,7 +59,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -58,7 +58,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -37,7 +37,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -33,7 +33,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -37,7 +37,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -34,7 +34,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -34,7 +34,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -34,7 +34,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -38,7 +38,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -54,7 +54,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -56,7 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -59,7 +59,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -53,7 +53,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -54,7 +54,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -57,7 +57,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -58,7 +58,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -56,7 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -56,7 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -55,7 +55,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -50,7 +50,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SF_DEFAULT_SPEED=10000000

View file

@ -48,7 +48,7 @@ CONFIG_SYS_OMAP24_I2C_SPEED=1000
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_MMC_OMAP_HS_ADMA=y CONFIG_MMC_OMAP_HS_ADMA=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x00080000 CONFIG_SYS_NAND_U_BOOT_OFFS=0x00080000
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y

View file

@ -49,7 +49,7 @@ CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
# CONFIG_MMC_HW_PARTITIONING is not set # CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y

View file

@ -61,7 +61,7 @@ CONFIG_BOOTCOUNT_ENV=y
CONFIG_MISC=y CONFIG_MISC=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x100000 CONFIG_SYS_NAND_U_BOOT_OFFS=0x100000
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x200000 CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x200000

View file

@ -43,7 +43,7 @@ CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
# CONFIG_MMC_HW_PARTITIONING is not set # CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y

View file

@ -45,7 +45,7 @@ CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
# CONFIG_MMC_HW_PARTITIONING is not set # CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y

View file

@ -64,7 +64,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_DRIVER_TI_CPSW=y CONFIG_DRIVER_TI_CPSW=y

View file

@ -26,7 +26,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPL_NAND_SIMPLE=y
CONFIG_CONS_INDEX=3 CONFIG_CONS_INDEX=3

View file

@ -49,7 +49,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_OF_TRANSLATE=y CONFIG_SPL_OF_TRANSLATE=y
CONFIG_DM_PCA953X=y CONFIG_DM_PCA953X=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000

View file

@ -49,7 +49,7 @@ CONFIG_DM_GPIO=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_GIGE=y CONFIG_PHY_GIGE=y

View file

@ -37,7 +37,7 @@ CONFIG_DFU_SF=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_GIGE=y CONFIG_PHY_GIGE=y

View file

@ -49,7 +49,7 @@ CONFIG_DFU_SF=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_GIGE=y CONFIG_PHY_GIGE=y

View file

@ -47,7 +47,7 @@ CONFIG_DFU_SF=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_SF_DEFAULT_SPEED=48000000
CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_GIGE=y CONFIG_PHY_GIGE=y

View file

@ -48,7 +48,7 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_SPARTAN3=y CONFIG_FPGA_SPARTAN3=y
CONFIG_MXC_GPIO=y CONFIG_MXC_GPIO=y
CONFIG_MMC_MXC=y CONFIG_MMC_MXC=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXC=y CONFIG_NAND_MXC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_MII=y CONFIG_MII=y

View file

@ -38,7 +38,7 @@ CONFIG_ENV_OFFSET_REDUND=0x180000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_MXS_GPIO=y CONFIG_MXS_GPIO=y
CONFIG_MMC_MXS=y CONFIG_MMC_MXS=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y CONFIG_NAND_MXS=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_CONS_INDEX=0 CONFIG_CONS_INDEX=0

View file

@ -42,7 +42,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_ENV_OFFSET_REDUND=0xE0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_BUS=3

View file

@ -42,7 +42,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_ENV_OFFSET_REDUND=0xE0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_MODE=0

View file

@ -42,7 +42,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_ENV_OFFSET_REDUND=0xE0000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MXS=y CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_BUS=3

View file

@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -38,7 +38,7 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -38,7 +38,7 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -43,7 +43,7 @@ CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -46,7 +46,7 @@ CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -46,7 +46,7 @@ CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

View file

@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_AT91_GPIO=y CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_NAND=y CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y

Some files were not shown because too many files have changed in this diff Show more