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mx51evk: Fix 2 hours reset issue

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The mx51evk u-boot has an issue that system will get reset
every 2 hours.

MC13892 has an inside charge timer which expires in 120 minutes.
If ICHRG and CHGAUTOB are not set properly, this timer expiration
will get system power recycled.

Since mx51evk has no Li-Ion battery on board, the patch sets
ICHRG in externally powered mode and sets CHGAUTOB bit to avoid
automatic charging, so that system will not get reset by this
timer expiration.

The patch also corrects the bit field definition of register 48
(Charger 0) per latest MC13892 Reference Manual.

Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
This commit is contained in:
Shawn Guo 2010-10-27 23:36:04 +08:00 • committed by Stefano Babic
parent 9a0044183a
commit 888b4f435f
2 changed files with 12 additions and 12 deletions
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8
board/freescale/mx51evk/mx51evk.c
View file

@ -188,10 +188,10 @@ static void power_init(void)
val &= ~PWGT2SPIEN; val &= ~PWGT2SPIEN;
pmic_reg_write(REG_POWER_MISC, val); pmic_reg_write(REG_POWER_MISC, val);
/* Write needed to update Charger 0 */ /* Externally powered */
pmic_reg_write(REG_CHARGE, VCHRG0 | VCHRG1 | VCHRG2 | val = pmic_reg_read(REG_CHARGE);
ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | ICHRGTR0 | val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB;
OVCTRL1 | UCHEN | CHRGLEDEN | CYCLB); pmic_reg_write(REG_CHARGE, val);
/* power up the system first */ /* power up the system first */
pmic_reg_write(REG_POWER_MISC, PWUP); pmic_reg_write(REG_POWER_MISC, PWUP);

16
include/mc13892.h
View file

@ -29,24 +29,24 @@
/* REG_CHARGE */ /* REG_CHARGE */
#define VCHRG0 0 #define VCHRG0 (1 << 0)
#define VCHRG1 (1 << 1) #define VCHRG1 (1 << 1)
#define VCHRG2 (1 << 2) #define VCHRG2 (1 << 2)
#define ICHRG0 (1 << 3) #define ICHRG0 (1 << 3)
#define ICHRG1 (1 << 4) #define ICHRG1 (1 << 4)
#define ICHRG2 (1 << 5) #define ICHRG2 (1 << 5)
#define ICHRG3 (1 << 6) #define ICHRG3 (1 << 6)
#define ICHRGTR0 (1 << 7) #define TREN (1 << 7)
#define ICHRGTR1 (1 << 8) #define ACKLPB (1 << 8)
#define ICHRGTR2 (1 << 9) #define THCHKB (1 << 9)
#define FETOVRD (1 << 10) #define FETOVRD (1 << 10)
#define FETCTRL (1 << 11) #define FETCTRL (1 << 11)
#define RVRSMODE (1 << 13) #define RVRSMODE (1 << 13)
#define OVCTRL0 (1 << 15) #define PLIM0 (1 << 15)
#define OVCTRL1 (1 << 16) #define PLIM1 (1 << 16)
#define UCHEN (1 << 17) #define PLIMDIS (1 << 17)
#define CHRGLEDEN (1 << 18) #define CHRGLEDEN (1 << 18)
#define CHRGRAWPDEN (1 << 19) #define CHGTMRRST (1 << 19)
#define CHGRESTART (1 << 20) #define CHGRESTART (1 << 20)
#define CHGAUTOB (1 << 21) #define CHGAUTOB (1 << 21)
#define CYCLB (1 << 22) #define CYCLB (1 << 22)