ls2085a: esdhc: Add esdhc support for ls2085a

This patch adds esdhc support for ls2085a.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Yangbo Lu 2015-03-20 19:28:31 -07:00 committed by York Sun
parent 32eda7cc94
commit 8b06460e55
8 changed files with 88 additions and 6 deletions

View file

@ -13,6 +13,9 @@
#include <fsl_debug_server.h> #include <fsl_debug_server.h>
#include <fsl-mc/fsl_mc.h> #include <fsl-mc/fsl_mc.h>
#include <asm/arch/fsl_serdes.h> #include <asm/arch/fsl_serdes.h>
#ifdef CONFIG_FSL_ESDHC
#include <fsl_esdhc.h>
#endif
#include "cpu.h" #include "cpu.h"
#include "mp.h" #include "mp.h"
#include "speed.h" #include "speed.h"
@ -412,6 +415,13 @@ int print_cpuinfo(void)
} }
#endif #endif
#ifdef CONFIG_FSL_ESDHC
int cpu_mmc_init(bd_t *bis)
{
return fsl_esdhc_mmc_init(bis);
}
#endif
int cpu_eth_init(bd_t *bis) int cpu_eth_init(bd_t *bis)
{ {
int error = 0; int error = 0;

View file

@ -7,6 +7,9 @@
#include <common.h> #include <common.h>
#include <libfdt.h> #include <libfdt.h>
#include <fdt_support.h> #include <fdt_support.h>
#ifdef CONFIG_FSL_ESDHC
#include <fsl_esdhc.h>
#endif
#include "mp.h" #include "mp.h"
#ifdef CONFIG_MP #ifdef CONFIG_MP
@ -65,4 +68,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_compat_u32(blob, "fsl,ns16550", do_fixup_by_compat_u32(blob, "fsl,ns16550",
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1); "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
#endif #endif
#if defined(CONFIG_FSL_ESDHC)
fdt_fixup_esdhc(blob, bd);
#endif
} }

View file

@ -31,6 +31,7 @@
#define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR (CONFIG_SYS_IMMR + 0x00300000) #define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR (CONFIG_SYS_IMMR + 0x00300000)
#define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR (CONFIG_SYS_IMMR + 0x00310000) #define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR (CONFIG_SYS_IMMR + 0x00310000)
#define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR (CONFIG_SYS_IMMR + 0x00370000) #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR (CONFIG_SYS_IMMR + 0x00370000)
#define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x01140000)
#define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x01240000) #define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x01240000)
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011C0500) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011C0500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011C0600) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011C0600)
@ -110,6 +111,7 @@
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
#define CONFIG_SYS_FSL_ESDHC_LE
/* IFC */ /* IFC */
#define CONFIG_SYS_FSL_IFC_LE #define CONFIG_SYS_FSL_IFC_LE
#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN #define CONFIG_SYS_MEMAC_LITTLE_ENDIAN

View file

@ -105,7 +105,8 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
else if (cmd->resp_type & MMC_RSP_PRESENT) else if (cmd->resp_type & MMC_RSP_PRESENT)
xfertyp |= XFERTYP_RSPTYP_48; xfertyp |= XFERTYP_RSPTYP_48;
#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || defined(CONFIG_LS102XA) #if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || \
defined(CONFIG_LS102XA) || defined(CONFIG_LS2085A)
if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
xfertyp |= XFERTYP_CMDTYP_ABORT; xfertyp |= XFERTYP_CMDTYP_ABORT;
#endif #endif
@ -183,7 +184,9 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
int timeout; int timeout;
struct fsl_esdhc_cfg *cfg = mmc->priv; struct fsl_esdhc_cfg *cfg = mmc->priv;
struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
#ifdef CONFIG_LS2085A
dma_addr_t addr;
#endif
uint wml_value; uint wml_value;
wml_value = data->blocksize/4; wml_value = data->blocksize/4;
@ -194,7 +197,15 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK, wml_value); esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK, wml_value);
#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
#ifdef CONFIG_LS2085A
addr = virt_to_phys((void *)(data->dest));
if (upper_32_bits(addr))
printf("Error found for upper 32 bits\n");
else
esdhc_write32(&regs->dsaddr, lower_32_bits(addr));
#else
esdhc_write32(&regs->dsaddr, (u32)data->dest); esdhc_write32(&regs->dsaddr, (u32)data->dest);
#endif
#endif #endif
} else { } else {
#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
@ -212,7 +223,15 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK, esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK,
wml_value << 16); wml_value << 16);
#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
#ifdef CONFIG_LS2085A
addr = virt_to_phys((void *)(data->src));
if (upper_32_bits(addr))
printf("Error found for upper 32 bits\n");
else
esdhc_write32(&regs->dsaddr, lower_32_bits(addr));
#else
esdhc_write32(&regs->dsaddr, (u32)data->src); esdhc_write32(&regs->dsaddr, (u32)data->src);
#endif
#endif #endif
} }
@ -259,10 +278,23 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
static void check_and_invalidate_dcache_range static void check_and_invalidate_dcache_range
(struct mmc_cmd *cmd, (struct mmc_cmd *cmd,
struct mmc_data *data) { struct mmc_data *data) {
#ifdef CONFIG_LS2085A
unsigned start = 0;
#else
unsigned start = (unsigned)data->dest ; unsigned start = (unsigned)data->dest ;
#endif
unsigned size = roundup(ARCH_DMA_MINALIGN, unsigned size = roundup(ARCH_DMA_MINALIGN,
data->blocks*data->blocksize); data->blocks*data->blocksize);
unsigned end = start+size ; unsigned end = start+size ;
#ifdef CONFIG_LS2085A
dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest));
if (upper_32_bits(addr))
printf("Error found for upper 32 bits\n");
else
start = lower_32_bits(addr);
#endif
invalidate_dcache_range(start, end); invalidate_dcache_range(start, end);
} }
#endif #endif

View file

@ -155,6 +155,9 @@ unsigned long long get_qixis_addr(void);
#define QIXIS_BASE get_qixis_addr() #define QIXIS_BASE get_qixis_addr()
#define QIXIS_BASE_PHYS 0x20000000 #define QIXIS_BASE_PHYS 0x20000000
#define QIXIS_BASE_PHYS_EARLY 0xC000000 #define QIXIS_BASE_PHYS_EARLY 0xC000000
#define QIXIS_STAT_PRES1 0xb
#define QIXIS_SDID_MASK 0x07
#define QIXIS_ESDHC_NO_ADAPTER 0x7
#define CONFIG_SYS_NAND_BASE 0x530000000ULL #define CONFIG_SYS_NAND_BASE 0x530000000ULL
#define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 #define CONFIG_SYS_NAND_BASE_PHYS 0x30000000
@ -217,8 +220,6 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_CMD_BOOTD #define CONFIG_CMD_BOOTD
#define CONFIG_CMD_ECHO #define CONFIG_CMD_ECHO
#define CONFIG_CMD_SOURCE #define CONFIG_CMD_SOURCE
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
/* Miscellaneous configurable options */ /* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)

View file

@ -274,6 +274,14 @@ unsigned long get_board_ddr_clk(void);
/* I2C bus multiplexer */ /* I2C bus multiplexer */
#define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH_DEFAULT 0x8
/*
* MMC
*/
#ifdef CONFIG_MMC
#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
#endif
/* /*
* RTC configuration * RTC configuration
*/ */
@ -304,7 +312,16 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_NET #define CONFIG_CMD_NET
#endif #endif
/* MMC */
#define CONFIG_MMC
#ifdef CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
#endif
/* Initial environment variables */ /* Initial environment variables */
#undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_EXTRA_ENV_SETTINGS

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@ -277,7 +277,16 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_CMD_NET #define CONFIG_CMD_NET
#endif #endif
/* MMC */
#define CONFIG_MMC
#ifdef CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
#endif
/* Initial environment variables */ /* Initial environment variables */
#undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_EXTRA_ENV_SETTINGS

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@ -158,7 +158,11 @@
#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */ #define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */
struct fsl_esdhc_cfg { struct fsl_esdhc_cfg {
#ifdef CONFIG_LS2085A
u64 esdhc_base;
#else
u32 esdhc_base; u32 esdhc_base;
#endif
u32 sdhc_clk; u32 sdhc_clk;
u8 max_bus_width; u8 max_bus_width;
struct mmc_config cfg; struct mmc_config cfg;