GitHub-Mirror/u-boot
2
0
Fork 0
mirror of https://github.com/Fishwaldo/u-boot.git synced 2025-03-26 17:11:32 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Merge branch 'master' of git://git.denx.de/u-boot-video

Browse source
This commit is contained in:
Wolfgang Denk 2009-07-26 23:15:57 +02:00
commit 8bf7437c01
20 changed files with 914 additions and 279 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

104
board/BuS/EB+MCF-EV123/EB+MCF-EV123.c
View file

@ -1,5 +1,5 @@
/*
* (C) Copyright 2005
* (C) Copyright 2005-2009
* BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
*
* (C) Copyright 2000-2003
@ -27,7 +27,18 @@
#include <common.h>
#include <command.h>
#include "asm/m5282.h"
#include "VCxK.h"
#include <bmp_layout.h>
#include <status_led.h>
#include <bus_vcxk.h>
/*---------------------------------------------------------------------------*/
DECLARE_GLOBAL_DATA_PTR;
unsigned long display_width;
unsigned long display_height;
/*---------------------------------------------------------------------------*/
int checkboard (void)
{
@ -89,7 +100,6 @@ phys_size_t initdram (int board_type)
return size;
}
#if defined(CONFIG_SYS_DRAM_TEST)
int testdram (void)
{
@ -126,37 +136,99 @@ int testdram (void)
int misc_init_r(void)
{
init_vcxk();
#ifdef CONFIG_HW_WATCHDOG
hw_watchdog_init();
#endif
#ifndef CONFIG_VIDEO
vcxk_init(16, 16);
#endif
return 1;
}
#if defined(CONFIG_VIDEO)
/*
****h* EB+CPU5282-T1/drv_video_init
* FUNCTION
***
*/
int drv_video_init(void)
{
char *s;
unsigned long splash;
printf("Init Video as ");
if ((s = getenv("displaywidth")) != NULL)
display_width = simple_strtoul(s, NULL, 10);
else
display_width = 256;
if ((s = getenv("displayheight")) != NULL)
display_height = simple_strtoul(s, NULL, 10);
else
display_height = 256;
printf("%lu x %lu pixel matrix\n", display_width, display_height);
MCFCCM_CCR &= ~MCFCCM_CCR_SZEN;
MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2;
vcxk_init(display_width, display_height);
#ifdef CONFIG_SPLASH_SCREEN
if ((s = getenv("splashimage")) != NULL) {
debug("use splashimage: %s\n", s);
splash = simple_strtoul(s, NULL, 16);
debug("use splashimage: %x\n", splash);
vcxk_acknowledge_wait();
video_display_bitmap(splash, 0, 0);
}
#endif
return 0;
}
#endif
/*---------------------------------------------------------------------------*/
int do_vcimage (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#ifdef CONFIG_VIDEO
int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int rcode = 0;
ulong source;
ulong side;
ulong bright;
switch (argc) {
case 2:
source = simple_strtoul(argv[1],NULL,16);
vcxk_loadimage(source);
rcode = 0;
case 3:
side = simple_strtoul(argv[1], NULL, 10);
bright = simple_strtoul(argv[2], NULL, 10);
if ((side >= 0) && (side <= 3) &&
(bright >= 0) && (bright <= 1000)) {
vcxk_setbrightness(side, bright);
rcode = 0;
} else {
printf("parameters out of range\n");
printf("Usage:\n%s\n", cmdtp->usage);
rcode = 1;
}
break;
default:
cmd_usage(cmdtp);
printf("Usage:\n%s\n", cmdtp->usage);
rcode = 1;
break;
}
return rcode;
}
/***************************************************/
/*---------------------------------------------------------------------------*/
U_BOOT_CMD(
vcimage, 2, 0, do_vcimage,
"loads an image to Display",
"vcimage addr"
bright, 3, 0, do_brightness,
"sets the display brightness\n",
" <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
);
/* EOF EB+MCF-EV123c */
#endif
/* EOF EB+MCF-EV123.c */

2
board/BuS/EB+MCF-EV123/Makefile
View file

@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o cfm_flash.o flash.o VCxK.o
COBJS = $(BOARD).o cfm_flash.o flash.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

136
board/BuS/EB+MCF-EV123/VCxK.c
View file

@ -1,136 +0,0 @@
/*
* (C) Copyright 2005
* BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/m5282.h>
#include "VCxK.h"
vu_char *vcxk_bws = (vu_char *)(CONFIG_SYS_CS3_BASE);
#define VCXK_BWS vcxk_bws
static ulong vcxk_driver;
ulong search_vcxk_driver(void);
void vcxk_cls(void);
void vcxk_setbrightness(short brightness);
int vcxk_request(void);
int vcxk_acknowledge_wait(void);
void vcxk_clear(void);
int init_vcxk(void)
{
VIDEO_Invert_CFG &= ~VIDEO_Invert_IO;
VIDEO_INVERT_PORT |= VIDEO_INVERT_PIN;
VIDEO_INVERT_DDR |= VIDEO_INVERT_PIN;
VIDEO_REQUEST_PORT |= VIDEO_REQUEST_PIN;
VIDEO_REQUEST_DDR |= VIDEO_REQUEST_PIN;
VIDEO_ACKNOWLEDGE_DDR &= ~VIDEO_ACKNOWLEDGE_PIN;
vcxk_driver = search_vcxk_driver();
if (vcxk_driver)
{
/* use flash resist driver */
}
else
{
vcxk_cls();
vcxk_cls();
vcxk_setbrightness(1000);
}
VIDEO_ENABLE_DDR |= VIDEO_ENABLE_PIN;
VIDEO_ENABLE_PORT |= VIDEO_ENABLE_PIN;
VIDEO_ENABLE_PORT &= ~VIDEO_ENABLE_PIN;
return 1;
}
void vcxk_loadimage(ulong source)
{
int cnt;
vcxk_acknowledge_wait();
for (cnt=0; cnt<16384; cnt++)
{
VCXK_BWS[cnt*2] = (*(vu_char*) source);
source++;
}
vcxk_request();
}
void vcxk_cls(void)
{
vcxk_acknowledge_wait();
vcxk_clear();
vcxk_request();
}
void vcxk_clear(void)
{
int cnt;
for (cnt=0; cnt<16384; cnt++)
{
VCXK_BWS[cnt*2] = 0x00;
}
}
void vcxk_setbrightness(short brightness)
{
VCXK_BWS[0x8000]=(brightness >> 4) +2;
VCXK_BWS[0xC000]= (brightness + 23) >> 8;
VCXK_BWS[0xC001]= (brightness + 23) & 0xFF;
}
int vcxk_request(void)
{
if (vcxk_driver)
{
/* use flash resist driver */
}
else
{
VIDEO_REQUEST_PORT &= ~VIDEO_REQUEST_PIN;
VIDEO_REQUEST_PORT |= VIDEO_REQUEST_PIN;
}
return 1;
}
int vcxk_acknowledge_wait(void)
{
if (vcxk_driver)
{
/* use flash resist driver */
}
else
{
while (!(VIDEO_ACKNOWLEDGE_PORT & VIDEO_ACKNOWLEDGE_PIN));
}
return 1;
}
ulong search_vcxk_driver(void)
{
return 0;
}
/* eof */

34
board/mimc/mimc200/mimc200.c
View file

@ -28,10 +28,40 @@
#include <asm/arch/gpio.h>
#include <asm/arch/hmatrix.h>
#include <asm/arch/portmux.h>
#include <atmel_lcdc.h>
#include <lcd.h>
#include "../../../cpu/at32ap/hsmc3.h"
#if defined(CONFIG_LCD)
/* 480x272x16 @ 72 Hz */
vidinfo_t panel_info = {
.vl_col = 480, /* Number of columns */
.vl_row = 272, /* Number of rows */
.vl_clk = 10000000, /* pixel clock in ps */
.vl_sync = ATMEL_LCDC_INVCLK_INVERTED |
ATMEL_LCDC_INVLINE_INVERTED |
ATMEL_LCDC_INVFRAME_INVERTED,
.vl_bpix = LCD_COLOR16, /* Bits per pixel, BPP = 2^n */
.vl_tft = 1, /* 0 = passive, 1 = TFT */
.vl_hsync_len = 42, /* Length of horizontal sync */
.vl_left_margin = 1, /* Time from sync to picture */
.vl_right_margin = 1, /* Time from picture to sync */
.vl_vsync_len = 1, /* Length of vertical sync */
.vl_upper_margin = 12, /* Time from sync to picture */
.vl_lower_margin = 1, /* Time from picture to sync */
.mmio = LCDC_BASE, /* Memory mapped registers */
};
void lcd_enable(void)
{
}
void lcd_disable(void)
{
}
#endif
DECLARE_GLOBAL_DATA_PTR;
static const struct sdram_config sdram_config = {
@ -110,6 +140,10 @@ int board_early_init_f(void)
portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
#endif
#if defined(CONFIG_LCD)
portmux_enable_lcdc(1);
#endif
return 0;
}

1
common/cmd_bmp.c
View file

@ -26,6 +26,7 @@
*/
#include <common.h>
#include <lcd.h>
#include <bmp_layout.h>
#include <command.h>
#include <asm/byteorder.h>

16
common/lcd.c
View file

@ -79,25 +79,13 @@ static inline void lcd_putc_xy (ushort x, ushort y, uchar c);
static int lcd_init (void *lcdbase);
static int lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
extern void lcd_ctrl_init (void *lcdbase);
extern void lcd_enable (void);
static void *lcd_logo (void);
#if (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
extern void lcd_setcolreg (ushort regno,
ushort red, ushort green, ushort blue);
#endif
#if LCD_BPP == LCD_MONOCHROME
extern void lcd_initcolregs (void);
#endif
static int lcd_getbgcolor (void);
static void lcd_setfgcolor (int color);
static void lcd_setbgcolor (int color);
char lcd_is_enabled = 0;
extern vidinfo_t panel_info;
#ifdef NOT_USED_SO_FAR
static void lcd_getcolreg (ushort regno,
@ -815,10 +803,6 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
}
#endif
#ifdef CONFIG_VIDEO_BMP_GZIP
extern bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp);
#endif
static void *lcd_logo (void)
{
#ifdef CONFIG_SPLASH_SCREEN

5
cpu/at32ap/at32ap700x/clk.c
View file

@ -65,6 +65,11 @@ void clk_init(void)
#ifdef CONFIG_PLL
/* Use PLL0 as main clock */
sm_writel(PM_MCCTRL, SM_BIT(PLLSEL));
#ifdef CONFIG_LCD
/* Set up pixel clock for the LCDC */
sm_writel(PM_GCCTRL(7), SM_BIT(PLLSEL) | SM_BIT(CEN));
#endif
#endif
}

90
cpu/at32ap/at32ap700x/portmux.c
View file

@ -202,3 +202,93 @@ void portmux_enable_spi1(unsigned long cs_mask, unsigned long drive_strength)
PORTMUX_DIR_OUTPUT | PORTMUX_INIT_HIGH);
}
#endif
#ifdef AT32AP700x_CHIP_HAS_LCDC
void portmux_enable_lcdc(int pin_config)
{
unsigned long portc_mask = 0;
unsigned long portd_mask = 0;
unsigned long porte_mask = 0;
switch (pin_config) {
case 0:
portc_mask = (1 << 19) /* CC */
| (1 << 20) /* HSYNC */
| (1 << 21) /* PCLK */
| (1 << 22) /* VSYNC */
| (1 << 23) /* DVAL */
| (1 << 24) /* MODE */
| (1 << 25) /* PWR */
| (1 << 26) /* DATA0 */
| (1 << 27) /* DATA1 */
| (1 << 28) /* DATA2 */
| (1 << 29) /* DATA3 */
| (1 << 30) /* DATA4 */
| (1 << 31); /* DATA5 */
portd_mask = (1 << 0) /* DATA6 */
| (1 << 1) /* DATA7 */
| (1 << 2) /* DATA8 */
| (1 << 3) /* DATA9 */
| (1 << 4) /* DATA10 */
| (1 << 5) /* DATA11 */
| (1 << 6) /* DATA12 */
| (1 << 7) /* DATA13 */
| (1 << 8) /* DATA14 */
| (1 << 9) /* DATA15 */
| (1 << 10) /* DATA16 */
| (1 << 11) /* DATA17 */
| (1 << 12) /* DATA18 */
| (1 << 13) /* DATA19 */
| (1 << 14) /* DATA20 */
| (1 << 15) /* DATA21 */
| (1 << 16) /* DATA22 */
| (1 << 17); /* DATA23 */
break;
case 1:
portc_mask = (1 << 20) /* HSYNC */
| (1 << 21) /* PCLK */
| (1 << 22) /* VSYNC */
| (1 << 25) /* PWR */
| (1 << 31); /* DATA5 */
portd_mask = (1 << 0) /* DATA6 */
| (1 << 1) /* DATA7 */
| (1 << 7) /* DATA13 */
| (1 << 8) /* DATA14 */
| (1 << 9) /* DATA15 */
| (1 << 16) /* DATA22 */
| (1 << 17); /* DATA23 */
porte_mask = (1 << 0) /* CC */
| (1 << 1) /* DVAL */
| (1 << 2) /* MODE */
| (1 << 3) /* DATA0 */
| (1 << 4) /* DATA1 */
| (1 << 5) /* DATA2 */
| (1 << 6) /* DATA3 */
| (1 << 7) /* DATA4 */
| (1 << 8) /* DATA8 */
| (1 << 9) /* DATA9 */
| (1 << 10) /* DATA10 */
| (1 << 11) /* DATA11 */
| (1 << 12) /* DATA12 */
| (1 << 13) /* DATA16 */
| (1 << 14) /* DATA17 */
| (1 << 15) /* DATA18 */
| (1 << 16) /* DATA19 */
| (1 << 17) /* DATA20 */
| (1 << 18); /* DATA21 */
break;
}
/* REVISIT: Some pins are probably pure outputs */
portmux_select_peripheral(PORTMUX_PORT_C, portc_mask,
PORTMUX_FUNC_A, PORTMUX_BUSKEEPER);
portmux_select_peripheral(PORTMUX_PORT_D, portd_mask,
PORTMUX_FUNC_A, PORTMUX_BUSKEEPER);
portmux_select_peripheral(PORTMUX_PORT_E, porte_mask,
PORTMUX_FUNC_B, PORTMUX_BUSKEEPER);
}
#endif

85
doc/README.bus_vcxk Normal file
View file

@ -0,0 +1,85 @@
/*
* (C) Copyright 2008-2009
* BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
* Jens Scharsig <esw@bus-elektronik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
U-Boot vcxk video controller driver
======================================
By defining CONFIG_VIDEO_VCXK this driver can be used with VC2K, VC4K and
VC8K devices on following boards:
board | ARCH | Vendor
-----------------------------------------------------------------------
EB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG
EB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG
EB+CPUx9K2 | AT91RM9200 | BuS Elektronik GmbH & Co. KG
ZLSA | AT91RM9200 | Ruf Telematik AG
Driver configuration
--------------------
The driver needs some defines to describe the target hardware:
CONFIG_SYS_VCXK_BASE
base address of VCxK hardware memory
CONFIG_SYS_VCXK_DEFAULT_LINEALIGN
defines the physical alignment of a pixel row
CONFIG_SYS_VCXK_DOUBLEBUFFERED
some boards that use vcxk prevent read from framebuffer memory.
define this option to enable double buffering (needs 16KiB RAM)
CONFIG_SYS_VCXK_<xxxx>_PIN
defines the number of the I/O line PIN in the port
valid values for <xxxx> are:
ACKNOWLEDGE
describes the acknowledge line from vcxk hardware
ENABLE
describes the enable line to vcxk hardware
INVERT
describes the invert line to vcxk hardware
RESET
describes the reset line to vcxk hardware
REQUEST
describes the request line to vcxk hardware
CONFIG_SYS_VCXK_<xxxx>_PORT
defines the I/O port which is connected with the line
for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN
CONFIG_SYS_VCXK_<xxxx>_DDR
defines the register which configures the direction
for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN

1
drivers/video/Makefile
View file

@ -36,6 +36,7 @@ COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
COBJS-$(CONFIG_SED156X) += sed156x.o
COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o
COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
COBJS-y += videomodes.o
COBJS := $(COBJS-y)

440
drivers/video/bus_vcxk.c Normal file
View file

@ -0,0 +1,440 @@
/*
* (C) Copyright 2005-2009
* Jens Scharsig @ BuS Elektronik GmbH & Co. KG, <esw@bus-elektronik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <bmp_layout.h>
#include <asm/io.h>
vu_char *vcxk_bws = ((vu_char *) (CONFIG_SYS_VCXK_BASE));
vu_short *vcxk_bws_word = ((vu_short *)(CONFIG_SYS_VCXK_BASE));
vu_long *vcxk_bws_long = ((vu_long *) (CONFIG_SYS_VCXK_BASE));
#ifdef CONFIG_AT91RM9200
#include <asm/arch/hardware.h>
#ifndef VCBITMASK
#define VCBITMASK(bitno) (0x0001 << (bitno % 16))
#endif
#define VCXK_INIT_PIN(PORT, PIN, DDR, I0O1) \
((AT91PS_PIO) PORT)->PIO_PER = PIN; \
((AT91PS_PIO) PORT)->DDR = PIN; \
((AT91PS_PIO) PORT)->PIO_MDDR = PIN; \
if (!I0O1) ((AT91PS_PIO) PORT)->PIO_PPUER = PIN;
#define VCXK_SET_PIN(PORT, PIN) ((AT91PS_PIO) PORT)->PIO_SODR = PIN;
#define VCXK_CLR_PIN(PORT, PIN) ((AT91PS_PIO) PORT)->PIO_CODR = PIN;
#define VCXK_ACKNOWLEDGE \
(!(((AT91PS_PIO) CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT)->\
PIO_PDSR & CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN))
#elif defined(CONFIG_MCF52x2)
#include <asm/m5282.h>
#ifndef VCBITMASK
#define VCBITMASK(bitno) (0x8000 >> (bitno % 16))
#endif
#define VCXK_INIT_PIN(PORT, PIN, DDR, I0O1) \
if (I0O1) DDR |= PIN; else DDR &= ~PIN;
#define VCXK_SET_PIN(PORT, PIN) PORT |= PIN;
#define VCXK_CLR_PIN(PORT, PIN) PORT &= ~PIN;
#define VCXK_ACKNOWLEDGE \
(!(CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT & \
CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN))
#else
#error no vcxk support for selected ARCH
#endif
#define VCXK_DISABLE\
VCXK_SET_PIN(CONFIG_SYS_VCXK_ENABLE_PORT, CONFIG_SYS_VCXK_ENABLE_PIN)
#define VCXK_ENABLE\
VCXK_CLR_PIN(CONFIG_SYS_VCXK_ENABLE_PORT, CONFIG_SYS_VCXK_ENABLE_PIN)
#ifndef CONFIG_SYS_VCXK_DOUBLEBUFFERED
#define VCXK_BWS(x, data) vcxk_bws[x] = data;
#define VCXK_BWS_WORD_SET(x, mask) vcxk_bws_word[x] |= mask;
#define VCXK_BWS_WORD_CLEAR(x, mask) vcxk_bws_word[x] &= ~mask;
#define VCXK_BWS_LONG(x, data) vcxk_bws_long[x] = data;
#else
u_char double_bws[16384];
u_short *double_bws_word;
u_long *double_bws_long;
#define VCXK_BWS(x,data) \
double_bws[x] = data; vcxk_bws[x] = data;
#define VCXK_BWS_WORD_SET(x,mask) \
double_bws_word[x] |= mask; \
vcxk_bws_word[x] = double_bws_word[x];
#define VCXK_BWS_WORD_CLEAR(x,mask) \
double_bws_word[x] &= ~mask; \
vcxk_bws_word[x] = double_bws_word[x];
#define VCXK_BWS_LONG(x,data) \
double_bws_long[x] = data; vcxk_bws_long[x] = data;
#endif
#define VC4K16_Bright1 vcxk_bws_word[0x20004 / 2]
#define VC4K16_Bright2 vcxk_bws_word[0x20006 / 2]
#define VC2K_Bright vcxk_bws[0x8000]
#define VC8K_BrightH vcxk_bws[0xC000]
#define VC8K_BrightL vcxk_bws[0xC001]
vu_char VC4K16;
u_long display_width;
u_long display_height;
u_long display_bwidth;
ulong search_vcxk_driver(void);
void vcxk_cls(void);
void vcxk_setbrightness(unsigned int side, short brightness);
int vcxk_request(void);
int vcxk_acknowledge_wait(void);
void vcxk_clear(void);
/*
****f* bus_vcxk/vcxk_init
* FUNCTION
* initialalize Video Controller
* PARAMETERS
* width visible display width in pixel
* height visible display height in pixel
***
*/
int vcxk_init(unsigned long width, unsigned long height)
{
#ifdef CONFIG_SYS_VCXK_RESET_PORT
VCXK_INIT_PIN(CONFIG_SYS_VCXK_RESET_PORT,
CONFIG_SYS_VCXK_RESET_PIN, CONFIG_SYS_VCXK_RESET_DDR, 1)
VCXK_SET_PIN(CONFIG_SYS_VCXK_RESET_PORT, CONFIG_SYS_VCXK_RESET_PIN);
#endif
#ifdef CONFIG_SYS_VCXK_DOUBLEBUFFERED
double_bws_word = (u_short *)double_bws;
double_bws_long = (u_long *)double_bws;
debug("%lx %lx %lx \n", double_bws, double_bws_word, double_bws_long);
#endif
display_width = width;
display_height = height;
#if (CONFIG_SYS_VCXK_DEFAULT_LINEALIGN == 4)
display_bwidth = ((width + 31) / 8) & ~0x3;
#elif (CONFIG_SYS_VCXK_DEFAULT_LINEALIGN == 2)
display_bwidth = ((width + 15) / 8) & ~0x1;
#else
#error CONFIG_SYS_VCXK_DEFAULT_LINEALIGN is invalid
#endif
debug("linesize ((%d + 15) / 8 & ~0x1) = %d\n",
display_width, display_bwidth);
#ifdef CONFIG_SYS_VCXK_AUTODETECT
VC4K16 = 0;
vcxk_bws_long[1] = 0x0;
vcxk_bws_long[1] = 0x55AAAA55;
vcxk_bws_long[5] = 0x0;
if (vcxk_bws_long[1] == 0x55AAAA55)
VC4K16 = 1;
#else
VC4K16 = 1;
debug("No autodetect: use vc4k\n");
#endif
VCXK_INIT_PIN(CONFIG_SYS_VCXK_INVERT_PORT,
CONFIG_SYS_VCXK_INVERT_PIN, CONFIG_SYS_VCXK_INVERT_DDR, 1)
VCXK_SET_PIN(CONFIG_SYS_VCXK_INVERT_PORT, CONFIG_SYS_VCXK_INVERT_PIN)
VCXK_SET_PIN(CONFIG_SYS_VCXK_REQUEST_PORT, CONFIG_SYS_VCXK_REQUEST_PIN);
VCXK_INIT_PIN(CONFIG_SYS_VCXK_REQUEST_PORT,
CONFIG_SYS_VCXK_REQUEST_PIN, CONFIG_SYS_VCXK_REQUEST_DDR, 1)
VCXK_INIT_PIN(CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT,
CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN,
CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR, 0)
VCXK_DISABLE;
VCXK_INIT_PIN(CONFIG_SYS_VCXK_ENABLE_PORT,
CONFIG_SYS_VCXK_ENABLE_PIN, CONFIG_SYS_VCXK_ENABLE_DDR, 1)
vcxk_cls();
vcxk_cls(); /* clear second/hidden page */
vcxk_setbrightness(3, 1000);
VCXK_ENABLE;
return 1;
}
/*
****f* bus_vcxk/vcxk_setpixel
* FUNCTION
* set the pixel[x,y] with the given color
* PARAMETER
* x pixel colum
* y pixel row
* color <0x40 off/black
* >0x40 on
***
*/
void vcxk_setpixel(int x, int y, unsigned long color)
{
vu_short dataptr;
if ((x < display_width) && (y < display_height)) {
dataptr = ((x / 16)) + (y * (display_bwidth >> 1));
color = ((color >> 16) & 0xFF) |
((color >> 8) & 0xFF) | (color & 0xFF);
if (color > 0x40) {
VCXK_BWS_WORD_SET(dataptr, VCBITMASK(x));
} else {
VCXK_BWS_WORD_CLEAR(dataptr, VCBITMASK(x));
}
}
}
/*
****f* bus_vcxk/vcxk_loadimage
* FUNCTION
* copies a binary image to display memory
***
*/
void vcxk_loadimage(ulong source)
{
int cnt;
vcxk_acknowledge_wait();
if (VC4K16) {
for (cnt = 0; cnt < (16384 / 4); cnt++) {
VCXK_BWS_LONG(cnt, (*(ulong *) source));
source = source + 4;
}
} else {
for (cnt = 0; cnt < 16384; cnt++) {
VCXK_BWS_LONG(cnt*2, (*(vu_char *) source));
source++;
}
}
vcxk_request();
}
/*
****f* bus_vcxk/vcxk_cls
* FUNCTION
* clear the display
***
*/
void vcxk_cls(void)
{
vcxk_acknowledge_wait();
vcxk_clear();
vcxk_request();
}
/*
****f* bus_vcxk/vcxk_clear(void)
* FUNCTION
* clear the display memory
***
*/
void vcxk_clear(void)
{
int cnt;
for (cnt = 0; cnt < (16384 / 4); cnt++) {
VCXK_BWS_LONG(cnt, 0)
}
}
/*
****f* bus_vcxk/vcxk_setbrightness
* FUNCTION
* set the display brightness
* PARAMETER
* side 1 set front side brightness
* 2 set back side brightness
* 3 set brightness for both sides
* brightness 0..1000
***
*/
void vcxk_setbrightness(unsigned int side, short brightness)
{
if (VC4K16) {
if ((side == 0) || (side & 0x1))
VC4K16_Bright1 = brightness + 23;
if ((side == 0) || (side & 0x2))
VC4K16_Bright2 = brightness + 23;
} else {
VC2K_Bright = (brightness >> 4) + 2;
VC8K_BrightH = (brightness + 23) >> 8;
VC8K_BrightL = (brightness + 23) & 0xFF;
}
}
/*
****f* bus_vcxk/vcxk_request
* FUNCTION
* requests viewing of display memory
***
*/
int vcxk_request(void)
{
VCXK_CLR_PIN(CONFIG_SYS_VCXK_REQUEST_PORT,
CONFIG_SYS_VCXK_REQUEST_PIN)
VCXK_SET_PIN(CONFIG_SYS_VCXK_REQUEST_PORT,
CONFIG_SYS_VCXK_REQUEST_PIN);
return 1;
}
/*
****f* bus_vcxk/vcxk_acknowledge_wait
* FUNCTION
* wait for acknowledge viewing requests
***
*/
int vcxk_acknowledge_wait(void)
{
while (VCXK_ACKNOWLEDGE)
;
return 1;
}
/*
****f* bus_vcxk/vcxk_draw_mono
* FUNCTION
* copies a monochrom bitmap (BMP-Format) from given memory
* PARAMETER
* dataptr pointer to bitmap
* x output bitmap @ columne
* y output bitmap @ row
***
*/
void vcxk_draw_mono(unsigned char *dataptr, unsigned long linewidth,
unsigned long cp_width, unsigned long cp_height)
{
unsigned char *lineptr;
unsigned long xcnt, ycnt;
for (ycnt = cp_height; ycnt > 0; ycnt--) {
lineptr = dataptr;
for (xcnt = 0; xcnt < cp_width; xcnt++) {
if ((*lineptr << (xcnt % 8)) & 0x80)
vcxk_setpixel(xcnt, ycnt - 1, 0xFFFFFF);
else
vcxk_setpixel(xcnt, ycnt-1, 0);
if ((xcnt % 8) == 7)
lineptr++;
} /* endfor xcnt */
dataptr = dataptr + linewidth;
} /* endfor ycnt */
}
/*
****f* bus_vcxk/vcxk_display_bitmap
* FUNCTION
* copies a bitmap (BMP-Format) to the given position
* PARAMETER
* addr pointer to bitmap
* x output bitmap @ columne
* y output bitmap @ row
***
*/
int vcxk_display_bitmap(ulong addr, int x, int y)
{
bmp_image_t *bmp;
unsigned long width;
unsigned long height;
unsigned long bpp;
unsigned long compression;
unsigned long lw;
unsigned long c_width;
unsigned long c_height;
unsigned char *dataptr;
unsigned char *lineptr;
bmp = (bmp_image_t *) addr;
if ((bmp->header.signature[0] == 'B') &&
(bmp->header.signature[1] == 'M')) {
compression = le32_to_cpu(bmp->header.compression);
width = le32_to_cpu(bmp->header.width);
height = le32_to_cpu(bmp->header.height);
bpp = le16_to_cpu(bmp->header.bit_count);
dataptr = (unsigned char *) bmp +
le32_to_cpu(bmp->header.data_offset);
if (display_width < (width + x))
c_width = display_width - x;
else
c_width = width;
if (display_height < (height + y))
c_height = display_height - y;
else
c_height = height;
lw = (((width + 7) / 8) + 3) & ~0x3;
if (c_height < height)
dataptr = dataptr + lw * (height - c_height);
switch (bpp) {
case 1:
vcxk_draw_mono(dataptr, lw, c_width, c_height);
break;
default:
printf("Error: %ld bit per pixel "
"not supported by VCxK\n", bpp);
return 0;
}
} else {
printf("Error: no valid bmp at %lx\n", (ulong) bmp);
return 0;
}
return 1;
}
/*
****f* bus_vcxk/video_display_bitmap
***
*/
int video_display_bitmap(ulong addr, int x, int y)
{
vcxk_acknowledge_wait();
if (vcxk_display_bitmap(addr, x, y)) {
vcxk_request();
return 0;
}
return 1;
}
/* EOF */

5
include/asm-avr32/arch-at32ap700x/chip-features.h
View file

@ -32,4 +32,9 @@
#define AT32AP700x_CHIP_HAS_MACB
#endif
/* AP7000 and AP7002 have LCD controller, but AP7001 does not */
#if defined(CONFIG_AT32AP7000) || defined(CONFIG_AT32AP7002)
#define AT32AP700x_CHIP_HAS_LCDC
#endif
#endif /* __ASM_AVR32_ARCH_CHIP_FEATURES_H__ */

6
include/asm-avr32/arch-at32ap700x/clk.h
View file

@ -83,6 +83,12 @@ static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
return get_pba_clk_rate();
}
#endif
#ifdef AT32AP700x_CHIP_HAS_LCDC
static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)
{
return get_hsb_clk_rate();
}
#endif
extern void clk_init(void);

3
include/asm-avr32/arch-at32ap700x/portmux.h
View file

@ -85,5 +85,8 @@ void portmux_enable_mmci(unsigned int slot, unsigned long flags,
void portmux_enable_spi0(unsigned long cs_mask, unsigned long drive_strength);
void portmux_enable_spi1(unsigned long cs_mask, unsigned long drive_strength);
#endif
#ifdef AT32AP700x_CHIP_HAS_LCDC
void portmux_enable_lcdc(int pin_config);
#endif
#endif /* __ASM_AVR32_ARCH_PORTMUX_H__ */

3
include/asm-avr32/global_data.h
View file

@ -42,6 +42,9 @@ typedef struct global_data {
unsigned long env_addr; /* Address of env struct */
unsigned long env_valid; /* Checksum of env valid? */
unsigned long cpu_hz; /* cpu core clock frequency */
#if defined(CONFIG_LCD)
void *fb_base; /* framebuffer address */
#endif
void **jt; /* jump table */
} gd_t;

36
board/BuS/EB+MCF-EV123/VCxK.h → include/bus_vcxk.h
View file

@ -1,6 +1,6 @@
/*
* (C) Copyright 2005
* BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
* (C) Copyright 2005-2009
* Jens Scharsig @ BuS Elektronik GmbH & Co. KG, <esw@bus-elektronik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
@ -21,28 +21,16 @@
* MA 02111-1307 USA
*/
#ifndef __VCXK_H_
#define __VCXK_H_
#ifndef __BUS_VCXK_H_
#define __BUS_VCXK_H_
extern int init_vcxk(void);
void vcxk_loadimage(ulong source);
#define VIDEO_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
#define VIDEO_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
#define VIDEO_ACKNOWLEDGE_PIN 0x0001
#define VIDEO_ENABLE_PORT MCFGPTB_GPTPORT
#define VIDEO_ENABLE_DDR MCFGPTB_GPTDDR
#define VIDEO_ENABLE_PIN 0x0002
#define VIDEO_REQUEST_PORT MCFGPTB_GPTPORT
#define VIDEO_REQUEST_DDR MCFGPTB_GPTDDR
#define VIDEO_REQUEST_PIN 0x0004
#define VIDEO_Invert_CFG MCFGPIO_PEPAR
#define VIDEO_Invert_IO MCFGPIO_PEPAR_PEPA2
#define VIDEO_INVERT_PORT MCFGPIO_PORTE
#define VIDEO_INVERT_DDR MCFGPIO_DDRE
#define VIDEO_INVERT_PIN MCFGPIO_PORT2
extern int vcxk_init(unsigned long width, unsigned long height);
extern void vcxk_setpixel(int x, int y, unsigned long color);
extern int vcxk_acknowledge_wait(void);
extern int vcxk_request(void);
extern void vcxk_loadimage(ulong source);
extern int vcxk_display_bitmap(ulong addr, int x, int y);
extern void vcxk_setbrightness(unsigned int side, short brightness);
extern int video_display_bitmap(ulong addr, int x, int y);
#endif

176
include/configs/EB+MCF-EV123.h
View file

@ -1,7 +1,7 @@
/*
* Configuation settings for the BuS EB+MCF-EV123 boards.
*
* (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
* (C) Copyright 2005-2009 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
@ -25,16 +25,15 @@
#ifndef _CONFIG_EB_MCF_EV123_H_
#define _CONFIG_EB_MCF_EV123_H_
#define CONFIG_EB_MCF_EV123
#undef CONFIG_SYS_HALT_BEFOR_RAM_JUMP
/*
* High Level Configuration Options (easy to change)
*/
/*----------------------------------------------------------------------*
* High Level Configuration Options (easy to change) *
*----------------------------------------------------------------------*/
#define CONFIG_MCF52x2 /* define processor family */
#define CONFIG_M5282 /* define processor type */
#define CONFIG_EB_MCF_EV123
#define CONFIG_MISC_INIT_R
@ -43,29 +42,33 @@
#define CONFIG_BAUDRATE 9600
#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
#undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */
#define CONFIG_BOOTCOMMAND "printenv"
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
*/
/*----------------------------------------------------------------------*
* Options *
*----------------------------------------------------------------------*/
#define CONFIG_BOOT_RETRY_TIME -1
#define CONFIG_RESET_TO_RETRY
#define CONFIG_SPLASH_SCREEN
/*----------------------------------------------------------------------*
* Configuration for environment *
* Environment is in the second sector of the first 256k of flash *
*----------------------------------------------------------------------*/
#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_ENV_ADDR 0xF003C000 /* End of 256K */
#define CONFIG_ENV_SECT_SIZE 0x4000
#define CONFIG_ENV_IS_IN_FLASH 1
/*
#define CONFIG_ENV_IS_EMBEDDED 1
#define CONFIG_ENV_ADDR_REDUND 0xF0018000
#define CONFIG_ENV_SECT_SIZE_REDUND 0x4000
*/
#else
#define CONFIG_ENV_ADDR 0xFFE04000
#define CONFIG_ENV_SECT_SIZE 0x2000
#define CONFIG_ENV_IS_IN_FLASH 1
#endif
/*
* BOOTP options
*/
@ -74,7 +77,6 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
@ -86,50 +88,20 @@
#define CONFIG_MCFTMR
#define CONFIG_MCFFEC
#ifdef CONFIG_MCFFEC
# define CONFIG_NET_MULTI 1
# define CONFIG_MII 1
# define CONFIG_MII_INIT 1
# define CONFIG_SYS_DISCOVER_PHY
# define CONFIG_SYS_RX_ETH_BUFFER 8
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_SYS_FEC0_PINMUX 0
# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
# define MCFFEC_TOUT_LOOP 50000
/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
# ifndef CONFIG_SYS_DISCOVER_PHY
# define FECDUPLEX FULL
# define FECSPEED _100BASET
# else
# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# endif
# endif /* CONFIG_SYS_DISCOVER_PHY */
#endif
#ifdef CONFIG_MCFFEC
# define CONFIG_ETHADDR 00:CF:52:82:EB:01
# define CONFIG_IPADDR 192.162.1.2
# define CONFIG_NETMASK 255.255.255.0
# define CONFIG_SERVERIP 192.162.1.1
# define CONFIG_GATEWAYIP 192.162.1.1
# define CONFIG_OVERWRITE_ETHADDR_ONCE
#endif /* CONFIG_MCFFEC */
#define CONFIG_BOOTDELAY 5
#define CONFIG_SYS_PROMPT "\nEV123 U-Boot> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_HUSH_PARSER
#define CONFIG_SYS_PROMPT "\nEV123 U-Boot> "
#define CONFIG_SYS_LONGHELP 1
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LOAD_ADDR 0x20000
@ -138,29 +110,53 @@
/*#define CONFIG_SYS_DRAM_TEST 1 */
#undef CONFIG_SYS_DRAM_TEST
/* Clock and PLL Configuration */
/*----------------------------------------------------------------------*
* Clock and PLL Configuration *
*----------------------------------------------------------------------*/
#define CONFIG_SYS_HZ 10000000
#define CONFIG_SYS_CLK 58982400 /* 9,8304MHz * 6 */
/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
#define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */
#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
#define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */
#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
/*
/*----------------------------------------------------------------------*
* Network *
*----------------------------------------------------------------------*/
#define CONFIG_MCFFEC
#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1
#define CONFIG_MII_INIT 1
#define CONFIG_SYS_DISCOVER_PHY
#define CONFIG_SYS_RX_ETH_BUFFER 8
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
#define CONFIG_SYS_FEC0_PINMUX 0
#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
#define MCFFEC_TOUT_LOOP 50000
#define CONFIG_ETHADDR 00:CF:52:82:EB:01
#define CONFIG_OVERWRITE_ETHADDR_ONCE
/*-------------------------------------------------------------------------
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* You should know what you are doing if you make changes here.
*/
#define CONFIG_SYS_MBAR 0x40000000
*-----------------------------------------------------------------------*/
#define CONFIG_SYS_MBAR 0x40000000
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
*-----------------------------------------------------------------------*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
#define CONFIG_SYS_INIT_RAM_END 0x10000
#define CONFIG_SYS_GBL_DATA_SIZE 64
#define CONFIG_SYS_GBL_DATA_OFFSET \
(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
@ -169,18 +165,11 @@
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
*/
#define CONFIG_SYS_SDRAM_BASE1 0x00000000
#define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */
/*
#define CONFIG_SYS_SDRAM_BASE0 CONFIG_SYS_SDRAM_BASE1+CONFIG_SYS_SDRAM_SIZE1*1024*1024
#define CONFIG_SYS_SDRAM_SIZE0 16 */ /* SDRAM size in MB */
#define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE1
#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE1
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
/* If M5282 port is fully implemented the monitor base will be behind
* the vector table. */
@ -199,11 +188,16 @@
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
#define CONFIG_SYS_MAX_FLASH_SECT 35
#define CONFIG_SYS_MAX_FLASH_BANKS 2
#define CONFIG_SYS_FLASH_ERASE_TOUT 10000000
@ -246,16 +240,40 @@
#define CONFIG_SYS_PCDAT 0x0000000
#define CONFIG_SYS_PEHLPAR 0xC0
#define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */
#define CONFIG_SYS_PUAPAR 0x0F
#define CONFIG_SYS_DDRUA 0x05
#define CONFIG_SYS_PJPAR 0xFF
/*-----------------------------------------------------------------------
* CCM configuration
* VIDEO configuration
*/
#define CONFIG_SYS_CCM_SIZ 0
#define CONFIG_VIDEO
/*---------------------------------------------------------------------*/
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_VCXK 1
#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2
#define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1
#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS3_BASE
#define CONFIG_SYS_VCXK_AUTODETECT 1
#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001
#define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT
#define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR
#define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002
#define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT
#define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR
#define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004
#define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE
#define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE
#define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2
#endif /* CONFIG_VIDEO */
#endif /* _CONFIG_M5282EVB_H */
/*---------------------------------------------------------------------*/

16
include/configs/mimc200.h
View file

@ -82,6 +82,8 @@
#define CONFIG_DISABLE_CONSOLE 1 /* disable console */
#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
#define CONFIG_LCD 1
/*
* Only interrupt autoboot if <space> is pressed. Otherwise, garbage
* data on the serial line may interrupt the boot sequence.
@ -127,6 +129,20 @@
#define CONFIG_MMC 1
#define CONFIG_ATMEL_MCI 1
#if defined(CONFIG_LCD)
#define CONFIG_CMD_BMP
#define CONFIG_ATMEL_LCD 1
#define LCD_BPP LCD_COLOR16
#define CONFIG_BMP_16BPP 1
#define CONFIG_FB_ADDR 0x10600000
#define CONFIG_WHITE_ON_BLACK 1
#define CONFIG_VIDEO_BMP_GZIP 1
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144
#define CONFIG_ATMEL_LCD_BGR555 1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
#define CONFIG_SPLASH_SCREEN 1
#endif
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32

22
include/lcd.h
View file

@ -43,6 +43,18 @@ extern void *lcd_console_address; /* Start of console buffer */
extern short console_col;
extern short console_row;
extern struct vidinfo panel_info;
extern void lcd_ctrl_init (void *lcdbase);
extern void lcd_enable (void);
/* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
extern void lcd_setcolreg (ushort regno,
ushort red, ushort green, ushort blue);
extern void lcd_initcolregs (void);
/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
#if defined CONFIG_MPC823
/*
@ -75,8 +87,6 @@ typedef struct vidinfo {
u_char vl_wbf; /* Wait between frames */
} vidinfo_t;
extern vidinfo_t panel_info;
#elif defined CONFIG_PXA250
/*
* PXA LCD DMA descriptor
@ -146,8 +156,6 @@ typedef struct vidinfo {
struct pxafb_info pxa;
} vidinfo_t;
extern vidinfo_t panel_info;
#elif defined(CONFIG_ATMEL_LCD)
typedef struct vidinfo {
@ -173,8 +181,6 @@ typedef struct vidinfo {
u_long mmio; /* Memory mapped registers */
} vidinfo_t;
extern vidinfo_t panel_info;
#else
typedef struct vidinfo {
@ -190,6 +196,8 @@ typedef struct vidinfo {
#endif /* CONFIG_MPC823, CONFIG_PXA250 or CONFIG_MCC200 or CONFIG_ATMEL_LCD */
extern vidinfo_t panel_info;
/* Video functions */
#if defined(CONFIG_RBC823)
@ -314,7 +322,7 @@ void lcd_show_board_info(void);
#if LCD_BPP == LCD_MONOCHROME
# define COLOR_MASK(c) ((c) | (c) << 1 | (c) << 2 | (c) << 3 | \
(c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
#elif LCD_BPP == LCD_COLOR8
#elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
# define COLOR_MASK(c) (c)
#else
# error Unsupported LCD BPP.

12
lib_avr32/board.c
View file

@ -239,6 +239,18 @@ void board_init_f(ulong board_type)
addr -= CONFIG_SYS_DMA_ALLOC_LEN;
#endif
#ifdef CONFIG_LCD
#ifdef CONFIG_FB_ADDR
printf("LCD: Frame buffer allocated at preset 0x%08x\n",
CONFIG_FB_ADDR);
gd->fb_base = (void *)CONFIG_FB_ADDR;
#else
addr = lcd_setmem(addr);
printf("LCD: Frame buffer allocated at 0x%08lx\n", addr);
gd->fb_base = (void *)addr;
#endif /* CONFIG_FB_ADDR */
#endif /* CONFIG_LCD */
/* Allocate a Board Info struct on a word boundary */
addr -= sizeof(bd_t);
addr &= ~3UL;