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Merge git://git.denx.de/u-boot-uniphier
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commit
8c9e6f2817
3 changed files with 25 additions and 2 deletions
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@ -205,6 +205,7 @@ int dram_init(void)
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return ret;
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for (i = 0; i < ARRAY_SIZE(dram_map); i++) {
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unsigned long max_size;
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if (!dram_map[i].size)
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break;
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@ -218,9 +219,32 @@ int dram_init(void)
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dram_map[i].base)
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break;
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/*
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* Do not use memory that exceeds 32bit address range. U-Boot
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* relocates itself to the end of the effectively available RAM.
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* This could be a problem for DMA engines that do not support
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* 64bit address (SDMA of SDHCI, UniPhier AV-ether, etc.)
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*/
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if (dram_map[i].base >= 1ULL << 32)
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break;
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max_size = (1ULL << 32) - dram_map[i].base;
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if (dram_map[i].size > max_size) {
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gd->ram_size += max_size;
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break;
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}
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gd->ram_size += dram_map[i].size;
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}
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/*
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* LD20 uses the last 64 byte for each channel for dynamic
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* DDR PHY training
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*/
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if (uniphier_get_soc_id() == UNIPHIER_LD20_ID)
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gd->ram_size -= 64;
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return 0;
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}
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@ -34,6 +34,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
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CONFIG_MMC_UNIPHIER=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_CADENCE=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_NAND=y
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CONFIG_NAND_DENALI_DT=y
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CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
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@ -215,8 +215,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_NR_DRAM_BANKS 3
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/* for LD20; the last 64 byte is used for dynamic DDR PHY training */
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#define CONFIG_SYS_MEM_TOP_HIDE 64
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
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