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Merge git://git.denx.de/u-boot-uniphier

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This commit is contained in:
Tom Rini 2018-01-09 08:45:02 -05:00
commit 8c9e6f2817
3 changed files with 25 additions and 2 deletions
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24
arch/arm/mach-uniphier/dram_init.c
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@ -205,6 +205,7 @@ int dram_init(void)
return ret; return ret;
for (i = 0; i < ARRAY_SIZE(dram_map); i++) { for (i = 0; i < ARRAY_SIZE(dram_map); i++) {
unsigned long max_size;
if (!dram_map[i].size) if (!dram_map[i].size)
break; break;
@ -218,9 +219,32 @@ int dram_init(void)
dram_map[i].base) dram_map[i].base)
break; break;
/*
* Do not use memory that exceeds 32bit address range. U-Boot
* relocates itself to the end of the effectively available RAM.
* This could be a problem for DMA engines that do not support
* 64bit address (SDMA of SDHCI, UniPhier AV-ether, etc.)
*/
if (dram_map[i].base >= 1ULL << 32)
break;
max_size = (1ULL << 32) - dram_map[i].base;
if (dram_map[i].size > max_size) {
gd->ram_size += max_size;
break;
}
gd->ram_size += dram_map[i].size; gd->ram_size += dram_map[i].size;
} }
/*
* LD20 uses the last 64 byte for each channel for dynamic
* DDR PHY training
*/
if (uniphier_get_soc_id() == UNIPHIER_LD20_ID)
gd->ram_size -= 64;
return 0; return 0;
} }

1
configs/uniphier_v8_defconfig
View file

@ -34,6 +34,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_MMC_UNIPHIER=y CONFIG_MMC_UNIPHIER=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MMC_SDHCI_CADENCE=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_NAND=y CONFIG_NAND=y
CONFIG_NAND_DENALI_DT=y CONFIG_NAND_DENALI_DT=y
CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8

2
include/configs/uniphier.h
View file

@ -215,8 +215,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_NR_DRAM_BANKS 3 #define CONFIG_NR_DRAM_BANKS 3
/* for LD20; the last 64 byte is used for dynamic DDR PHY training */
#define CONFIG_SYS_MEM_TOP_HIDE 64
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)