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sunxi: Add support for H616 SoC
H616 is very similar to H6 so most of the infrastructure can be reused. However, two big differences are that it doesn't have functional SRAM A2 which is usually used for TF-A and it doesn't have ARISC co-processor. It also needs bigger SPL size - 48 KiB. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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6 changed files with 35 additions and 1 deletions
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@ -3,6 +3,8 @@
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#ifdef CONFIG_MACH_SUN50I_H6
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#define BL31_ADDR 0x104000
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#define SCP_ADDR 0x114000
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#elif defined(CONFIG_MACH_SUN50I_H616)
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#define BL31_ADDR 0x40004000
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#else
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#define BL31_ADDR 0x44000
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#define SCP_ADDR 0x50000
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@ -61,6 +63,7 @@
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};
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};
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#ifndef CONFIG_MACH_SUN50I_H616
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scp {
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description = "SCP firmware";
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type = "firmware";
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@ -73,6 +76,7 @@
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missing-msg = "scp-sunxi";
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};
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};
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#endif
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@fdt-SEQ {
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description = "NAME";
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@ -87,7 +91,11 @@
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@config-SEQ {
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description = "NAME";
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firmware = "atf";
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#ifdef CONFIG_MACH_SUN50I_H616
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loadables = "uboot";
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#else
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loadables = "scp", "uboot";
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#endif
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fdt = "fdt-SEQ";
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};
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};
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@ -28,13 +28,20 @@
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#define SUNXI_GIC400_BASE 0x03020000
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#define SUNXI_IOMMU_BASE 0x030F0000
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#ifdef CONFIG_MACH_SUN50I_H6
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#define SUNXI_DRAM_COM_BASE 0x04002000
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#define SUNXI_DRAM_CTL0_BASE 0x04003000
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#define SUNXI_DRAM_PHY0_BASE 0x04005000
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#endif
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#define SUNXI_NFC_BASE 0x04011000
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#define SUNXI_MMC0_BASE 0x04020000
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#define SUNXI_MMC1_BASE 0x04021000
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#define SUNXI_MMC2_BASE 0x04022000
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#ifdef CONFIG_MACH_SUN50I_H616
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#define SUNXI_DRAM_COM_BASE 0x047FA000
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#define SUNXI_DRAM_CTL0_BASE 0x047FB000
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#define SUNXI_DRAM_PHY0_BASE 0x04800000
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#endif
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#define SUNXI_UART0_BASE 0x05000000
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#define SUNXI_UART1_BASE 0x05000400
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@ -190,9 +190,10 @@ config MACH_SUNXI_H3_H5
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select SUPPORT_SPL
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# TODO: try out A80's 8GiB DRAM space
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# TODO: H616 supports 4 GiB DRAM space
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config SUNXI_DRAM_MAX_SIZE
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hex
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default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6
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default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6 || MACH_SUN50I_H616
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default 0x80000000
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choice
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@ -355,6 +356,12 @@ config MACH_SUN50I_H6
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select DRAM_SUN50I_H6
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select SUN50I_GEN_H6
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config MACH_SUN50I_H616
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bool "sun50i (Allwinner H616)"
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select ARM64
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select DRAM_SUN50I_H616
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select SUN50I_GEN_H6
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endchoice
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# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
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@ -591,6 +598,7 @@ config SYS_CLK_FREQ
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default 1008000000 if MACH_SUN8I
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default 1008000000 if MACH_SUN9I
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default 888000000 if MACH_SUN50I_H6
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default 1008000000 if MACH_SUN50I_H616
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config SYS_CONFIG_NAME
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default "sun4i" if MACH_SUN4I
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@ -601,6 +609,7 @@ config SYS_CONFIG_NAME
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default "sun9i" if MACH_SUN9I
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default "sun50i" if MACH_SUN50I
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default "sun50i" if MACH_SUN50I_H6
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default "sun50i" if MACH_SUN50I_H616
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config SYS_BOARD
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default "sunxi"
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@ -99,6 +99,8 @@ int print_cpuinfo(void)
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puts("CPU: Allwinner H5 (SUN50I)\n");
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#elif defined CONFIG_MACH_SUN50I_H6
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puts("CPU: Allwinner H6 (SUN50I)\n");
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#elif defined CONFIG_MACH_SUN50I_H616
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puts("CPU: Allwinner H616 (SUN50I)\n");
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#else
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#warning Please update cpu_info.c with correct CPU information
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puts("CPU: SUNXI Family\n");
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@ -13,6 +13,7 @@ choice
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depends on ARCH_SUNXI
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default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
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default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
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default AXP305_POWER if MACH_SUN50I_H616
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default AXP818_POWER if MACH_SUN8I_A83T
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default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_V3S
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@ -178,9 +178,14 @@
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#define LOW_LEVEL_SRAM_STACK 0x00018000
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#endif /* !CONFIG_ARM64 */
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#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
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#ifdef CONFIG_MACH_SUN50I_H616
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#define CONFIG_SPL_MAX_SIZE 0xbfa0 /* 48 KiB */
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#define LOW_LEVEL_SRAM_STACK 0x58000
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#else
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#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
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/* end of SRAM A2 on H6 for now */
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#define LOW_LEVEL_SRAM_STACK 0x00118000
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#endif
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#else
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#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
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#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
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@ -188,7 +193,9 @@
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#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
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#ifndef CONFIG_MACH_SUN50I_H616
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#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
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#endif
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/* I2C */
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