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watchdog: Introduce watchdog driver for Intel Tangier
Add watchdog driver for Intel Tangier based platforms. Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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3 changed files with 82 additions and 1 deletions
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@ -20,6 +20,15 @@ config OMAP_WATCHDOG
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help
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help
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Say Y here to enable the OMAP3+ watchdog driver.
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Say Y here to enable the OMAP3+ watchdog driver.
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config TANGIER_WATCHDOG
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bool "Intel Tangier watchdog"
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depends on INTEL_MID
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select HW_WATCHDOG
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help
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This enables support for watchdog controller available on
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Intel Tangier SoC. If you're using a board with Intel Tangier
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SoC, say Y here.
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config ULP_WATCHDOG
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config ULP_WATCHDOG
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bool "i.MX7ULP watchdog"
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bool "i.MX7ULP watchdog"
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help
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help
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@ -14,6 +14,7 @@ obj-$(CONFIG_S5P) += s5p_wdt.o
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obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
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obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
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obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
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obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
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obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
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obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
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obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
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obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
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obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
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obj-$(CONFIG_WDT) += wdt-uclass.o
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obj-$(CONFIG_WDT) += wdt-uclass.o
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obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
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obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
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71
drivers/watchdog/tangier_wdt.c
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71
drivers/watchdog/tangier_wdt.c
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@ -0,0 +1,71 @@
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/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <asm/scu.h>
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/* Hardware timeout in seconds */
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#define WDT_PRETIMEOUT 15
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#define WDT_TIMEOUT_MIN (1 + WDT_PRETIMEOUT)
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#define WDT_TIMEOUT_MAX 170
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#define WDT_DEFAULT_TIMEOUT 90
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#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
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#define WATCHDOG_HEARTBEAT 60000
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#else
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#define WATCHDOG_HEARTBEAT CONFIG_WATCHDOG_TIMEOUT_MSECS
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#endif
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enum {
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SCU_WATCHDOG_START = 0,
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SCU_WATCHDOG_STOP = 1,
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SCU_WATCHDOG_KEEPALIVE = 2,
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SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT = 3,
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};
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void hw_watchdog_reset(void)
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{
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static unsigned long last;
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unsigned long now;
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if (gd->timer)
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now = timer_get_us();
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else
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now = rdtsc() / 1000;
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/* Do not flood SCU */
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if (last > now)
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last = 0;
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if (unlikely((now - last) > (WDT_PRETIMEOUT / 2) * 1000000)) {
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last = now;
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scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_KEEPALIVE);
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}
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}
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int hw_watchdog_disable(void)
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{
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return scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_STOP);
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}
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void hw_watchdog_init(void)
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{
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u32 timeout = WATCHDOG_HEARTBEAT / 1000;
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int in_size;
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struct ipc_wd_start {
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u32 pretimeout;
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u32 timeout;
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} ipc_wd_start = { timeout - WDT_PRETIMEOUT, timeout };
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/*
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* SCU expects the input size for watchdog IPC
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* to be based on 4 bytes
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*/
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in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
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scu_ipc_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_START,
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(u32 *)&ipc_wd_start, in_size, NULL, 0);
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}
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