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Handle MPC85xx PCIe reset errata (PCI-Ex 38)
On the MPC85xx boards that have PCIe enable the PCIe errata fix. (MPC8544DS, MPC8548CDS, MPC8568MDS). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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parent
82ac8c9714
commit
8ff3de61fc
5 changed files with 29 additions and 1 deletions
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@ -112,6 +112,29 @@ fsl_pci_init(struct pci_controller *hose)
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pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm);
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enabled = ltssm >= PCI_LTSSM_L0;
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#ifdef CONFIG_FSL_PCIE_RESET
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if (ltssm == 1) {
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int i;
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debug("....PCIe link error. "
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"LTSSM=0x%02x.", ltssm);
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pci->pdb_stat |= 0x08000000; /* assert PCIe reset */
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temp32 = pci->pdb_stat;
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udelay(100);
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debug(" Asserting PCIe reset @%x = %x\n",
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&pci->pdb_stat, pci->pdb_stat);
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pci->pdb_stat &= ~0x08000000; /* clear reset */
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asm("sync;isync");
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for (i=0; i<100 && ltssm < PCI_LTSSM_L0; i++) {
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pci_hose_read_config_word(hose, dev, PCI_LTSSM,
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<ssm);
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udelay(1000);
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debug("....PCIe link error. "
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"LTSSM=0x%02x.\n", ltssm);
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}
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enabled = ltssm >= PCI_LTSSM_L0;
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}
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#endif
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if (!enabled) {
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debug("....PCIE link error. Skipping scan."
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"LTSSM=0x%02x\n", ltssm);
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@ -144,7 +144,9 @@ typedef struct ccsr_pci {
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u32 perr_cap1; /* 0xe2c - PCIE Error Capture Register 1 */
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u32 perr_cap2; /* 0xe30 - PCIE Error Capture Register 2 */
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u32 perr_cap3; /* 0xe34 - PCIE Error Capture Register 3 */
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char res23[456]; /* (- #x1000 #xe38) 456 */
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char res23[200];
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u32 pdb_stat; /* 0xf00 - PCIE Debug Status */
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char res24[252];
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} ccsr_fsl_pci_t;
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#endif /*__IMMAP_fsl_pci__*/
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@ -40,6 +40,7 @@
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#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
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#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */
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#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
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#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
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#define CONFIG_TSEC_ENET /* tsec ethernet support */
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#define CONFIG_ENV_OVERWRITE
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@ -42,6 +42,7 @@
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#undef CONFIG_RIO
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#undef CONFIG_PCI2
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#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
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#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
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#define CONFIG_TSEC_ENET /* tsec ethernet support */
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#define CONFIG_ENV_OVERWRITE
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@ -37,6 +37,7 @@
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#define CONFIG_PCI1 1 /* PCI controller */
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#define CONFIG_PCIE1 1 /* PCIE controller */
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#define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */
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#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
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#define CONFIG_TSEC_ENET /* tsec ethernet support */
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#define CONFIG_QE /* Enable QE */
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#define CONFIG_ENV_OVERWRITE
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