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armv8: mmu: fix page table mapping

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To page mapping the lowest 2 bits needs to be 0x3.
If not fix this, the final lowest 3 bits for page mapping is 0x1
which is marked as reserved.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Peng Fan 2017-11-28 10:31:28 +08:00 • committed by Tom Rini
parent 082693f4f0
commit 90351547ce
2 changed files with 5 additions and 1 deletions
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5
arch/arm/cpu/armv8/cache_v8.c
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@ -230,7 +230,10 @@ static void add_map(struct mm_region *map)
/* Page fits, create block PTE */
debug("Setting PTE %p to block virt=%llx\n",
pte, virt);
*pte = phys | attrs;
if (level == 3)
*pte = phys | attrs | PTE_TYPE_PAGE;
else
*pte = phys | attrs;
virt += blocksize;
phys += blocksize;
size -= blocksize;

1
arch/arm/include/asm/armv8/mmu.h
View file

@ -43,6 +43,7 @@
#define PTE_TYPE_MASK (3 << 0)
#define PTE_TYPE_FAULT (0 << 0)
#define PTE_TYPE_TABLE (3 << 0)
#define PTE_TYPE_PAGE (3 << 0)
#define PTE_TYPE_BLOCK (1 << 0)
#define PTE_TYPE_VALID (1 << 0)